[LLD][ELF] Add support for local symbols in Synthetic Sections

[peter.smith]

Summary

A synthetic local symbol is a symbol with STB_LOCAL binding defined in a SyntheticSection. The primary use case for these symbols is to identify Thunks (When support for Thunks as synthetic sections) is added. Another use case is ARM/AArch64 mapping symbols such as $a, $t and $d. These can be added to Thunks and PLT sections to give better disassembly.

For thunks we need to create a symbol in the SyntheticSection representing the Thunk so we can retarget the relocation at it. As functions with STB_LOCAL binding can have the same name, and may need more than one range extension Thunk it simplifies the Thunk implementation if we can make the Thunk symbols have STB_LOCAL binding, and allow non-unique names.

Mapping symbols such as $a, $t and $d are helpful for the disassembler to identify which parts of the Thunk are ARM, Thumb or Data. The ABI allows mapping symbols to have a .suffix which is ignored to account for tools that can't handle non-unique names.

We can already add symbols with STB_LOCAL binding to synthetic sections by using addRegular, however we have to say IsLocal=false in the SymbolBody and we have to have a unique name. These are not fundamental restrictions to implement Thunks or MappingSymbols as in both cases we can make sure the symbol name we add is unique. However I'm not hugely keen on setting IsLocal=false, there is also potential for other SymbolTable processing treating the symbols as if they were global.

As the local symbols are added outside of SymbolTable::Symbols I've incremented NumLocals when adding a synthetic local.

I've added support for adding to mapping symbols to the ARM PLT to test this out.

[peter.smith]

I've not added any uses of adding a local symbol to a synthetic section. I've checked that it works by adding mapping symbols to ARM PLT entries, this is quite a large diff due to test updates so I've not included it in the review. I've attached the patch for reference

pltmappingshort.patch15 KBDownload

[evgeny777]

Looks good, but wait for others, please.

ELF/SyntheticSections.cpp

1143 ↗

(On Diff #85142)

I'd add lambda which takes 'DefinedRegular<ELFT> *' and call it in both places.

[grimar]

ELF/SyntheticSections.cpp

1152 ↗

(On Diff #85142)

cast<DefinedRegular<ELFT>> instead ?

[ruiu]

SymbolTable class in SymbolTable.cpp is a class to arbitrate global symbols, and currently it has no interaction with local symbols, because local symbols don't need any symbol name resolution. This patch is using that class as a storage to store synthetic symbols. I found that that's a bit confusing.

Can you move that to SyntheticSections.h or somewhere to make it clear that the symbol table doesn't do any business with local symbols?

[peter.smith]

Removed all code in SymbolTable and rebased the patch on top of D29021.

I've added a function addSyntheticLocal which creates the symbol body and automatically adds it to the SymTab if it exists. This avoids storing the SymbolBodies in a temporary location.

[ruiu]

It looks like this patch does not contain all changes. You defined addSyntehticLocal but you are not using it...?

ELF/SyntheticSections.cpp

292 ↗

(On Diff #85385)

S -> *S

[peter.smith]

Thanks for the comments. I've updated the diff.

At the moment I only really need addSyntheticLocal for Thunks, I thought it would be best to split that part from the first Thunk patch to get the interface to addSyntheticLocal before submitting the Thunk patch.

To test addSyntheticLocal I've made a patch to add mapping symbols to the PLT section. I've uploaded the whole thing with this patch. I think that this is a worthwhile improvement to the disassembly of the PLT section especially on GNU objdump.

I'm happy to abandon this review and roll in addSyntheticLocal to either the first Thunks patch. Or I'm happy to add the PLT mapping symbols if you'd prefer?

[ruiu]

I think this patch would be useful per se, but I wonder if you emit more than $a or $d? I mean those symbols could include the original symbol names to which these PLT entries jump to at runtime. (But if it is too much or too weird, I'm OK with this patch.)

ELF/Target.cpp

1738–1739 ↗

(On Diff #85420)

Since string constants are not on the stack, I think you don't need to use Saver.

[peter.smith]

That is possible although in many cases the disassembler can derive that information without an additional symbol. For example there is some functionality in GNU objdump to display the symbol name of the PLT from some hard-coded choice of PLT size made when building objdump. For example, from hello world compiled and linked with ld.bfd:

000102ac <puts@plt-0x14>:
   102ac:	e52de004 	push	{lr}		; (str lr, [sp, #-4]!)
   102b0:	e59fe004 	ldr	lr, [pc, #4]	; 102bc <_init+0x1c>
   102b4:	e08fe00e 	add	lr, pc, lr
   102b8:	e5bef008 	ldr	pc, [lr, #8]!
   102bc:	00010288 	.word	0x00010288

000102c0 <puts@plt>:
   102c0:	e28fc600 	add	ip, pc, #0, 12
   102c4:	e28cca10 	add	ip, ip, #16, 20	; 0x10000
   102c8:	e5bcf288 	ldr	pc, [ip, #648]!	; 0x288
...

The lld ARM backend uses 4 word plt entries and doesn't get picked up by objdump's recognizer.

For x86 objdump can recognise lld's plt entries

00000000002011b0 <__libc_start_main@plt-0x10>:
  2011b0:	ff 35 62 0e 00 00    	pushq  0xe62(%rip)        # 202018 <__TMC_END__+0x8>
  2011b6:	ff 25 64 0e 00 00    	jmpq   *0xe64(%rip)        # 202020 <__TMC_END__+0x10>
  2011bc:	0f 1f 40 00          	nopl   0x0(%rax)

00000000002011c0 <__libc_start_main@plt>:
  2011c0:	ff 25 62 0e 00 00    	jmpq   *0xe62(%rip)        # 202028 <__TMC_END__+0x18>
  2011c6:	68 00 00 00 00       	pushq  $0x0
  2011cb:	e9 e0 ff ff ff       	jmpq   2011b0 <_fini+0x10>

So I think it probably isn't worth manually adding the symbols with @plt.

[peter.smith]

Updated patch to remove Saver.save for mapping symbol entries.

[ruiu]

LGTM

ELF/SyntheticSections.cpp

295 ↗

(On Diff #85550)

Please use make<DefinedRegular<ELFT>>(...) instead of new (BAlloc).

1456 ↗

(On Diff #85550)

Can you add a comment saying that ARM's .plt section usually contains local symbols? That is a foreign concept for those who are familiar only with x86.

lld/trunk/ELF/SyntheticSections.h

 
 template <class ELFT> class PltSection final : public SyntheticSection<ELFT> {
 public:
   PltSection();
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override;
   void addEntry(SymbolBody &Sym);
   bool empty() const override { return Entries.empty(); }
+  void addSymbols();
 
 private:
   std::vector<std::pair<const SymbolBody *, unsigned>> Entries;
 };
 
 // The IpltSection is a variant of Plt for recording entries for GNU Ifunc
 // symbols that will be subject to a Target->IRelativeRel
 // The IpltSection immediately follows the Plt section in the Output Section
 template <class ELFT> class IpltSection final : public SyntheticSection<ELFT> {
 public:
   IpltSection();
   void writeTo(uint8_t *Buf) override;
   size_t getSize() const override;
   void addEntry(SymbolBody &Sym);
   bool empty() const override { return Entries.empty(); }
+  void addSymbols();
 
 private:
   std::vector<std::pair<const SymbolBody *, unsigned>> Entries;
 };
 
 template <class ELFT>
 class GdbIndexSection final : public SyntheticSection<ELFT> {
   typedef typename ELFT::uint uintX_t;
public:
   ARMExidxSentinelSection();
   size_t getSize() const override { return 8; }
   void writeTo(uint8_t *Buf) override;
 };
 
 template <class ELFT> InputSection<ELFT> *createCommonSection();
 template <class ELFT> InputSection<ELFT> *createInterpSection();
 template <class ELFT> MergeInputSection<ELFT> *createCommentSection();
+template <class ELFT>
+SymbolBody *
+addSyntheticLocal(StringRef Name, uint8_t Type, typename ELFT::uint Value,
+                  typename ELFT::uint Size, InputSectionBase<ELFT> *Section);
 
 // Linker generated sections which can be used as inputs.
 template <class ELFT> struct In {
   static InputSection<ELFT> *ARMAttributes;
   static BuildIdSection<ELFT> *BuildId;
   static InputSection<ELFT> *Common;
   static DynamicSection<ELFT> *Dynamic;
   static StringTableSection<ELFT> *DynStrTab;

lld/trunk/ELF/SyntheticSections.cpp

template <class ELFT> InputSection<ELFT> *elf::createInterpSection() {
   Ret->Live = true;
 
   // StringSaver guarantees that the returned string ends with '\0'.
   StringRef S = Saver.save(Config->DynamicLinker);
   Ret->Data = {(const uint8_t *)S.data(), S.size() + 1};
   return Ret;
 }
 
+template <class ELFT>
+SymbolBody *elf::addSyntheticLocal(StringRef Name, uint8_t Type,
+                                   typename ELFT::uint Value,
+                                   typename ELFT::uint Size,
+                                   InputSectionBase<ELFT> *Section) {
+  auto *S = make<DefinedRegular<ELFT>>(Name, /*IsLocal*/ true, STV_DEFAULT,
+                                       Type, Value, Size, Section, nullptr);
+  if (In<ELFT>::SymTab)
+    In<ELFT>::SymTab->addLocal(S);
+  return S;
+}
+
 static size_t getHashSize() {
   switch (Config->BuildId) {
   case BuildIdKind::Fast:
     return 8;
   case BuildIdKind::Md5:
   case BuildIdKind::Uuid:
     return 16;
   case BuildIdKind::Sha1:
template <class ELFT> void PltSection<ELFT>::addEntry(SymbolBody &Sym) {
   unsigned RelOff = In<ELFT>::RelaPlt->getRelocOffset();
   Entries.push_back(std::make_pair(&Sym, RelOff));
 }
 
 template <class ELFT> size_t PltSection<ELFT>::getSize() const {
   return Target->PltHeaderSize + Entries.size() * Target->PltEntrySize;
 }
 
+// Some architectures such as additional symbols in the PLT section. For
+// example ARM uses mapping symbols to aid disassembly
+template <class ELFT> void PltSection<ELFT>::addSymbols() {
+  Target->addPltHeaderSymbols(this);
+  size_t Off = Target->PltHeaderSize;
+  for (size_t I = 0; I < Entries.size(); ++I) {
+    Target->addPltSymbols(this, Off);
+    Off += Target->PltEntrySize;
+  }
+}
+
 template <class ELFT>
 IpltSection<ELFT>::IpltSection()
     : SyntheticSection<ELFT>(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 16,
                              ".plt") {}
 
 template <class ELFT> void IpltSection<ELFT>::writeTo(uint8_t *Buf) {
   // The IRelative relocations do not support lazy binding so no header is
   // needed
template <class ELFT> void IpltSection<ELFT>::addEntry(SymbolBody &Sym) {
   unsigned RelOff = In<ELFT>::RelaIplt->getRelocOffset();
   Entries.push_back(std::make_pair(&Sym, RelOff));
 }
 
 template <class ELFT> size_t IpltSection<ELFT>::getSize() const {
   return Entries.size() * Target->PltEntrySize;
 }
 
+template <class ELFT> void IpltSection<ELFT>::addSymbols() {
+  size_t Off = 0;
+  for (size_t I = 0; I < Entries.size(); ++I) {
+    Target->addPltSymbols(this, Off);
+    Off += Target->PltEntrySize;
+  }
+}
+
 template <class ELFT>
 GdbIndexSection<ELFT>::GdbIndexSection()
     : SyntheticSection<ELFT>(0, SHT_PROGBITS, 1, ".gdb_index"),
       StringPool(llvm::StringTableBuilder::ELF) {}
 
 template <class ELFT> void GdbIndexSection<ELFT>::parseDebugSections() {
   for (InputSectionBase<ELFT> *S : Symtab<ELFT>::X->Sections)
     if (InputSection<ELFT> *IS = dyn_cast<InputSection<ELFT>>(S))

 template InputSection<ELF64LE> *elf::createInterpSection();
 template InputSection<ELF64BE> *elf::createInterpSection();
 
 template MergeInputSection<ELF32LE> *elf::createCommentSection();
 template MergeInputSection<ELF32BE> *elf::createCommentSection();
 template MergeInputSection<ELF64LE> *elf::createCommentSection();
 template MergeInputSection<ELF64BE> *elf::createCommentSection();
 
+template SymbolBody *
+elf::addSyntheticLocal<ELF32LE>(StringRef, uint8_t, ELF32LE::uint,
+                                ELF32LE::uint, InputSectionBase<ELF32LE> *);
+template SymbolBody *
+elf::addSyntheticLocal<ELF32BE>(StringRef, uint8_t, ELF32BE::uint,
+                                ELF32BE::uint, InputSectionBase<ELF32BE> *);
+template SymbolBody *
+elf::addSyntheticLocal<ELF64LE>(StringRef, uint8_t, ELF64LE::uint,
+                                ELF64LE::uint, InputSectionBase<ELF64LE> *);
+template SymbolBody *
+elf::addSyntheticLocal<ELF64BE>(StringRef, uint8_t, ELF64BE::uint,
+                                ELF64BE::uint, InputSectionBase<ELF64BE> *);
+
 template class elf::MipsAbiFlagsSection<ELF32LE>;
 template class elf::MipsAbiFlagsSection<ELF32BE>;
 template class elf::MipsAbiFlagsSection<ELF64LE>;
 template class elf::MipsAbiFlagsSection<ELF64BE>;
 
 template class elf::MipsOptionsSection<ELF32LE>;
 template class elf::MipsOptionsSection<ELF32BE>;
 template class elf::MipsOptionsSection<ELF64LE>;

lld/trunk/ELF/Target.h

public:
   // If lazy binding is supported, the first entry of the PLT has code
   // to call the dynamic linker to resolve PLT entries the first time
   // they are called. This function writes that code.
   virtual void writePltHeader(uint8_t *Buf) const {}
 
   virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
                         uint64_t PltEntryAddr, int32_t Index,
                         unsigned RelOff) const {}
-
+  virtual void addPltHeaderSymbols(InputSectionData* IS) const {}
+  virtual void addPltSymbols(InputSectionData* IS, uint64_t Off) const {}
   // Returns true if a relocation only uses the low bits of a value such that
   // all those bits are in in the same page. For example, if the relocation
   // only uses the low 12 bits in a system with 4k pages. If this is true, the
   // bits will always have the same value at runtime and we don't have to emit
   // a dynamic relocation.
   virtual bool usesOnlyLowPageBits(uint32_t Type) const;
 
   // Decide whether a Thunk is needed for the relocation from File

lld/trunk/ELF/Target.cpp

public:
   bool isTlsLocalDynamicRel(uint32_t Type) const override;
   bool isTlsGlobalDynamicRel(uint32_t Type) const override;
   bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
   void writeIgotPlt(uint8_t *Buf, const SymbolBody &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
+  void addPltSymbols(InputSectionData *IS, uint64_t Off) const override;
+  void addPltHeaderSymbols(InputSectionData *ISD) const override;
   RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType, const InputFile *File,
                        const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
 };
 
 template <class ELFT> class MipsTargetInfo final : public TargetInfo {
 public:
   MipsTargetInfo();
const uint8_t PltData[] = {
       0x00, 0x00, 0x00, 0x00, // L2: .word   &(.got.plt) - L1 - 8
   };
   memcpy(Buf, PltData, sizeof(PltData));
   uint64_t GotPlt = In<ELF32LE>::GotPlt->getVA();
   uint64_t L1 = In<ELF32LE>::Plt->getVA() + 8;
   write32le(Buf + 16, GotPlt - L1 - 8);
 }
 
+void ARMTargetInfo::addPltHeaderSymbols(InputSectionData *ISD) const {
+  auto *IS = cast<InputSection<ELF32LE>>(ISD);
+  addSyntheticLocal("$a", STT_NOTYPE, 0, 0, IS);
+  addSyntheticLocal("$d", STT_NOTYPE, 16, 0, IS);
+}
+
 void ARMTargetInfo::writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
                              uint64_t PltEntryAddr, int32_t Index,
                              unsigned RelOff) const {
   // FIXME: Using simple code sequence with simple relocations.
   // There is a more optimal sequence but it requires support for the group
   // relocations. See ELF for the ARM Architecture Appendix A.3
   const uint8_t PltData[] = {
       0x04, 0xc0, 0x9f, 0xe5, //     ldr ip, L2
       0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc
       0x00, 0xf0, 0x9c, 0xe5, //     ldr pc, [ip]
       0x00, 0x00, 0x00, 0x00, // L2: .word   Offset(&(.plt.got) - L1 - 8
   };
   memcpy(Buf, PltData, sizeof(PltData));
   uint64_t L1 = PltEntryAddr + 4;
   write32le(Buf + 12, GotEntryAddr - L1 - 8);
 }
 
+void ARMTargetInfo::addPltSymbols(InputSectionData *ISD, uint64_t Off) const {
+  auto *IS = cast<InputSection<ELF32LE>>(ISD);
+  addSyntheticLocal("$a", STT_NOTYPE, Off, 0, IS);
+  addSyntheticLocal("$d", STT_NOTYPE, Off + 12, 0, IS);
+}
+
 RelExpr ARMTargetInfo::getThunkExpr(RelExpr Expr, uint32_t RelocType,
                                     const InputFile *File,
                                     const SymbolBody &S) const {
   // If S is an undefined weak symbol in an executable we don't need a Thunk.
   // In a DSO calls to undefined symbols, including weak ones get PLT entries
   // which may need a thunk.
   if (S.isUndefined() && !S.isLocal() && S.symbol()->isWeak() &&
       !Config->Shared)

lld/trunk/ELF/Writer.cpp

if (!Out<ELFT>::EhFrame->empty()) {
     OutputSections.push_back(Out<ELFT>::EhFrame);
     Out<ELFT>::EhFrame->finalize();
   }
 
   // Scan relocations. This must be done after every symbol is declared so that
   // we can correctly decide if a dynamic relocation is needed.
   forEachRelSec(scanRelocations<ELFT>);
 
+  if (In<ELFT>::Plt && !In<ELFT>::Plt->empty())
+    In<ELFT>::Plt->addSymbols();
+  if (In<ELFT>::Iplt && !In<ELFT>::Iplt->empty())
+    In<ELFT>::Iplt->addSymbols();
+
   // Now that we have defined all possible symbols including linker-
   // synthesized ones. Visit all symbols to give the finishing touches.
   for (Symbol *S : Symtab<ELFT>::X->getSymbols()) {
     SymbolBody *Body = S->body();
 
     if (!includeInSymtab<ELFT>(*Body))
       continue;
     if (In<ELFT>::SymTab)

lld/trunk/test/ELF/arm-gnu-ifunc-plt.s

 // DISASM:      _start:
 // DISASM-NEXT:    11008:       14 00 00 eb     bl      #80
 // DISASM-NEXT:    1100c:       17 00 00 eb     bl      #92
 // DISASM:         11010:       00 00 00 00     .word   0x00000000
 // DISASM-NEXT:    11014:       04 00 00 00     .word   0x00000004
 // DISASM:         11018:       05 00 00 eb     bl      #20
 // DISASM-NEXT:    1101c:       08 00 00 eb     bl      #32
 // DISASM-NEXT: Disassembly of section .plt:
-// DISASM-NEXT: .plt:
+// DISASM-NEXT: $a:
 // DISASM-NEXT:    11020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // DISASM-NEXT:    11024:       04 e0 9f e5     ldr     lr, [pc, #4]
 // DISASM-NEXT:    11028:       0e e0 8f e0     add     lr, pc, lr
 // DISASM-NEXT:    1102c:       08 f0 be e5     ldr     pc, [lr, #8]!
-// DISASM-NEXT:    11030:       d0 0f 00 00
+// DISASM: $d:
+// DISASM-NEXT:    11030:       d0 0f 00 00     .word   0x00000fd0
+// DISASM: $a:
 // DISASM-NEXT:    11034:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11038:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    1103c:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    11040:       cc 0f 00 00
+// DISASM: $d:
+// DISASM-NEXT:    11040:       cc 0f 00 00     .word   0x00000fcc
+// DISASM: $a:
 // DISASM-NEXT:    11044:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11048:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    1104c:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    11050:       c0 0f 00 00
+// DISASM: $d:
+// DISASM-NEXT:    11050:       c0 0f 00 00     .word   0x00000fc0
 // Alignment to 16 byte boundary not strictly necessary on ARM, but harmless
-// DISASM-NEXT:    11054:       00 00 00 00     andeq   r0, r0, r0
-// DISASM-NEXT:    11058:       00 00 00 00     andeq   r0, r0, r0
-// DISASM-NEXT:    1105c:       00 00 00 00     andeq   r0, r0, r0
+// DISASM-NEXT:    11054:       00 00 00 00     .word   0x00000000
+// DISASM-NEXT:    11058:       00 00 00 00     .word   0x00000000
+// DISASM-NEXT:    1105c:       00 00 00 00     .word   0x00000000
+// DISASM: $a:
 // DISASM-NEXT:    11060:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11064:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    11068:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    1106c:       14 20 00 00
+// DISASM: $d:
+// DISASM-NEXT:    1106c:       14 20 00 00     .word   0x00002014
+// DISASM: $a:
 // DISASM-NEXT:    11070:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11074:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    11078:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    1107c:       08 20 00 00
-
+// DISASM: $d:
+// DISASM-NEXT:    1107c:       08 20 00 00     .word   0x00002008
 
 .syntax unified
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:
  bx lr
 

lld/trunk/test/ELF/arm-gnu-ifunc.s

 // CHECK-NEXT:     Size: 8
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section (1) .rel.dyn {
 // CHECK-NEXT:     0x12000 R_ARM_IRELATIVE
 // CHECK-NEXT:     0x12004 R_ARM_IRELATIVE
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 // CHECK:        Symbol {
-// CHECK:          Name: __rel_iplt_end (6)
+// CHECK:          Name: __rel_iplt_end
 // CHECK-NEXT:     Value: 0x10104
 // CHECK-NEXT:     Size: 0
 // CHECK-NEXT:     Binding: Local
 // CHECK-NEXT:     Type: None
 // CHECK-NEXT:     Other [
 // CHECK-NEXT:       STV_HIDDEN
 // CHECK-NEXT:     ]
 // CHECK-NEXT:     Section: .rel.dyn

 // DISASM-NEXT:    1100c: 07 00 00 eb   bl  #28
 // 1 * 65536 + 244 = 0x100f4 __rel_iplt_start
 // DISASM-NEXT:    11010: f4 00 00 e3   movw  r0, #244
 // DISASM-NEXT:    11014: 01 00 40 e3   movt  r0, #1
 // 1 * 65536 + 260 = 0x10104 __rel_iplt_end
 // DISASM-NEXT:    11018: 04 01 00 e3   movw  r0, #260
 // DISASM-NEXT:    1101c: 01 00 40 e3   movt  r0, #1
 // DISASM-NEXT: Disassembly of section .plt:
-// DISASM-NEXT: .plt:
-// DISASM-NEXT:    11020: 04 c0 9f e5   ldr r12, [pc, #4]
-// DISASM-NEXT:    11024: 0f c0 8c e0   add r12, r12, pc
+// DISASM: $a:
+// DISASM-NEXT:    11020:       04 c0 9f e5     ldr     r12, [pc, #4]
+// DISASM-NEXT:    11024:       0f c0 8c e0     add     r12, r12, pc
 // 11024 + 8 + fd4 = 0x12000
-// DISASM-NEXT:    11028: 00 f0 9c e5   ldr pc, [r12]
-// DISASM-NEXT:    1102c: d4 0f 00 00
-// DISASM-NEXT:    11030: 04 c0 9f e5   ldr r12, [pc, #4]
-// DISASM-NEXT:    11034: 0f c0 8c e0   add r12, r12, pc
-// 11034 + 8 + fc8 = 0x12004
-// DISASM-NEXT:    11038: 00 f0 9c e5   ldr pc, [r12]
-// DISASM-NEXT:    1103c: c8 0f 00 00
+// DISASM-NEXT:    11028:       00 f0 9c e5     ldr     pc, [r12]
+// DISASM: $d:
+// DISASM-NEXT:    1102c:       d4 0f 00 00     .word   0x00000fd4
+// DISASM: $a:
+// DISASM-NEXT:    11030:       04 c0 9f e5     ldr     r12, [pc, #4]
+// DISASM-NEXT:    11034:       0f c0 8c e0     add     r12, r12, pc
+// 11034 + 8 + fc8 = 0x12004        
+// DISASM-NEXT:    11038:       00 f0 9c e5     ldr     pc, [r12]
+// DISASM: $d:
+// DISASM-NEXT:    1103c:       c8 0f 00 00     .word   0x00000fc8

lld/trunk/test/ELF/arm-plt-reloc.s

 // DSO-NEXT:    1008:        1e ff 2f e1    bx      lr
 // DSO: _start:
 // S(0x1034) - P(0x100c) + A(-8) = 0x20 = 32
 // DSO-NEXT:    100c:        08 00 00 ea    b       #32
 // S(0x1044) - P(0x1010) + A(-8) = 0x2c = 44
 // DSO-NEXT:    1010:        0b 00 00 eb    bl      #44
 // S(0x1054) - P(0x1014) + A(-8) = 0x38 = 56
 // DSO-NEXT:    1014:        0e 00 00 0a    beq     #56
+
 // DSO: Disassembly of section .plt:
-// DSO-NEXT:.plt:
-// DSO-NEXT:    1020:        04 e0 2d e5    str     lr, [sp, #-4]!
-// DSO-NEXT:    1024:        04 e0 9f e5    ldr     lr, [pc, #4]
-// DSO-NEXT:    1028:        0e e0 8f e0    add     lr, pc, lr
-// DSO-NEXT:    102c:        08 f0 be e5    ldr     pc, [lr, #8]!
+// DSO-NEXT: $a:
+// DSO-NEXT:     1020:       04 e0 2d e5     str     lr, [sp, #-4]!
+// DSO-NEXT:     1024:       04 e0 9f e5     ldr     lr, [pc, #4]
+// DSO-NEXT:     1028:       0e e0 8f e0     add     lr, pc, lr
+// DSO-NEXT:     102c:       08 f0 be e5     ldr     pc, [lr, #8]!
 // 0x1028 + 8 + 0fd0 = 0x2000
-// DSO-NEXT:    1030:        d0 0f 00 00
-// DSO-NEXT:    1034:        04 c0 9f e5    ldr     r12, [pc, #4]
-// DSO-NEXT:    1038:        0f c0 8c e0    add     r12, r12, pc
-// DSO-NEXT:    103c:        00 f0 9c e5    ldr     pc, [r12]
-// 0x1038 + 8 + 0fcc = 0x200c
-// DSO-NEXT:    1040:        cc 0f 00 00
-// DSO-NEXT:    1044:        04 c0 9f e5    ldr     r12, [pc, #4]
-// DSO-NEXT:    1048:        0f c0 8c e0    add     r12, r12, pc
-// DSO-NEXT:    104c:        00 f0 9c e5    ldr     pc, [r12]
+// DSO: $d:
+// DSO-NEXT:     1030:       d0 0f 00 00     .word   0x00000fd0
+// DSO: $a:
+// DSO-NEXT:     1034:       04 c0 9f e5     ldr     r12, [pc, #4]
+// DSO-NEXT:     1038:       0f c0 8c e0     add     r12, r12, pc
+// DSO-NEXT:     103c:       00 f0 9c e5     ldr     pc, [r12]
+// 0x1038 + 8 + 0fcc = 0x200c        
+// DSO: $d:
+// DSO-NEXT:     1040:       cc 0f 00 00     .word   0x00000fcc
+// DSO: $a:
+// DSO-NEXT:     1044:       04 c0 9f e5     ldr     r12, [pc, #4]
+// DSO-NEXT:     1048:       0f c0 8c e0     add     r12, r12, pc
+// DSO-NEXT:     104c:       00 f0 9c e5     ldr     pc, [r12]
 // 0x1048 + 8 + 0fc0 = 0x2010
-// DSO-NEXT:    1050:        c0 0f 00 00
-// DSO-NEXT:    1054:        04 c0 9f e5    ldr     r12, [pc, #4]
-// DSO-NEXT:    1058:        0f c0 8c e0    add     r12, r12, pc
-// DSO-NEXT:    105c:        00 f0 9c e5    ldr     pc, [r12]
+// DSO: $d:
+// DSO-NEXT:     1050:       c0 0f 00 00     .word   0x00000fc0
+// DSO: $a:
+// DSO-NEXT:     1054:       04 c0 9f e5     ldr     r12, [pc, #4]
+// DSO-NEXT:     1058:       0f c0 8c e0     add     r12, r12, pc
+// DSO-NEXT:     105c:       00 f0 9c e5     ldr     pc, [r12]
 // 0x1058 + 8 + 0fb4 = 0x2014
-// DSO-NEXT:    1060:       b4 0f 00 00
+// DSO: $d:
+// DSO-NEXT:     1060:       b4 0f 00 00     .word   0x00000fb4
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE
 // DSOREL-NEXT:    ]
 // DSOREL-NEXT:    Address: 0x2000

lld/trunk/test/ELF/arm-thumb-interwork-shared.s

 // CHECK-NEXT:     1010:       fc 44   add     r12, pc
 // CHECK-NEXT:     1012:       60 47   bx      r12
 // CHECK-NEXT:     1014:       40 f2 24 0c     movw    r12, #36
 // CHECK-NEXT:     1018:       c0 f2 00 0c     movt    r12, #0
 // CHECK-NEXT:     101c:       fc 44   add     r12, pc
 // CHECK-NEXT:     101e:       60 47   bx      r12
 
 // PLT: Disassembly of section .plt:
-// PLT-NEXT: .plt:
-// PLT:          1020:       04 e0 2d e5     str     lr, [sp, #-4]!
+// PLT: $a:
+// PLT-NEXT:     1020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // PLT-NEXT:     1024:       04 e0 9f e5     ldr     lr, [pc, #4]
 // PLT-NEXT:     1028:       0e e0 8f e0     add     lr, pc, lr
 // PLT-NEXT:     102c:       08 f0 be e5     ldr     pc, [lr, #8]!
-// PLT-NEXT:     1030:       d0 0f 00 00
+// PLT: $d:
+// PLT-NEXT:     1030:       d0 0f 00 00     .word   0x00000fd0
+// PLT: $a:
 // PLT-NEXT:     1034:       04 c0 9f e5     ldr     r12, [pc, #4]
 // PLT-NEXT:     1038:       0f c0 8c e0     add     r12, r12, pc
 // PLT-NEXT:     103c:       00 f0 9c e5     ldr     pc, [r12]
-// PLT-NEXT:     1040:       cc 0f 00 00
+// PLT: $d:
+// PLT-NEXT:     1040:       cc 0f 00 00     .word   0x00000fcc
+// PLT: $a:
 // PLT-NEXT:     1044:       04 c0 9f e5     ldr     r12, [pc, #4]
 // PLT-NEXT:     1048:       0f c0 8c e0     add     r12, r12, pc
 // PLT-NEXT:     104c:       00 f0 9c e5     ldr     pc, [r12]
-// PLT-NEXT:     1050:       c0 0f 00 00
+// PLT: $d:
+// PLT-NEXT:     1050:       c0 0f 00 00     .word   0x00000fc0

lld/trunk/test/ELF/arm-thumb-plt-reloc.s

 // DSOTHUMB: _start:
 // 0x1008 + 0x28 + 4 = 0x1034 = PLT func1
 // DSOTHUMB-NEXT:    1008:       00 f0 14 e8     blx     #40
 // 0x100c + 0x34 + 4 = 0x1044 = PLT func2
 // DSOTHUMB-NEXT:    100c:       00 f0 1a e8     blx     #52
 // 0x1010 + 0x40 + 4 = 0x1054 = PLT func3
 // DSOTHUMB-NEXT:    1010:       00 f0 20 e8     blx     #64
 // DSOARM: Disassembly of section .plt:
-// DSOARM: .plt:
+// DSOARM-NEXT: $a:
 // DSOARM-NEXT:    1020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // DSOARM-NEXT:    1024:       04 e0 9f e5     ldr     lr, [pc, #4]
 // DSOARM-NEXT:    1028:       0e e0 8f e0     add     lr, pc, lr
 // DSOARM-NEXT:    102c:       08 f0 be e5     ldr     pc, [lr, #8]!
-// DSOARM-NEXT:    1030:       d0 0f 00 00
+// DSOARM: $d:
+// DSOARM-NEXT:    1030:       d0 0f 00 00      .word   0x00000fd0
 // 0x1028 + 8 + 0fd0 = 0x2000
+// DSOARM: $a:
 // DSOARM-NEXT:    1034:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DSOARM-NEXT:    1038:       0f c0 8c e0     add     r12, r12, pc
 // DSOARM-NEXT:    103c:       00 f0 9c e5     ldr     pc, [r12]
-// DSOARM-NEXT:    1040:       cc 0f 00 00
+// DSOARM: $d:
+// DSOARM-NEXT:    1040:       cc 0f 00 00     .word   0x00000fcc
 // 0x1038 + 8 + 0fcc = 0x200c
+// DSOARM: $a:
 // DSOARM-NEXT:    1044:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DSOARM-NEXT:    1048:       0f c0 8c e0     add     r12, r12, pc
 // DSOARM-NEXT:    104c:       00 f0 9c e5     ldr     pc, [r12]
-// DSOARM-NEXT:    1050:       c0 0f 00 00
+// DSOARM: $d:
+// DSOARM-NEXT:    1050:       c0 0f 00 00     .word   0x00000fc0
 // 0x1048 + 8 + 0fc0 = 0x2010
+// DSOARM: $a:
 // DSOARM-NEXT:    1054:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DSOARM-NEXT:    1058:       0f c0 8c e0     add     r12, r12, pc
 // DSOARM-NEXT:    105c:       00 f0 9c e5     ldr     pc, [r12]
-// DSOARM-NEXT:    1060:       b4 0f 00 00
+// DSOARM: $d:
+// DSOARM-NEXT:    1060:       b4 0f 00 00     .word   0x00000fb4
 // 0x1058 + 8 + 0fb4 = 0x2014
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE
 // DSOREL-NEXT:    ]