[DIExpression] Introduce a dedicated DW_OP_LLVM_fragment operation so we can stop using DW_OP_bit_piece with the wrong semantics.

[aprantl]

Summary

The entire back story can be found here:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20161114/405934.html

The gist is that in LLVM we've been misinterpreting DW_OP_bit_piece's offset field to mean the offset into the source variable rather than the offset into the location at the top the DWARF expression stack. In order to be able to fix this in a subsequent patch, this patch introduces a dedicated DW_OP_LLVM_fragment operation with the semantics that we used to apply to DW_OP_bit_piece, which is what we actually need while inside of LLVM. This patch is complete with a bitcode upgrade for expressions using the old format. It does not yet fix the DWARF backend to use DW_OP_bit_piece correctly.

Implementation note: We discussed several options for implementing this, including reserving a dedicated field in DIExpression for the fragment size and offset, but using an custom operator at the end of the expression works just fine and is more efficient because we then only pay for it when we need it.

[aprantl]

This is kind of obvious, but I should have noted that I renamed piece to fragment whenever we use the LLVM-internal semantics to avoid confusion in the future.

[probinson]

Commentary nits.

include/llvm/IR/DebugInfoMetadata.h

1963–1964

Comment should also s/piece/fragment/? Here and for isFragment().

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

113–114

DW_OP_LLVM_fragment (or DW_OP_piece if it really is still that).

128

DW_OP_LLVM_fragment (or DW_OP_piece if it really is still that).

lib/CodeGen/AsmPrinter/DwarfExpression.h

158

The \return line probably should not be indented like this?

test/DebugInfo/ARM/s-super-register.ll

9 ↗

(On Diff #80109)

0x9d is DW_OP_bit_piece, this comment should not have changed (we're still emitting DW_OP_bit_piece in the actual DWARF, yes?).

[aprantl]

Address all of Paul's comments. Thanks!

[aprantl]

For real.

[aprantl]

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

113–114

The code here is not wrong, but do not have to do any manual shifting if we use DW_OP_bit_piece correctly here. I will fix this in a subsequent patch.

[probinson]

Duncan reviewed the bitcode upgrade part and the rest of it looks very mechanical. LGTM.

[aprantl]

Thanks. r288683

include/llvm/IR/DIBuilder.h

public:
     DIExpression *createExpression(ArrayRef<uint64_t> Addr = None);
     DIExpression *createExpression(ArrayRef<int64_t> Addr);
 
     /// Create a descriptor to describe one part
     /// of aggregate variable that is fragmented across multiple Values.
     ///
     /// \param OffsetInBits Offset of the piece in bits.
     /// \param SizeInBits   Size of the piece in bits.
-    DIExpression *createBitPieceExpression(unsigned OffsetInBits,
+    DIExpression *createFragmentExpression(unsigned OffsetInBits,
                                            unsigned SizeInBits);
 
     /// Create an expression for a variable that does not have an address, but
     /// does have a constant value.
     DIExpression *createConstantValueExpression(uint64_t Val) {
       return DIExpression::get(
           VMContext, {dwarf::DW_OP_constu, Val, dwarf::DW_OP_stack_value});
     }

include/llvm/IR/DebugInfoMetadata.h

public:
 
   unsigned getNumElements() const { return Elements.size(); }
   uint64_t getElement(unsigned I) const {
     assert(I < Elements.size() && "Index out of range");
     return Elements[I];
   }
 
   /// Return whether this is a piece of an aggregate variable.
-  bool isBitPiece() const;
+  bool isFragment() const;
 
-  /// Return the offset of this piece in bits.
-  uint64_t getBitPieceOffset() const;
+  /// Return the offset of this fragment in bits.
+  uint64_t getFragmentOffsetInBits() const;
 
-  /// Return the size of this piece in bits.
-  uint64_t getBitPieceSize() const;
+  /// Return the size of this fragment in bits.
+  uint64_t getFragmentSizeInBits() const;
 
   typedef ArrayRef<uint64_t>::iterator element_iterator;
   element_iterator elements_begin() const { return getElements().begin(); }
   element_iterator elements_end() const { return getElements().end(); }
 
   /// A lightweight wrapper around an expression operand.
   ///
   /// TODO: Store arguments directly and change \a DIExpression to store a

include/llvm/Support/Dwarf.h

 #include "llvm/Support/Dwarf.def"
  DW_FORM_lo_user = 0x1f00, ///< Not specified by DWARF.
 };
 
 enum LocationAtom {
 #define HANDLE_DW_OP(ID, NAME) DW_OP_##NAME = ID,
 #include "llvm/Support/Dwarf.def"
   DW_OP_lo_user = 0xe0,
-  DW_OP_hi_user = 0xff
+  DW_OP_hi_user = 0xff,
+  DW_OP_LLVM_fragment = 0x1000 ///< Only used in LLVM metadata.
 };
 
 enum TypeKind {
 #define HANDLE_DW_ATE(ID, NAME) DW_ATE_##NAME = ID,
 #include "llvm/Support/Dwarf.def"
   DW_ATE_lo_user = 0x80,
   DW_ATE_hi_user = 0xff
 };

lib/Bitcode/Reader/BitcodeReader.cpp

case bitc::METADATA_LOCAL_VAR: {
                            Record[6 + HasTag], Flags, AlignInBits)),
           NextMetadataNo++);
       break;
     }
     case bitc::METADATA_EXPRESSION: {
       if (Record.size() < 1)
         return error("Invalid record");
 
-      IsDistinct = Record[0];
+      IsDistinct = Record[0] & 1;
+      bool HasOpFragment = Record[0] & 2;
+      auto Elts = MutableArrayRef<uint64_t>(Record).slice(1);
+      if (!HasOpFragment)
+        if (unsigned N = Elts.size())
+          if (N >= 3 && Elts[N - 3] == dwarf::DW_OP_bit_piece)
+            Elts[N-3] = dwarf::DW_OP_LLVM_fragment;
+
       MetadataList.assignValue(
           GET_OR_DISTINCT(DIExpression,
                           (Context, makeArrayRef(Record).slice(1))),
           NextMetadataNo++);
       break;
     }
     case bitc::METADATA_OBJC_PROPERTY: {
       if (Record.size() != 8)

lib/Bitcode/Writer/BitcodeWriter.cpp

void ModuleBitcodeWriter::writeDILocalVariable(
   Record.clear();
 }
 
 void ModuleBitcodeWriter::writeDIExpression(const DIExpression *N,
                                             SmallVectorImpl<uint64_t> &Record,
                                             unsigned Abbrev) {
   Record.reserve(N->getElements().size() + 1);
 
-  Record.push_back(N->isDistinct());
+  const uint64_t HasOpFragmentFlag = 1 << 1;
+  Record.push_back(N->isDistinct() | HasOpFragmentFlag);
   Record.append(N->elements_begin(), N->elements_end());
 
   Stream.EmitRecord(bitc::METADATA_EXPRESSION, Record, Abbrev);
   Record.clear();
 }
 
 void ModuleBitcodeWriter::writeDIObjCProperty(const DIObjCProperty *N,
                                               SmallVectorImpl<uint64_t> &Record,

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) {
   if (auto *SP = dyn_cast<DISubprogram>(V->getScope())) {
     StringRef Name = SP->getDisplayName();
     if (!Name.empty())
       OS << Name << ":";
   }
   OS << V->getName();
 
   const DIExpression *Expr = MI->getDebugExpression();
-  if (Expr->isBitPiece())
-    OS << " [bit_piece offset=" << Expr->getBitPieceOffset()
-       << " size=" << Expr->getBitPieceSize() << "]";
+  if (Expr->isFragment())
+    OS << " [fragment offset=" << Expr->getFragmentOffsetInBits()
+       << " size=" << Expr->getFragmentSizeInBits() << "]";
   OS << " <- ";
 
   // The second operand is only an offset if it's an immediate.
   bool Deref = MI->getOperand(0).isReg() && MI->getOperand(1).isImm();
   int64_t Offset = Deref ? MI->getOperand(1).getImm() : 0;
 
   for (unsigned i = 0; i < Expr->getNumElements(); ++i) {
     uint64_t Op = Expr->getElement(i);
-    if (Op == dwarf::DW_OP_bit_piece) {
+    if (Op == dwarf::DW_OP_LLVM_fragment) {
       // There can't be any operands after this in a valid expression
       break;
     } else if (Deref) {
       // We currently don't support extra Offsets or derefs after the first
       // one. Bail out early instead of emitting an incorrect comment
       OS << " [complex expression]";
       AP.OutStreamer->emitRawComment(OS.str());
       return true;

lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp

if (MLoc.isIndirect())
       // FIXME: We have no reasonable way of handling errors in here. The
       // caller might be in the middle of a dwarf expression. We should
       // probably assert that Reg >= 0 once debug info generation is more
       // mature.
       return Expr.EmitOp(dwarf::DW_OP_nop,
                          "nop (could not find a dwarf register number)");
 
     // Attempt to find a valid super- or sub-register.
-    if (!Expr.AddMachineRegPiece(*MF->getSubtarget().getRegisterInfo(),
+    if (!Expr.AddMachineRegFragment(*MF->getSubtarget().getRegisterInfo(),
                                     MLoc.getReg()))
       Expr.EmitOp(dwarf::DW_OP_nop,
                   "nop (could not find a dwarf register number)");
     return;
   }
 
   if (MLoc.isIndirect())
     Expr.AddRegIndirect(Reg, MLoc.getOffset());
   else

lib/CodeGen/AsmPrinter/CodeViewDebug.cpp

for (const auto &I : DbgValues) {
     for (auto I = Ranges.begin(), E = Ranges.end(); I != E; ++I) {
       const InsnRange &Range = *I;
       const MachineInstr *DVInst = Range.first;
       assert(DVInst->isDebugValue() && "Invalid History entry");
       const DIExpression *DIExpr = DVInst->getDebugExpression();
       bool IsSubfield = false;
       unsigned StructOffset = 0;
 
-      // Handle bitpieces.
-      if (DIExpr && DIExpr->isBitPiece()) {
+      // Handle fragments.
+      if (DIExpr && DIExpr->isFragment()) {
         IsSubfield = true;
-        StructOffset = DIExpr->getBitPieceOffset() / 8;
+        StructOffset = DIExpr->getFragmentOffsetInBits() / 8;
       } else if (DIExpr && DIExpr->getNumElements() > 0) {
         continue; // Ignore unrecognized exprs.
       }
 
       // Bail if operand 0 is not a valid register. This means the variable is a
       // simple constant, or is described by a complex expression.
       // FIXME: Find a way to represent constant variables, since they are
       // relatively common.
for (auto I = Ranges.begin(), E = Ranges.end(); I != E; ++I) {
 
       // Compute the label range.
       const MCSymbol *Begin = getLabelBeforeInsn(Range.first);
       const MCSymbol *End = getLabelAfterInsn(Range.second);
       if (!End) {
         // This range is valid until the next overlapping bitpiece. In the
         // common case, ranges will not be bitpieces, so they will overlap.
         auto J = std::next(I);
-        while (J != E && !piecesOverlap(DIExpr, J->first->getDebugExpression()))
+        while (J != E &&
+               !fragmentsOverlap(DIExpr, J->first->getDebugExpression()))
           ++J;
         if (J != E)
           End = getLabelBeforeInsn(J->first);
         else
           End = Asm->getFunctionEnd();
       }
 
       // If the last range end is our begin, just extend the last range.

lib/CodeGen/AsmPrinter/DebugHandlerBase.h

public:
   void endFunction(const MachineFunction *MF) override;
 
   /// Return Label preceding the instruction.
   MCSymbol *getLabelBeforeInsn(const MachineInstr *MI);
 
   /// Return Label immediately following the instruction.
   MCSymbol *getLabelAfterInsn(const MachineInstr *MI);
 
-  /// Determine the relative position of the pieces described by P1 and P2.
-  /// Returns  -1 if P1 is entirely before P2, 0 if P1 and P2 overlap,
-  /// 1 if P1 is entirely after P2.
-  static int pieceCmp(const DIExpression *P1, const DIExpression *P2);
+  /// Determine the relative position of the fragments described by P1 and P2.
+  /// Returns -1 if P1 is entirely before P2, 0 if P1 and P2 overlap, 1 if P1 is
+  /// entirely after P2.
+  static int fragmentCmp(const DIExpression *P1, const DIExpression *P2);
 
-  /// Determine whether two variable pieces overlap.
-  static bool piecesOverlap(const DIExpression *P1, const DIExpression *P2);
+  /// Determine whether two variable fragments overlap.
+  static bool fragmentsOverlap(const DIExpression *P1, const DIExpression *P2);
 
   /// If this type is derived from a base type then return base type size.
   static uint64_t getBaseTypeSize(const DITypeRef TyRef);
 };
 
 }
 
 #endif

lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp

MCSymbol *DebugHandlerBase::getLabelBeforeInsn(const MachineInstr *MI) {
   return Label;
 }
 
 // Return Label immediately following the instruction.
 MCSymbol *DebugHandlerBase::getLabelAfterInsn(const MachineInstr *MI) {
   return LabelsAfterInsn.lookup(MI);
 }
 
-// Determine the relative position of the pieces described by P1 and P2.
-// Returns  -1 if P1 is entirely before P2, 0 if P1 and P2 overlap,
-// 1 if P1 is entirely after P2.
-int DebugHandlerBase::pieceCmp(const DIExpression *P1, const DIExpression *P2) {
-  unsigned l1 = P1->getBitPieceOffset();
-  unsigned l2 = P2->getBitPieceOffset();
-  unsigned r1 = l1 + P1->getBitPieceSize();
-  unsigned r2 = l2 + P2->getBitPieceSize();
+int DebugHandlerBase::fragmentCmp(const DIExpression *P1,
+                                  const DIExpression *P2) {
+  unsigned l1 = P1->getFragmentOffsetInBits();
+  unsigned l2 = P2->getFragmentOffsetInBits();
+  unsigned r1 = l1 + P1->getFragmentSizeInBits();
+  unsigned r2 = l2 + P2->getFragmentSizeInBits();
   if (r1 <= l2)
     return -1;
   else if (r2 <= l1)
     return 1;
   else
     return 0;
 }
 
-/// Determine whether two variable pieces overlap.
-bool DebugHandlerBase::piecesOverlap(const DIExpression *P1, const DIExpression *P2) {
-  if (!P1->isBitPiece() || !P2->isBitPiece())
+bool DebugHandlerBase::fragmentsOverlap(const DIExpression *P1,
+                                        const DIExpression *P2) {
+  if (!P1->isFragment() || !P2->isFragment())
     return true;
-  return pieceCmp(P1, P2) == 0;
+  return fragmentCmp(P1, P2) == 0;
 }
 
 /// If this type is derived from a base type then return base type size.
 uint64_t DebugHandlerBase::getBaseTypeSize(const DITypeRef TyRef) {
   DIType *Ty = TyRef.resolve();
   assert(Ty);
   DIDerivedType *DDTy = dyn_cast<DIDerivedType>(Ty);
   if (!DDTy)
if (Ranges.empty())
       continue;
 
     // The first mention of a function argument gets the CurrentFnBegin
     // label, so arguments are visible when breaking at function entry.
     const DILocalVariable *DIVar = Ranges.front().first->getDebugVariable();
     if (DIVar->isParameter() &&
         getDISubprogram(DIVar->getScope())->describes(MF->getFunction())) {
       LabelsBeforeInsn[Ranges.front().first] = Asm->getFunctionBegin();
-      if (Ranges.front().first->getDebugExpression()->isBitPiece()) {
-        // Mark all non-overlapping initial pieces.
+      if (Ranges.front().first->getDebugExpression()->isFragment()) {
+        // Mark all non-overlapping initial fragments.
         for (auto I = Ranges.begin(); I != Ranges.end(); ++I) {
-          const DIExpression *Piece = I->first->getDebugExpression();
+          const DIExpression *Fragment = I->first->getDebugExpression();
           if (std::all_of(Ranges.begin(), I,
                           [&](DbgValueHistoryMap::InstrRange Pred) {
-                return !piecesOverlap(Piece, Pred.first->getDebugExpression());
+                            return !fragmentsOverlap(
+                                Fragment, Pred.first->getDebugExpression());
                           }))
             LabelsBeforeInsn[I->first] = Asm->getFunctionBegin();
           else
             break;
         }
       }
     }
 
     for (const auto &Range : Ranges) {

lib/CodeGen/AsmPrinter/DebugLocEntry.h

struct Value {
     bool isLocation() const { return EntryKind == E_Location; }
     bool isInt() const { return EntryKind == E_Integer; }
     bool isConstantFP() const { return EntryKind == E_ConstantFP; }
     bool isConstantInt() const { return EntryKind == E_ConstantInt; }
     int64_t getInt() const { return Constant.Int; }
     const ConstantFP *getConstantFP() const { return Constant.CFP; }
     const ConstantInt *getConstantInt() const { return Constant.CIP; }
     MachineLocation getLoc() const { return Loc; }
-    bool isBitPiece() const { return getExpression()->isBitPiece(); }
+    bool isFragment() const { return getExpression()->isFragment(); }
     const DIExpression *getExpression() const { return Expression; }
     friend bool operator==(const Value &, const Value &);
     friend bool operator<(const Value &, const Value &);
     void dump() const {
       if (isLocation()) {
         llvm::dbgs() << "Loc = { reg=" << Loc.getReg() << " ";
         if (Loc.isIndirect())
           llvm::dbgs() << '+' << Loc.getOffset();
public:
 
   const MCSymbol *getBeginSym() const { return Begin; }
   const MCSymbol *getEndSym() const { return End; }
   ArrayRef<Value> getValues() const { return Values; }
   void addValues(ArrayRef<DebugLocEntry::Value> Vals) {
     Values.append(Vals.begin(), Vals.end());
     sortUniqueValues();
     assert(all_of(Values, [](DebugLocEntry::Value V) {
-          return V.isBitPiece();
+          return V.isFragment();
         }) && "value must be a piece");
   }
 
   // \brief Sort the pieces by offset.
   // Remove any duplicate entries by dropping all but the first.
   void sortUniqueValues() {
     std::sort(Values.begin(), Values.end());
     Values.erase(
inline bool operator==(const DebugLocEntry::Value &A,
   case DebugLocEntry::Value::E_ConstantFP:
     return A.Constant.CFP == B.Constant.CFP;
   case DebugLocEntry::Value::E_ConstantInt:
     return A.Constant.CIP == B.Constant.CIP;
   }
   llvm_unreachable("unhandled EntryKind");
 }
 
-/// \brief Compare two pieces based on their offset.
+/// Compare two fragments based on their offset.
 inline bool operator<(const DebugLocEntry::Value &A,
                       const DebugLocEntry::Value &B) {
-  return A.getExpression()->getBitPieceOffset() <
-         B.getExpression()->getBitPieceOffset();
+  return A.getExpression()->getFragmentOffsetInBits() <
+         B.getExpression()->getFragmentOffsetInBits();
 }
 
 }
 
 #endif

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

 
 /// Add an address attribute to a die based on the location provided.
 void DwarfCompileUnit::addAddress(DIE &Die, dwarf::Attribute Attribute,
                                   const MachineLocation &Location) {
   DIELoc *Loc = new (DIEValueAllocator) DIELoc;
 
   bool validReg;
   if (Location.isReg())
-    validReg = addRegisterOpPiece(*Loc, Location.getReg());
+    validReg = addRegisterFragment(*Loc, Location.getReg());
   else
     validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset());
 
   if (!validReg)
     return;
 
   // Now attach the location information to the DIE.
   addBlock(Die, Attribute, Loc);

lib/CodeGen/AsmPrinter/DwarfDebug.h

void addMMIEntry(const DbgVariable &V) {
     assert(!FrameIndex.empty() && "Expected an MMI entry");
     assert(!V.FrameIndex.empty() && "Expected an MMI entry");
     assert(Expr.size() == FrameIndex.size() && "Mismatched expressions");
     assert(V.Expr.size() == V.FrameIndex.size() && "Mismatched expressions");
 
     Expr.append(V.Expr.begin(), V.Expr.end());
     FrameIndex.append(V.FrameIndex.begin(), V.FrameIndex.end());
     assert(all_of(Expr, [](const DIExpression *E) {
-             return E && E->isBitPiece();
+             return E && E->isFragment();
            }) && "conflicting locations for variable");
   }
 
   // Translate tag to proper Dwarf tag.
   dwarf::Tag getTag() const {
     // FIXME: Why don't we just infer this tag and store it all along?
     if (Var->isParameter())
       return dwarf::DW_TAG_formal_parameter;

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

static DebugLocEntry::Value getDebugLocValue(const MachineInstr *MI) {
   if (MI->getOperand(0).isFPImm())
     return DebugLocEntry::Value(Expr, MI->getOperand(0).getFPImm());
   if (MI->getOperand(0).isCImm())
     return DebugLocEntry::Value(Expr, MI->getOperand(0).getCImm());
 
   llvm_unreachable("Unexpected 4-operand DBG_VALUE instruction!");
 }
 
-/// \brief If this and Next are describing different pieces of the same
+/// \brief If this and Next are describing different fragments of the same
 /// variable, merge them by appending Next's values to the current
 /// list of values.
 /// Return true if the merge was successful.
 bool DebugLocEntry::MergeValues(const DebugLocEntry &Next) {
   if (Begin == Next.Begin) {
     auto *FirstExpr = cast<DIExpression>(Values[0].Expression);
     auto *FirstNextExpr = cast<DIExpression>(Next.Values[0].Expression);
-    if (!FirstExpr->isBitPiece() || !FirstNextExpr->isBitPiece())
+    if (!FirstExpr->isFragment() || !FirstNextExpr->isFragment())
       return false;
 
-    // We can only merge entries if none of the pieces overlap any others.
+    // We can only merge entries if none of the fragments overlap any others.
     // In doing so, we can take advantage of the fact that both lists are
     // sorted.
     for (unsigned i = 0, j = 0; i < Values.size(); ++i) {
       for (; j < Next.Values.size(); ++j) {
-        int res = DebugHandlerBase::pieceCmp(
+        int res = DebugHandlerBase::fragmentCmp(
             cast<DIExpression>(Values[i].Expression),
             cast<DIExpression>(Next.Values[j].Expression));
         if (res == 0) // The two expressions overlap, we can't merge.
           return false;
         // Values[i] is entirely before Next.Values[j],
         // so go back to the next entry of Values.
         else if (res == -1)
           break;
         // Next.Values[j] is entirely before Values[i], so go on to the
         // next entry of Next.Values.
       }
     }
 
     addValues(Next.Values);
     End = Next.End;
     return true;
   }
   return false;
 }
 
 /// Build the location list for all DBG_VALUEs in the function that
 /// describe the same variable.  If the ranges of several independent
-/// pieces of the same variable overlap partially, split them up and
+/// fragments of the same variable overlap partially, split them up and
 /// combine the ranges. The resulting DebugLocEntries are will have
 /// strict monotonically increasing begin addresses and will never
 /// overlap.
 //
 // Input:
 //
-//   Ranges History [var, loc, piece ofs size]
-// 0 |      [x, (reg0, piece 0, 32)]
-// 1 | |    [x, (reg1, piece 32, 32)] <- IsPieceOfPrevEntry
+//   Ranges History [var, loc, fragment ofs size]
+// 0 |      [x, (reg0, fragment 0, 32)]
+// 1 | |    [x, (reg1, fragment 32, 32)] <- IsFragmentOfPrevEntry
 // 2 | |    ...
 // 3   |    [clobber reg0]
-// 4        [x, (mem, piece 0, 64)] <- overlapping with both previous pieces of
+// 4        [x, (mem, fragment 0, 64)] <- overlapping with both previous fragments of
 //                                     x.
 //
 // Output:
 //
-// [0-1]    [x, (reg0, piece  0, 32)]
-// [1-3]    [x, (reg0, piece  0, 32), (reg1, piece 32, 32)]
-// [3-4]    [x, (reg1, piece 32, 32)]
-// [4- ]    [x, (mem,  piece  0, 64)]
+// [0-1]    [x, (reg0, fragment  0, 32)]
+// [1-3]    [x, (reg0, fragment  0, 32), (reg1, fragment 32, 32)]
+// [3-4]    [x, (reg1, fragment 32, 32)]
+// [4- ]    [x, (mem,  fragment  0, 64)]
 void
 DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc,
                               const DbgValueHistoryMap::InstrRanges &Ranges) {
   SmallVector<DebugLocEntry::Value, 4> OpenRanges;
 
   for (auto I = Ranges.begin(), E = Ranges.end(); I != E; ++I) {
     const MachineInstr *Begin = I->first;
     const MachineInstr *End = I->second;
     assert(Begin->isDebugValue() && "Invalid History entry");
 
     // Check if a variable is inaccessible in this range.
     if (Begin->getNumOperands() > 1 &&
         Begin->getOperand(0).isReg() && !Begin->getOperand(0).getReg()) {
       OpenRanges.clear();
       continue;
     }
 
-    // If this piece overlaps with any open ranges, truncate them.
+    // If this fragment overlaps with any open ranges, truncate them.
     const DIExpression *DIExpr = Begin->getDebugExpression();
     auto Last = remove_if(OpenRanges, [&](DebugLocEntry::Value R) {
-      return piecesOverlap(DIExpr, R.getExpression());
+      return fragmentsOverlap(DIExpr, R.getExpression());
     });
     OpenRanges.erase(Last, OpenRanges.end());
 
     const MCSymbol *StartLabel = getLabelBeforeInsn(Begin);
     assert(StartLabel && "Forgot label before DBG_VALUE starting a range!");
 
     const MCSymbol *EndLabel;
     if (End != nullptr)
       EndLabel = getLabelAfterInsn(End);
     else if (std::next(I) == Ranges.end())
       EndLabel = Asm->getFunctionEnd();
     else
       EndLabel = getLabelBeforeInsn(std::next(I)->first);
     assert(EndLabel && "Forgot label after instruction ending a range!");
 
     DEBUG(dbgs() << "DotDebugLoc: " << *Begin << "\n");
 
     auto Value = getDebugLocValue(Begin);
     DebugLocEntry Loc(StartLabel, EndLabel, Value);
     bool couldMerge = false;
 
-    // If this is a piece, it may belong to the current DebugLocEntry.
-    if (DIExpr->isBitPiece()) {
+    // If this is a fragment, it may belong to the current DebugLocEntry.
+    if (DIExpr->isFragment()) {
       // Add this value to the list of open ranges.
       OpenRanges.push_back(Value);
 
-      // Attempt to add the piece to the last entry.
+      // Attempt to add the fragment to the last entry.
       if (!DebugLoc.empty())
         if (DebugLoc.back().MergeValues(Loc))
           couldMerge = true;
     }
 
     if (!couldMerge) {
       // Need to add a new DebugLocEntry. Add all values from still
-      // valid non-overlapping pieces.
+      // valid non-overlapping fragments.
       if (OpenRanges.size())
         Loc.addValues(OpenRanges);
 
       DebugLoc.push_back(std::move(Loc));
     }
 
     // Attempt to coalesce the ranges of two otherwise identical
     // DebugLocEntries.
void DwarfDebug::emitDebugLocEntry(ByteStreamer &Streamer,
   auto End = Comments.end();
   for (uint8_t Byte : DebugLocs.getBytes(Entry))
     Streamer.EmitInt8(Byte, Comment != End ? *(Comment++) : "");
 }
 
 static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
                               ByteStreamer &Streamer,
                               const DebugLocEntry::Value &Value,
-                              unsigned PieceOffsetInBits) {
+                              unsigned FragmentOffsetInBits) {
   DIExpressionCursor ExprCursor(Value.getExpression());
   DebugLocDwarfExpression DwarfExpr(AP.getDwarfVersion(), Streamer);
   // Regular entry.
   if (Value.isInt()) {
     if (BT && (BT->getEncoding() == dwarf::DW_ATE_signed ||
                BT->getEncoding() == dwarf::DW_ATE_signed_char))
       DwarfExpr.AddSignedConstant(Value.getInt());
     else
       DwarfExpr.AddUnsignedConstant(Value.getInt());
   } else if (Value.isLocation()) {
     MachineLocation Loc = Value.getLoc();
     if (!ExprCursor)
       // Regular entry.
       AP.EmitDwarfRegOp(Streamer, Loc);
     else {
       // Complex address entry.
       const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
       if (Loc.getOffset())
         DwarfExpr.AddMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset());
       else
         DwarfExpr.AddMachineRegExpression(TRI, ExprCursor, Loc.getReg(),
-                                          PieceOffsetInBits);
+                                          FragmentOffsetInBits);
     }
   } else if (Value.isConstantFP()) {
     APInt RawBytes = Value.getConstantFP()->getValueAPF().bitcastToAPInt();
     DwarfExpr.AddUnsignedConstant(RawBytes);
   }
-  DwarfExpr.AddExpression(std::move(ExprCursor), PieceOffsetInBits);
+  DwarfExpr.AddExpression(std::move(ExprCursor), FragmentOffsetInBits);
 }
 
 void DebugLocEntry::finalize(const AsmPrinter &AP,
                              DebugLocStream::ListBuilder &List,
                              const DIBasicType *BT) {
   DebugLocStream::EntryBuilder Entry(List, Begin, End);
   BufferByteStreamer Streamer = Entry.getStreamer();
   const DebugLocEntry::Value &Value = Values[0];
-  if (Value.isBitPiece()) {
-    // Emit all pieces that belong to the same variable and range.
+  if (Value.isFragment()) {
+    // Emit all fragments that belong to the same variable and range.
     assert(all_of(Values, [](DebugLocEntry::Value P) {
-          return P.isBitPiece();
-        }) && "all values are expected to be pieces");
+          return P.isFragment();
+        }) && "all values are expected to be fragments");
     assert(std::is_sorted(Values.begin(), Values.end()) &&
-           "pieces are expected to be sorted");
+           "fragments are expected to be sorted");
    
     unsigned Offset = 0;
-    for (auto Piece : Values) {
-      const DIExpression *Expr = Piece.getExpression();
-      unsigned PieceOffset = Expr->getBitPieceOffset();
-      unsigned PieceSize = Expr->getBitPieceSize();
-      assert(Offset <= PieceOffset && "overlapping or duplicate pieces");
-      if (Offset < PieceOffset) {
-        // The DWARF spec seriously mandates pieces with no locations for gaps.
+    for (auto Fragment : Values) {
+      const DIExpression *Expr = Fragment.getExpression();
+      unsigned FragmentOffset = Expr->getFragmentOffsetInBits();
+      unsigned FragmentSize = Expr->getFragmentSizeInBits();
+      assert(Offset <= FragmentOffset && "overlapping or duplicate fragments");
+      if (Offset < FragmentOffset) {
+        // DWARF represents gaps as pieces with no locations.
         DebugLocDwarfExpression Expr(AP.getDwarfVersion(), Streamer);
-        Expr.AddOpPiece(PieceOffset-Offset, 0);
-        Offset += PieceOffset-Offset;
+        Expr.AddOpPiece(FragmentOffset-Offset, 0);
+        Offset += FragmentOffset-Offset;
       }
-      Offset += PieceSize;
+      Offset += FragmentSize;
 
-      emitDebugLocValue(AP, BT, Streamer, Piece, PieceOffset);
+      emitDebugLocValue(AP, BT, Streamer, Fragment, FragmentOffset);
     }
   } else {
-    assert(Values.size() == 1 && "only pieces may have >1 value");
+    assert(Values.size() == 1 && "only fragments may have >1 value");
     emitDebugLocValue(AP, BT, Streamer, Value, 0);
   }
 }
 
 void DwarfDebug::emitDebugLocEntryLocation(const DebugLocStream::Entry &Entry) {
   // Emit the size.
   Asm->OutStreamer->AddComment("Loc expr size");
   Asm->EmitInt16(DebugLocs.getBytes(Entry).size());

lib/CodeGen/AsmPrinter/DwarfExpression.h

public:
   operator bool() const { return Start != End; }
 };
 
 /// Base class containing the logic for constructing DWARF expressions
 /// independently of whether they are emitted into a DIE or into a .debug_loc
 /// entry.
 class DwarfExpression {
 protected:
-  // Various convenience accessors that extract things out of AsmPrinter.
   unsigned DwarfVersion;
 
 public:
   DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
   virtual ~DwarfExpression() {}
 
   /// Output a dwarf operand and an optional assembler comment.
   virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0;
   /// Emit a raw signed value.
   virtual void EmitSigned(int64_t Value) = 0;
   /// Emit a raw unsigned value.
   virtual void EmitUnsigned(uint64_t Value) = 0;
   /// Return whether the given machine register is the frame register in the
   /// current function.
   virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
 
   /// Emit a dwarf register operation.
   void AddReg(int DwarfReg, const char *Comment = nullptr);
   /// Emit an (double-)indirect dwarf register operation.
   void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
 
-  /// Emit DW_OP_piece operation.
+  /// Emit a DW_OP_piece operation for a variable fragment.
+  /// \param OffsetInBits    This is the offset where the fragment appears
+  ///                        inside the *source variable*.
   void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
+
   /// Emit a shift-right dwarf expression.
   void AddShr(unsigned ShiftBy);
+
   /// Emit a DW_OP_stack_value, if supported.
   ///
   /// The proper way to describe a constant value is DW_OP_constu <const>,
   /// DW_OP_stack_value.  Unfortunately, DW_OP_stack_value was not available
   /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
   /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
   /// <const> actually describes a value at a constant addess, not a constant
   /// value.  However, in the past there was no better way to describe a
   /// constant value, so the producers and consumers started to rely on
   /// heuristics to disambiguate the value vs. location status of the
   /// expression.  See PR21176 for more details.
   void AddStackValue();
 
   /// Emit an indirect dwarf register operation for the given machine register.
   /// \return false if no DWARF register exists for MachineReg.
   bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg,
                              int Offset = 0);
 
   /// Emit a partial DWARF register operation.
-  /// \param MachineReg        the register
-  /// \param PieceSizeInBits   size and
-  /// \param PieceOffsetInBits offset of the piece in bits, if this is one
-  ///                          piece of an aggregate value.
-  ///
-  /// If size and offset is zero an operation for the entire
-  /// register is emitted: Some targets do not provide a DWARF
-  /// register number for every register.  If this is the case, this
-  /// function will attempt to emit a DWARF register by emitting a
-  /// piece of a super-register or by piecing together multiple
-  /// subregisters that alias the register.
+  ///
+  /// \param MachineReg           the register,
+  /// \param FragmentSizeInBits   size and
+  /// \param FragmentOffsetInBits offset of the fragment in bits, if this is
+  ///                             a fragment of an aggregate value.
+  ///
+  /// If size and offset is zero an operation for the entire register is
+  /// emitted: Some targets do not provide a DWARF register number for every
+  /// register.  If this is the case, this function will attempt to emit a DWARF
+  /// register by emitting a fragment of a super-register or by piecing together
+  /// multiple subregisters that alias the register.
   ///
   /// \return false if no DWARF register exists for MachineReg.
-  bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg,
-                          unsigned PieceSizeInBits = 0,
-                          unsigned PieceOffsetInBits = 0);
+  bool AddMachineRegFragment(const TargetRegisterInfo &TRI, unsigned MachineReg,
+                          unsigned FragmentSizeInBits = 0,
+                          unsigned FragmentOffsetInBits = 0);
 
   /// Emit a signed constant.
   void AddSignedConstant(int64_t Value);
   /// Emit an unsigned constant.
   void AddUnsignedConstant(uint64_t Value);
   /// Emit an unsigned constant.
   void AddUnsignedConstant(const APInt &Value);
 
   /// Emit a machine register location. As an optimization this may also consume
   /// the prefix of a DwarfExpression if a more efficient representation for
   /// combining the register location and the first operation exists.
   ///
-  /// \param PieceOffsetInBits     If this is one piece out of a fragmented
-  /// location, this is the offset of the piece inside the entire variable.
-  /// \return false if no DWARF register exists for MachineReg.
+  /// \param FragmentOffsetInBits     If this is one fragment out of a fragmented
+  ///                                 location, this is the offset of the
+  ///                                 fragment inside the entire variable.
+  /// \return                         false if no DWARF register exists
+  ///                                 for MachineReg.
   bool AddMachineRegExpression(const TargetRegisterInfo &TRI,
                                DIExpressionCursor &Expr, unsigned MachineReg,
-                               unsigned PieceOffsetInBits = 0);
+                               unsigned FragmentOffsetInBits = 0);
   /// Emit all remaining operations in the DIExpressionCursor.
-  /// \param PieceOffsetInBits     If this is one piece out of a fragmented
-  /// location, this is the offset of the piece inside the entire variable.
+  ///
+  /// \param FragmentOffsetInBits     If this is one fragment out of multiple
+  ///                                 locations, this is the offset of the
+  ///                                 fragment inside the entire variable.
   void AddExpression(DIExpressionCursor &&Expr,
-                     unsigned PieceOffsetInBits = 0);
+                     unsigned FragmentOffsetInBits = 0);
 };
 
 /// DwarfExpression implementation for .debug_loc entries.
 class DebugLocDwarfExpression : public DwarfExpression {
   ByteStreamer &BS;
 
 public:
   DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI,
   int DwarfReg = TRI.getDwarfRegNum(MachineReg, false);
   if (DwarfReg < 0)
     return false;
 
   AddRegIndirect(DwarfReg, Offset);
   return true;
 }
 
-bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI,
+bool DwarfExpression::AddMachineRegFragment(const TargetRegisterInfo &TRI,
                                             unsigned MachineReg,
-                                         unsigned PieceSizeInBits,
-                                         unsigned PieceOffsetInBits) {
+                                            unsigned FragmentSizeInBits,
+                                            unsigned FragmentOffsetInBits) {
   if (!TRI.isPhysicalRegister(MachineReg))
     return false;
 
   int Reg = TRI.getDwarfRegNum(MachineReg, false);
 
   // If this is a valid register number, emit it.
   if (Reg >= 0) {
     AddReg(Reg);
-    if (PieceSizeInBits)
-      AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
+    if (FragmentSizeInBits)
+      AddOpPiece(FragmentSizeInBits, FragmentOffsetInBits);
     return true;
   }
 
   // Walk up the super-register chain until we find a valid number.
-  // For example, EAX on x86_64 is a 32-bit piece of RAX with offset 0.
+  // For example, EAX on x86_64 is a 32-bit fragment of RAX with offset 0.
   for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) {
     Reg = TRI.getDwarfRegNum(*SR, false);
     if (Reg >= 0) {
       unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg);
       unsigned Size = TRI.getSubRegIdxSize(Idx);
       unsigned RegOffset = TRI.getSubRegIdxOffset(Idx);
       AddReg(Reg, "super-register");
-      if (PieceOffsetInBits == RegOffset) {
+      if (FragmentOffsetInBits == RegOffset) {
         AddOpPiece(Size, RegOffset);
       } else {
-        // If this is part of a variable in a sub-register at a
-        // non-zero offset, we need to manually shift the value into
-        // place, since the DW_OP_piece describes the part of the
-        // variable, not the position of the subregister.
+        // If this is part of a variable in a sub-register at a non-zero offset,
+        // we need to manually shift the value into place, since the
+        // DW_OP_LLVM_fragment describes the part of the variable, not the
+        // position of the subregister.
         if (RegOffset)
           AddShr(RegOffset);
-        AddOpPiece(Size, PieceOffsetInBits);
+        AddOpPiece(Size, FragmentOffsetInBits);
       }
       return true;
     }
   }
 
   // Otherwise, attempt to find a covering set of sub-register numbers.
   // For example, Q0 on ARM is a composition of D0+D1.
-  //
-  // Keep track of the current position so we can emit the more
-  // efficient DW_OP_piece.
-  unsigned CurPos = PieceOffsetInBits;
+  unsigned CurPos = FragmentOffsetInBits;
   // The size of the register in bits, assuming 8 bits per byte.
   unsigned RegSize = TRI.getMinimalPhysRegClass(MachineReg)->getSize() * 8;
   // Keep track of the bits in the register we already emitted, so we
   // can avoid emitting redundant aliasing subregs.
   SmallBitVector Coverage(RegSize, false);
   for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) {
     unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR);
     unsigned Size = TRI.getSubRegIdxSize(Idx);
if (Reg >= 0 && Intersection.any()) {
       AddOpPiece(Size, Offset == CurPos ? 0 : Offset);
       CurPos = Offset + Size;
 
       // Mark it as emitted.
       Coverage.set(Offset, Offset + Size);
     }
   }
 
-  return CurPos > PieceOffsetInBits;
+  return CurPos > FragmentOffsetInBits;
 }
 
 void DwarfExpression::AddStackValue() {
   if (DwarfVersion >= 4)
     EmitOp(dwarf::DW_OP_stack_value);
 }
 
 void DwarfExpression::AddSignedConstant(int64_t Value) {
while (Offset < Size) {
     if (Offset == 0 && Size <= 64)
       break;
     AddOpPiece(std::min(Size-Offset, 64u), Offset);
     Offset += 64;
   }
 }
 
 static unsigned getOffsetOrZero(unsigned OffsetInBits,
-                                unsigned PieceOffsetInBits) {
-  if (OffsetInBits == PieceOffsetInBits)
+                                unsigned FragmentOffsetInBits) {
+  if (OffsetInBits == FragmentOffsetInBits)
     return 0;
-  assert(OffsetInBits >= PieceOffsetInBits && "overlapping pieces");
+  assert(OffsetInBits >= FragmentOffsetInBits && "overlapping fragments");
   return OffsetInBits;
 }
 
 bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI,
                                               DIExpressionCursor &ExprCursor,
                                               unsigned MachineReg,
-                                              unsigned PieceOffsetInBits) {
+                                              unsigned FragmentOffsetInBits) {
   if (!ExprCursor)
-    return AddMachineRegPiece(TRI, MachineReg);
+    return AddMachineRegFragment(TRI, MachineReg);
 
   // Pattern-match combinations for which more efficient representations exist
   // first.
   bool ValidReg = false;
   auto Op = ExprCursor.peek();
   switch (Op->getOp()) {
-  case dwarf::DW_OP_bit_piece: {
+  case dwarf::DW_OP_LLVM_fragment: {
     unsigned OffsetInBits = Op->getArg(0);
     unsigned SizeInBits = Op->getArg(1);
     // Piece always comes at the end of the expression.
-    AddMachineRegPiece(TRI, MachineReg, SizeInBits,
-                       getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
+    AddMachineRegFragment(TRI, MachineReg, SizeInBits,
+                          getOffsetOrZero(OffsetInBits, FragmentOffsetInBits));
     ExprCursor.take();
     break;
   }
   case dwarf::DW_OP_plus:
   case dwarf::DW_OP_minus: {
     // [DW_OP_reg,Offset,DW_OP_plus, DW_OP_deref] --> [DW_OP_breg, Offset].
     // [DW_OP_reg,Offset,DW_OP_minus,DW_OP_deref] --> [DW_OP_breg,-Offset].
     auto N = ExprCursor.peekNext();
     if (N && N->getOp() == dwarf::DW_OP_deref) {
       unsigned Offset = Op->getArg(0);
       ValidReg = AddMachineRegIndirect(
           TRI, MachineReg, Op->getOp() == dwarf::DW_OP_plus ? Offset : -Offset);
       ExprCursor.consume(2);
     } else
-      ValidReg = AddMachineRegPiece(TRI, MachineReg);
+      ValidReg = AddMachineRegFragment(TRI, MachineReg);
     break;
   }
   case dwarf::DW_OP_deref:
     // [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
     ValidReg = AddMachineRegIndirect(TRI, MachineReg);
     ExprCursor.take();
     break;
   }
 
   return ValidReg;
 }
 
 void DwarfExpression::AddExpression(DIExpressionCursor &&ExprCursor,
-                                    unsigned PieceOffsetInBits) {
+                                    unsigned FragmentOffsetInBits) {
   while (ExprCursor) {
     auto Op = ExprCursor.take();
     switch (Op->getOp()) {
-    case dwarf::DW_OP_bit_piece: {
+    case dwarf::DW_OP_LLVM_fragment: {
       unsigned OffsetInBits = Op->getArg(0);
       unsigned SizeInBits   = Op->getArg(1);
-      AddOpPiece(SizeInBits, getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
+      AddOpPiece(SizeInBits,
+                 getOffsetOrZero(OffsetInBits, FragmentOffsetInBits));
       break;
     }
     case dwarf::DW_OP_plus:
       EmitOp(dwarf::DW_OP_plus_uconst);
       EmitUnsigned(Op->getArg(0));
       break;
     case dwarf::DW_OP_minus:
       // There is no OP_minus_uconst.

lib/CodeGen/AsmPrinter/DwarfUnit.h

public:
   void addConstantFPValue(DIE &Die, const ConstantFP *CFP);
 
   /// Add a linkage name, if it isn't empty.
   void addLinkageName(DIE &Die, StringRef LinkageName);
 
   /// Add template parameters in buffer.
   void addTemplateParams(DIE &Buffer, DINodeArray TParams);
 
-  /// Add register operand.
+  /// Add register operand for a source variable fragment of the specified size
+  /// and offset.
+  ///
   /// \returns false if the register does not exist, e.g., because it was never
-  /// materialized.
-  bool addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
+  ///          materialized.
+  bool addRegisterFragment(DIELoc &TheDie, unsigned Reg,
                            unsigned SizeInBits = 0, unsigned OffsetInBits = 0);
 
   /// Add register offset.
   /// \returns false if the register does not exist, e.g., because it was never
   /// materialized.
   bool addRegisterOffset(DIELoc &TheDie, unsigned Reg, int64_t Offset);
 
   // FIXME: Should be reformulated in terms of addComplexAddress.
   /// Start with the address based on the location provided, and generate the

lib/CodeGen/AsmPrinter/DwarfUnit.cpp

void DwarfUnit::addSourceLine(DIE &Die, const DIObjCProperty *Ty) {
 
   addSourceLine(Die, Ty->getLine(), Ty->getFilename(), Ty->getDirectory());
 }
 
 void DwarfUnit::addSourceLine(DIE &Die, const DINamespace *NS) {
   addSourceLine(Die, NS->getLine(), NS->getFilename(), NS->getDirectory());
 }
 
-bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
-                                   unsigned SizeInBits, unsigned OffsetInBits) {
+bool DwarfUnit::addRegisterFragment(DIELoc &TheDie, unsigned Reg,
+                                    unsigned SizeInBits,
+                                    unsigned OffsetInBits) {
   DIEDwarfExpression Expr(*Asm, *this, TheDie);
-  Expr.AddMachineRegPiece(*Asm->MF->getSubtarget().getRegisterInfo(), Reg,
+  Expr.AddMachineRegFragment(*Asm->MF->getSubtarget().getRegisterInfo(), Reg,
                              SizeInBits, OffsetInBits);
   return true;
 }
 
 bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
                                   int64_t Offset) {
   DIEDwarfExpression Expr(*Asm, *this, TheDie);
   return Expr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
                                     Reg, Offset);
void DwarfUnit::addBlockByrefAddress(const DbgVariable &DV, DIE &Die,
   unsigned varFieldOffset = varField->getOffsetInBits() >> 2;
 
   // Decode the original location, and use that as the start of the byref
   // variable's location.
   DIELoc *Loc = new (DIEValueAllocator) DIELoc;
 
   bool validReg;
   if (Location.isReg())
-    validReg = addRegisterOpPiece(*Loc, Location.getReg());
+    validReg = addRegisterFragment(*Loc, Location.getReg());
   else
     validReg = addRegisterOffset(*Loc, Location.getReg(), Location.getOffset());
 
   if (!validReg)
     return;
 
   // If we started with a pointer to the __Block_byref... struct, then
   // the first thing we need to do is dereference the pointer (DW_OP_deref).

lib/IR/DIBuilder.cpp

 }
 
 DIExpression *DIBuilder::createExpression(ArrayRef<int64_t> Signed) {
   // TODO: Remove the callers of this signed version and delete.
   SmallVector<uint64_t, 8> Addr(Signed.begin(), Signed.end());
   return createExpression(Addr);
 }
 
-DIExpression *DIBuilder::createBitPieceExpression(unsigned OffsetInBytes,
+DIExpression *DIBuilder::createFragmentExpression(unsigned OffsetInBytes,
                                                   unsigned SizeInBytes) {
-  uint64_t Addr[] = {dwarf::DW_OP_bit_piece, OffsetInBytes, SizeInBytes};
+  uint64_t Addr[] = {dwarf::DW_OP_LLVM_fragment, OffsetInBytes, SizeInBytes};
   return DIExpression::get(VMContext, Addr);
 }
 
 template <class... Ts>
 static DISubprogram *getSubprogram(bool IsDistinct, Ts &&... Args) {
   if (IsDistinct)
     return DISubprogram::getDistinct(std::forward<Ts>(Args)...);
   return DISubprogram::get(std::forward<Ts>(Args)...);

lib/IR/DebugInfoMetadata.cpp

DIExpression *DIExpression::getImpl(LLVMContext &Context,
                                     ArrayRef<uint64_t> Elements,
                                     StorageType Storage, bool ShouldCreate) {
   DEFINE_GETIMPL_LOOKUP(DIExpression, (Elements));
   DEFINE_GETIMPL_STORE_NO_OPS(DIExpression, (Elements));
 }
 
 unsigned DIExpression::ExprOperand::getSize() const {
   switch (getOp()) {
-  case dwarf::DW_OP_bit_piece:
+  case dwarf::DW_OP_LLVM_fragment:
     return 3;
   case dwarf::DW_OP_constu:
   case dwarf::DW_OP_plus:
   case dwarf::DW_OP_minus:
     return 2;
   default:
     return 1;
   }
 }
 
 bool DIExpression::isValid() const {
   for (auto I = expr_op_begin(), E = expr_op_end(); I != E; ++I) {
     // Check that there's space for the operand.
     if (I->get() + I->getSize() > E->get())
       return false;
 
     // Check that the operand is valid.
     switch (I->getOp()) {
     default:
       return false;
-    case dwarf::DW_OP_bit_piece:
+    case dwarf::DW_OP_LLVM_fragment:
     case dwarf::DW_OP_stack_value:
-      // We only support bit piece and stack value expressions which appear at
+      // We only support fragment and stack value expressions which appear at
       // the end.
       return I->get() + I->getSize() == E->get();
     case dwarf::DW_OP_constu:
     case dwarf::DW_OP_plus:
     case dwarf::DW_OP_minus:
     case dwarf::DW_OP_deref:
       break;
     }
   }
   return true;
 }
 
-bool DIExpression::isBitPiece() const {
+bool DIExpression::isFragment() const {
   assert(isValid() && "Expected valid expression");
   if (unsigned N = getNumElements())
     if (N >= 3)
-      return getElement(N - 3) == dwarf::DW_OP_bit_piece;
+      return getElement(N - 3) == dwarf::DW_OP_LLVM_fragment;
   return false;
 }
 
-uint64_t DIExpression::getBitPieceOffset() const {
-  assert(isBitPiece() && "Expected bit piece");
+uint64_t DIExpression::getFragmentOffsetInBits() const {
+  assert(isFragment() && "Expected fragment");
   return getElement(getNumElements() - 2);
 }
 
-uint64_t DIExpression::getBitPieceSize() const {
-  assert(isBitPiece() && "Expected bit piece");
+uint64_t DIExpression::getFragmentSizeInBits() const {
+  assert(isFragment() && "Expected fragment");
   return getElement(getNumElements() - 1);
 }
 
 DIObjCProperty *DIObjCProperty::getImpl(
     LLVMContext &Context, MDString *Name, Metadata *File, unsigned Line,
     MDString *GetterName, MDString *SetterName, unsigned Attributes,
     Metadata *Type, StorageType Storage, bool ShouldCreate) {
   assert(isCanonical(Name) && "Expected canonical MDString");

lib/IR/Verifier.cpp

#include "llvm/IR/Metadata.def"
   void verifyFunctionMetadata(ArrayRef<std::pair<unsigned, MDNode *>> MDs);
 
   void visitConstantExprsRecursively(const Constant *EntryC);
   void visitConstantExpr(const ConstantExpr *CE);
   void verifyStatepoint(ImmutableCallSite CS);
   void verifyFrameRecoverIndices();
   void verifySiblingFuncletUnwinds();
 
-  void verifyBitPieceExpression(const DbgInfoIntrinsic &I);
+  void verifyFragmentExpression(const DbgInfoIntrinsic &I);
 
   /// Module-level debug info verification...
   void verifyCompileUnits();
 
   /// Module-level verification that all @llvm.experimental.deoptimize
   /// declarations share the same calling convention.
   void verifyDeoptimizeCallingConvs();
 };
void Verifier::visitInstruction(Instruction &I) {
   }
 
   if (MDNode *N = I.getDebugLoc().getAsMDNode()) {
     AssertDI(isa<DILocation>(N), "invalid !dbg metadata attachment", &I, N);
     visitMDNode(*N);
   }
 
   if (auto *DII = dyn_cast<DbgInfoIntrinsic>(&I))
-    verifyBitPieceExpression(*DII);
+    verifyFragmentExpression(*DII);
 
   InstsInThisBlock.insert(&I);
 }
 
 /// Allow intrinsics to be verified in different ways.
 void Verifier::visitIntrinsicCallSite(Intrinsic::ID ID, CallSite CS) {
   Function *IF = CS.getCalledFunction();
   Assert(IF->isDeclaration(), "Intrinsic functions should never be defined!",
while (RawType) {
     // Missing type or size.
     break;
   }
 
   // Fail gracefully.
   return 0;
 }
 
-void Verifier::verifyBitPieceExpression(const DbgInfoIntrinsic &I) {
+void Verifier::verifyFragmentExpression(const DbgInfoIntrinsic &I) {
   DILocalVariable *V;
   DIExpression *E;
   if (auto *DVI = dyn_cast<DbgValueInst>(&I)) {
     V = dyn_cast_or_null<DILocalVariable>(DVI->getRawVariable());
     E = dyn_cast_or_null<DIExpression>(DVI->getRawExpression());
   } else {
     auto *DDI = cast<DbgDeclareInst>(&I);
     V = dyn_cast_or_null<DILocalVariable>(DDI->getRawVariable());
     E = dyn_cast_or_null<DIExpression>(DDI->getRawExpression());
   }
 
   // We don't know whether this intrinsic verified correctly.
   if (!V || !E || !E->isValid())
     return;
 
   // Nothing to do if this isn't a bit piece expression.
-  if (!E->isBitPiece())
+  if (!E->isFragment())
     return;
 
   // The frontend helps out GDB by emitting the members of local anonymous
   // unions as artificial local variables with shared storage. When SROA splits
   // the storage for artificial local variables that are smaller than the entire
   // union, the overhang piece will be outside of the allotted space for the
   // variable and this check fails.
   // FIXME: Remove this check as soon as clang stops doing this; it hides bugs.
   if (V->isArtificial())
     return;
 
   // If there's no size, the type is broken, but that should be checked
   // elsewhere.
   uint64_t VarSize = getVariableSize(*V);
   if (!VarSize)
     return;
 
-  unsigned PieceSize = E->getBitPieceSize();
-  unsigned PieceOffset = E->getBitPieceOffset();
-  AssertDI(PieceSize + PieceOffset <= VarSize,
-         "piece is larger than or outside of variable", &I, V, E);
-  AssertDI(PieceSize != VarSize, "piece covers entire variable", &I, V, E);
+  unsigned FragSize = E->getFragmentSizeInBits();
+  unsigned FragOffset = E->getFragmentOffsetInBits();
+  AssertDI(FragSize + FragOffset <= VarSize,
+         "fragment is larger than or outside of variable", &I, V, E);
+  AssertDI(FragSize != VarSize, "fragment covers entire variable", &I, V, E);
 }
 
 void Verifier::verifyCompileUnits() {
   auto *CUs = M.getNamedMetadata("llvm.dbg.cu");
   SmallPtrSet<const Metadata *, 2> Listed;
   if (CUs)
     Listed.insert(CUs->op_begin(), CUs->op_end());
   AssertDI(

lib/Support/Dwarf.cpp

 StringRef llvm::dwarf::OperationEncodingString(unsigned Encoding) {
   switch (Encoding) {
   default:
     return StringRef();
 #define HANDLE_DW_OP(ID, NAME)                                                 \
   case DW_OP_##NAME:                                                           \
     return "DW_OP_" #NAME;
 #include "llvm/Support/Dwarf.def"
+  case DW_OP_LLVM_fragment:
+    return "DW_OP_LLVM_fragment";
   }
 }
 
 unsigned llvm::dwarf::getOperationEncoding(StringRef OperationEncodingString) {
   return StringSwitch<unsigned>(OperationEncodingString)
 #define HANDLE_DW_OP(ID, NAME) .Case("DW_OP_" #NAME, DW_OP_##NAME)
 #include "llvm/Support/Dwarf.def"
+      .Case("DW_OP_LLVM_fragment", DW_OP_LLVM_fragment)
       .Default(0);
 }
 
 StringRef llvm::dwarf::AttributeEncodingString(unsigned Encoding) {
   switch (Encoding) {
   default:
     return StringRef();
 #define HANDLE_DW_ATE(ID, NAME)                                                \

lib/Transforms/Scalar/SROA.cpp

if (isa<LoadInst>(S.getUse()->getUser()) ||
         isa<StoreInst>(S.getUse()->getUser())) {
       S.makeUnsplittable();
       IsSorted = false;
     }
   }
   if (!IsSorted)
     std::sort(AS.begin(), AS.end());
 
-  /// \brief Describes the allocas introduced by rewritePartition
-  /// in order to migrate the debug info.
-  struct Piece {
+  /// Describes the allocas introduced by rewritePartition in order to migrate
+  /// the debug info.
+  struct Fragment {
     AllocaInst *Alloca;
     uint64_t Offset;
     uint64_t Size;
-    Piece(AllocaInst *AI, uint64_t O, uint64_t S)
+    Fragment(AllocaInst *AI, uint64_t O, uint64_t S)
       : Alloca(AI), Offset(O), Size(S) {}
   };
-  SmallVector<Piece, 4> Pieces;
+  SmallVector<Fragment, 4> Fragments;
 
   // Rewrite each partition.
   for (auto &P : AS.partitions()) {
     if (AllocaInst *NewAI = rewritePartition(AI, AS, P)) {
       Changed = true;
       if (NewAI != &AI) {
         uint64_t SizeOfByte = 8;
         uint64_t AllocaSize = DL.getTypeSizeInBits(NewAI->getAllocatedType());
         // Don't include any padding.
         uint64_t Size = std::min(AllocaSize, P.size() * SizeOfByte);
-        Pieces.push_back(Piece(NewAI, P.beginOffset() * SizeOfByte, Size));
+        Fragments.push_back(Fragment(NewAI, P.beginOffset() * SizeOfByte, Size));
       }
     }
     ++NumPartitions;
   }
 
   NumAllocaPartitions += NumPartitions;
   MaxPartitionsPerAlloca =
       std::max<unsigned>(NumPartitions, MaxPartitionsPerAlloca);
 
   // Migrate debug information from the old alloca to the new alloca(s)
   // and the individual partitions.
   if (DbgDeclareInst *DbgDecl = FindAllocaDbgDeclare(&AI)) {
     auto *Var = DbgDecl->getVariable();
     auto *Expr = DbgDecl->getExpression();
     DIBuilder DIB(*AI.getModule(), /*AllowUnresolved*/ false);
     uint64_t AllocaSize = DL.getTypeSizeInBits(AI.getAllocatedType());
-    for (auto Piece : Pieces) {
-      // Create a piece expression describing the new partition or reuse AI's
+    for (auto Fragment : Fragments) {
+      // Create a fragment expression describing the new partition or reuse AI's
       // expression if there is only one partition.
-      auto *PieceExpr = Expr;
-      if (Piece.Size < AllocaSize || Expr->isBitPiece()) {
+      auto *FragmentExpr = Expr;
+      if (Fragment.Size < AllocaSize || Expr->isFragment()) {
         // If this alloca is already a scalar replacement of a larger aggregate,
-        // Piece.Offset describes the offset inside the scalar.
-        uint64_t Offset = Expr->isBitPiece() ? Expr->getBitPieceOffset() : 0;
-        uint64_t Start = Offset + Piece.Offset;
-        uint64_t Size = Piece.Size;
-        if (Expr->isBitPiece()) {
-          uint64_t AbsEnd = Expr->getBitPieceOffset() + Expr->getBitPieceSize();
+        // Fragment.Offset describes the offset inside the scalar.
+        uint64_t Offset =
+            Expr->isFragment() ? Expr->getFragmentOffsetInBits() : 0;
+        uint64_t Start = Offset + Fragment.Offset;
+        uint64_t Size = Fragment.Size;
+        if (Expr->isFragment()) {
+          uint64_t AbsEnd =
+              Expr->getFragmentOffsetInBits() + Expr->getFragmentSizeInBits();
           if (Start >= AbsEnd)
             // No need to describe a SROAed padding.
             continue;
           Size = std::min(Size, AbsEnd - Start);
         }
-        PieceExpr = DIB.createBitPieceExpression(Start, Size);
+        FragmentExpr = DIB.createFragmentExpression(Start, Size);
       }
 
       // Remove any existing dbg.declare intrinsic describing the same alloca.
-      if (DbgDeclareInst *OldDDI = FindAllocaDbgDeclare(Piece.Alloca))
+      if (DbgDeclareInst *OldDDI = FindAllocaDbgDeclare(Fragment.Alloca))
         OldDDI->eraseFromParent();
 
-      DIB.insertDeclare(Piece.Alloca, Var, PieceExpr, DbgDecl->getDebugLoc(),
-                        &AI);
+      DIB.insertDeclare(Fragment.Alloca, Var, FragmentExpr,
+                        DbgDecl->getDebugLoc(), &AI);
     }
   }
   return Changed;
 }
 
 /// \brief Clobber a use with undef, deleting the used value if it becomes dead.
 void SROA::clobberUse(Use &U) {
   Value *OldV = U;

lib/Transforms/Utils/Local.cpp

void llvm::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI,
   // If an argument is zero extended then use argument directly. The ZExt
   // may be zapped by an optimization pass in future.
   Argument *ExtendedArg = nullptr;
   if (ZExtInst *ZExt = dyn_cast<ZExtInst>(SI->getOperand(0)))
     ExtendedArg = dyn_cast<Argument>(ZExt->getOperand(0));
   if (SExtInst *SExt = dyn_cast<SExtInst>(SI->getOperand(0)))
     ExtendedArg = dyn_cast<Argument>(SExt->getOperand(0));
   if (ExtendedArg) {
-    // We're now only describing a subset of the variable. The piece we're
+    // We're now only describing a subset of the variable. The fragment we're
     // describing will always be smaller than the variable size, because
     // VariableSize == Size of Alloca described by DDI. Since SI stores
     // to the alloca described by DDI, if it's first operand is an extend,
     // we're guaranteed that before extension, the value was narrower than
     // the size of the alloca, hence the size of the described variable.
     SmallVector<uint64_t, 3> Ops;
-    unsigned PieceOffset = 0;
-    // If this already is a bit piece, we drop the bit piece from the expression
-    // and record the offset.
-    if (DIExpr->isBitPiece()) {
+    unsigned FragmentOffset = 0;
+    // If this already is a bit fragment, we drop the bit fragment from the
+    // expression and record the offset.
+    if (DIExpr->isFragment()) {
       Ops.append(DIExpr->elements_begin(), DIExpr->elements_end()-3);
-      PieceOffset = DIExpr->getBitPieceOffset();
+      FragmentOffset = DIExpr->getFragmentOffsetInBits();
     } else {
       Ops.append(DIExpr->elements_begin(), DIExpr->elements_end());
     }
-    Ops.push_back(dwarf::DW_OP_bit_piece);
-    Ops.push_back(PieceOffset); // Offset
+    Ops.push_back(dwarf::DW_OP_LLVM_fragment);
+    Ops.push_back(FragmentOffset);
     const DataLayout &DL = DDI->getModule()->getDataLayout();
-    Ops.push_back(DL.getTypeSizeInBits(ExtendedArg->getType())); // Size
+    Ops.push_back(DL.getTypeSizeInBits(ExtendedArg->getType()));
     auto NewDIExpr = Builder.createExpression(Ops);
     if (!LdStHasDebugValue(DIVar, NewDIExpr, SI))
       Builder.insertDbgValueIntrinsic(ExtendedArg, 0, DIVar, NewDIExpr,
                                       DDI->getDebugLoc(), SI);
   } else if (!LdStHasDebugValue(DIVar, DIExpr, SI))
     Builder.insertDbgValueIntrinsic(SI->getOperand(0), 0, DIVar, DIExpr,
                                     DDI->getDebugLoc(), SI);
 }

test/Assembler/diexpression.ll

 ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
 ; RUN: verify-uselistorder %s
 
 ; CHECK: !named = !{!0, !1, !2, !3, !4}
 !named = !{!0, !1, !2, !3, !4}
 
 ; CHECK:      !0 = !DIExpression()
 ; CHECK-NEXT: !1 = !DIExpression(DW_OP_deref)
 ; CHECK-NEXT: !2 = !DIExpression(DW_OP_plus, 3)
-; CHECK-NEXT: !3 = !DIExpression(DW_OP_bit_piece, 3, 7)
-; CHECK-NEXT: !4 = !DIExpression(DW_OP_deref, DW_OP_plus, 3, DW_OP_bit_piece, 3, 7)
+; CHECK-NEXT: !3 = !DIExpression(DW_OP_LLVM_fragment, 3, 7)
+; CHECK-NEXT: !4 = !DIExpression(DW_OP_deref, DW_OP_plus, 3, DW_OP_LLVM_fragment, 3, 7)
 !0 = !DIExpression()
 !1 = !DIExpression(DW_OP_deref)
 !2 = !DIExpression(DW_OP_plus, 3)
-!3 = !DIExpression(DW_OP_bit_piece, 3, 7)
-!4 = !DIExpression(DW_OP_deref, DW_OP_plus, 3, DW_OP_bit_piece, 3, 7)
+!3 = !DIExpression(DW_OP_LLVM_fragment, 3, 7)
+!4 = !DIExpression(DW_OP_deref, DW_OP_plus, 3, DW_OP_LLVM_fragment, 3, 7)

test/Bitcode/DIExpression-4.0.ll

+; RUN: llvm-dis -o - %s.bc | FileCheck %s
+
+@g = common global i32 0, align 4, !dbg !0
+
+!llvm.dbg.cu = !{!1}
+!llvm.module.flags = !{!7, !8}
+
+!0 = distinct !DIGlobalVariable(name: "g", scope: !1, file: !2, line: 1, type: !5, isLocal: false, isDefinition: true, expr: !6)
+!1 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, producer: "clang (llvm/trunk 288154)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !3, globals: !4)
+!2 = !DIFile(filename: "a.c", directory: "/")
+!3 = !{}
+!4 = !{!0}
+!5 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+; Old-style DIExpression bitcode records using DW_OP_bit_piece should be
+; upgraded to DW_OP_LLVM_fragment.
+;
+; CHECK: !DIExpression(DW_OP_LLVM_fragment, 8, 32)
+!6 = !DIExpression(DW_OP_bit_piece, 8, 32)
+!7 = !{i32 2, !"Dwarf Version", i32 4}
+!8 = !{i32 2, !"Debug Info Version", i32 3}

test/CodeGen/X86/bit-piece-comment.ll

 !13 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
 !14 = !{!15}
 !15 = !DISubrange(count: 2)
 !16 = !{i32 2, !"Dwarf Version", i32 4}
 !17 = !{i32 2, !"Debug Info Version", i32 3}
 !18 = !{!"clang version 3.8.0 (trunk 256088) (llvm/trunk 256097)"}
 !19 = !DIExpression()
 !20 = !DILocation(line: 4, column: 5, scope: !4)
-!21 = !DIExpression(DW_OP_bit_piece, 32, 32)
+!21 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 !22 = !DILocation(line: 6, column: 1, scope: !4)

test/DebugInfo/AArch64/frameindices.ll

 !68 = !DILocation(line: 14, column: 14, scope: !25, inlinedAt: !66)
 !69 = !DILocation(line: 14, column: 5, scope: !25, inlinedAt: !66)
 !70 = !DILocation(line: 15, column: 6, scope: !25, inlinedAt: !66)
 !71 = !DILocation(line: 15, column: 3, scope: !25, inlinedAt: !66)
 !72 = !DILocation(line: 16, column: 1, scope: !25, inlinedAt: !66)
 !73 = !DILocation(line: 17, column: 27, scope: !31)
 !74 = !DILocalVariable(name: "p1", line: 17, arg: 1, scope: !31, file: !26, type: !4)
 !75 = distinct !DILocation(line: 22, column: 3, scope: !34)
-!76 = !DIExpression(DW_OP_bit_piece, 8, 120)
+!76 = !DIExpression(DW_OP_LLVM_fragment, 8, 120)
 !77 = !DILocation(line: 17, column: 12, scope: !31, inlinedAt: !75)
-!78 = !DIExpression(DW_OP_bit_piece, 136, 56)
+!78 = !DIExpression(DW_OP_LLVM_fragment, 136, 56)
 !79 = !DIExpression(DW_OP_deref)
 !80 = !DILocation(line: 19, column: 5, scope: !34)
 !81 = !DILocation(line: 20, column: 7, scope: !34)
 !82 = !DILocation(line: 20, column: 5, scope: !34)
-!83 = !DIExpression(DW_OP_bit_piece, 0, 8)
-!84 = !DIExpression(DW_OP_bit_piece, 128, 8)
+!83 = !DIExpression(DW_OP_LLVM_fragment, 0, 8)
+!84 = !DIExpression(DW_OP_LLVM_fragment, 128, 8)
 !85 = !DILocation(line: 13, column: 12, scope: !25, inlinedAt: !86)
 !86 = distinct !DILocation(line: 17, column: 18, scope: !31, inlinedAt: !75)
 !87 = !DILocation(line: 14, column: 37, scope: !25, inlinedAt: !86)
 !88 = !DILocation(line: 14, column: 14, scope: !25, inlinedAt: !86)
 !89 = !DILocation(line: 22, column: 7, scope: !34)
 !90 = !DILocation(line: 14, column: 5, scope: !25, inlinedAt: !86)
 !91 = !DILocation(line: 15, column: 6, scope: !25, inlinedAt: !86)
 !92 = !DILocation(line: 15, column: 3, scope: !25, inlinedAt: !86)
 !93 = !DILocation(line: 16, column: 1, scope: !25, inlinedAt: !86)
 !94 = !DILocation(line: 23, column: 1, scope: !34)

test/DebugInfo/ARM/PR26163.ll

 !22 = !{i32 2, !"Debug Info Version", i32 3}
 !23 = !{i32 1, !"wchar_size", i32 4}
 !24 = !{i32 1, !"min_enum_size", i32 4}
 !25 = !{!"clang version 3.9.0 (https://github.com/llvm-mirror/clang 89dda3855cda574f355e6defa1d77bdae5053994) (llvm/trunk 257891)"}
 !26 = !DIExpression()
 !27 = !DILocation(line: 11, scope: !11, inlinedAt: !28)
 !28 = distinct !DILocation(line: 26, scope: !4)
 !29 = !DILocation(line: 13, scope: !11, inlinedAt: !28)
-!30 = !DIExpression(DW_OP_bit_piece, 0, 64)
-!31 = !DIExpression(DW_OP_bit_piece, 0, 32)
+!30 = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
+!31 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 !32 = !DILocation(line: 18, scope: !11, inlinedAt: !28)
 !33 = !DILocation(line: 27, scope: !4)

test/DebugInfo/ARM/split-complex.ll

 !9 = !{i32 2, !"Dwarf Version", i32 2}
 !10 = !{i32 2, !"Debug Info Version", i32 3}
 !11 = !{i32 1, !"wchar_size", i32 4}
 !12 = !{i32 1, !"min_enum_size", i32 4}
 !13 = !{!"clang version 3.9.0 (trunk 259998) (llvm/trunk 259999)"}
 !14 = !DILocalVariable(name: "c", arg: 1, scope: !4, file: !5, line: 1, type: !8)
 !15 = !DIExpression()
 !16 = !DILocation(line: 1, column: 24, scope: !4)
-!17 = !DIExpression(DW_OP_bit_piece, 0, 64)
-!18 = !DIExpression(DW_OP_bit_piece, 64, 64)
+!17 = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
+!18 = !DIExpression(DW_OP_LLVM_fragment, 64, 64)
 !19 = !DILocation(line: 1, column: 36, scope: !4)

test/DebugInfo/ARM/sroa-complex.ll

entry:
   ; Test that debug info for both values survives:
   ; CHECK: call void @llvm.dbg.value(metadata i64 0, i64 0,
   ; CHECK-SAME:                      metadata ![[C:.*]], metadata ![[REAL:.*]])
   store double 0.000000e+00, double* %c.imagp, align 8, !dbg !17
   ; CHECK: call void @llvm.dbg.value(metadata i64 0, i64 0,
   ; CHECK-SAME:                      metadata ![[C]], metadata ![[IMG:.*]])
   ret void, !dbg !18
 }
-; CHECK: ![[REAL]] = !DIExpression(DW_OP_bit_piece, 0, 64)
-; CHECK: ![[IMG]] = !DIExpression(DW_OP_bit_piece, 64, 64)
+; CHECK: ![[REAL]] = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
+; CHECK: ![[IMG]] = !DIExpression(DW_OP_LLVM_fragment, 64, 64)
 
 ; Function Attrs: nounwind readnone
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
 
 attributes #0 = { nounwind }
 attributes #1 = { nounwind readnone }
 
 !llvm.dbg.cu = !{!0}

test/DebugInfo/COFF/pieces.ll

 ; }
 ;
 ; int nested(struct Nested o) {
 ;   struct PadLeft p = o.a[1];
 ;   return p.b;
 ; }
 
 ; ASM-LABEL: loop_csr: # @loop_csr
-; ASM:        #DEBUG_VALUE: loop_csr:o [bit_piece offset=0 size=32] <- 0
-; ASM:        #DEBUG_VALUE: loop_csr:o [bit_piece offset=32 size=32] <- 0
+; ASM:        #DEBUG_VALUE: loop_csr:o [fragment offset=0 size=32] <- 0
+; ASM:        #DEBUG_VALUE: loop_csr:o [fragment offset=32 size=32] <- 0
 ; ASM: # BB#2:                                 # %for.body.preheader
 ; ASM:         xorl    %edi, %edi
 ; ASM:         xorl    %esi, %esi
 ; ASM:         .p2align        4, 0x90
 ; ASM: .LBB0_3:                                # %for.body
 ; ASM: [[ox_start:\.Ltmp[0-9]+]]:
-; ASM:        #DEBUG_VALUE: loop_csr:o [bit_piece offset=0 size=32] <- %EDI
+; ASM:        #DEBUG_VALUE: loop_csr:o [fragment offset=0 size=32] <- %EDI
 ; ASM:        .cv_loc 0 1 13 11               # t.c:13:11
 ; ASM:        movl    %edi, %ecx
 ; ASM:        callq   g
 ; ASM:        movl    %eax, %edi
 ; ASM: [[oy_start:\.Ltmp[0-9]+]]:
-; ASM:         #DEBUG_VALUE: loop_csr:o [bit_piece offset=0 size=32] <- %EDI
-; ASM:         #DEBUG_VALUE: loop_csr:o [bit_piece offset=32 size=32] <- %ESI
+; ASM:         #DEBUG_VALUE: loop_csr:o [fragment offset=0 size=32] <- %EDI
+; ASM:         #DEBUG_VALUE: loop_csr:o [fragment offset=32 size=32] <- %ESI
 ; ASM:         .cv_loc 0 1 14 11               # t.c:14:11
 ; ASM:         movl    %esi, %ecx
 ; ASM:         callq   g
 ; ASM:         movl    %eax, %esi
-; ASM:         #DEBUG_VALUE: loop_csr:o [bit_piece offset=32 size=32] <- %ESI
+; ASM:         #DEBUG_VALUE: loop_csr:o [fragment offset=32 size=32] <- %ESI
 ; ASM:         cmpl    n(%rip), %eax
 ; ASM:         jl      .LBB0_3
 ; ASM: [[oy_end:\.Ltmp[0-9]+]]:
 ; ASM:         addl    %edi, %esi
 ; ASM:         movl    %esi, %eax
 
 
 ; ASM-LABEL: pad_right: # @pad_right
-; ASM:         #DEBUG_VALUE: pad_right:o [bit_piece offset=32 size=32] <- %ECX
+; ASM:         #DEBUG_VALUE: pad_right:o [fragment offset=32 size=32] <- %ECX
 ; ASM:         movl    %ecx, %eax
 ; ASM:         retq
 
 
 ; ASM-LABEL: pad_left: # @pad_left
-; ASM:         #DEBUG_VALUE: pad_left:o [bit_piece offset=0 size=32] <- %ECX
+; ASM:         #DEBUG_VALUE: pad_left:o [fragment offset=0 size=32] <- %ECX
 ; ASM:         .cv_loc 2 1 24 3                # t.c:24:3
 ; ASM:         movl    %ecx, %eax
 ; ASM:         retq
 
 
 ; ASM-LABEL: nested: # @nested
 ; ASM:         #DEBUG_VALUE: nested:o <- [%RCX+0]
 ; ASM:         movl    12(%rcx), %eax
 ; ASM: [[p_start:\.Ltmp[0-9]+]]:
-; ASM:         #DEBUG_VALUE: nested:p [bit_piece offset=32 size=32] <- %EAX
+; ASM:         #DEBUG_VALUE: nested:p [fragment offset=32 size=32] <- %EAX
 ; ASM:         retq
 
 ; ASM-LABEL: bitpiece_spill: # @bitpiece_spill
-; ASM:         #DEBUG_VALUE: bitpiece_spill:o [bit_piece offset=0 size=32] <- 0
+; ASM:         #DEBUG_VALUE: bitpiece_spill:o [fragment offset=0 size=32] <- 0
 ; ASM:         xorl    %ecx, %ecx
 ; ASM:         callq   g
 ; ASM:         movl    %eax, [[offset_o_x:[0-9]+]](%rsp)          # 4-byte Spill
 ; ASM: [[spill_o_x_start:\.Ltmp[0-9]+]]:
-; ASM:         #DEBUG_VALUE: bitpiece_spill:o [bit_piece offset=32 size=32] <- [%RSP+[[offset_o_x]]]
+; ASM:         #DEBUG_VALUE: bitpiece_spill:o [fragment offset=32 size=32] <- [%RSP+[[offset_o_x]]]
 ; ASM:         #APP
 ; ASM:         #NO_APP
 ; ASM:         movl    [[offset_o_x]](%rsp), %eax          # 4-byte Reload
 ; ASM: [[spill_o_x_end:\.Ltmp[0-9]+]]:
 ; ASM:         retq
 
 
 ; ASM-LABEL:  .short  4423                    # Record kind: S_GPROC32_ID

 !11 = !{!12}
 !12 = !DILocalVariable(name: "o", scope: !7, file: !1, line: 11, type: !13)
 !13 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "IntPair", file: !1, line: 1, size: 64, align: 32, elements: !14)
 !14 = !{!15, !16}
 !15 = !DIDerivedType(tag: DW_TAG_member, name: "x", scope: !13, file: !1, line: 1, baseType: !10, size: 32, align: 32)
 !16 = !DIDerivedType(tag: DW_TAG_member, name: "y", scope: !13, file: !1, line: 1, baseType: !10, size: 32, align: 32, offset: 32)
 !17 = !DIExpression()
 !18 = !DILocation(line: 11, column: 18, scope: !7)
-!19 = !DIExpression(DW_OP_bit_piece, 0, 32)
-!20 = !DIExpression(DW_OP_bit_piece, 32, 32)
+!19 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+!20 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 !21 = !DILocation(line: 12, column: 23, scope: !22)
 !22 = distinct !DILexicalBlock(scope: !23, file: !1, line: 12, column: 3)
 !23 = distinct !DILexicalBlock(scope: !7, file: !1, line: 12, column: 3)
 !24 = !{!25, !25, i64 0}
 !25 = !{!"int", !26, i64 0}
 !26 = !{!"omnipotent char", !27, i64 0}
 !27 = !{!"Simple C/C++ TBAA"}
 !28 = !DILocation(line: 12, column: 19, scope: !22)

test/DebugInfo/Generic/piece-verifier.ll

 !16 = !DILocalVariable(name: "s", line: 3, arg: 1, scope: !4, file: !5, type: !9)
 !17 = !{i32 2, !"Dwarf Version", i32 4}
 !18 = !{i32 1, !"Debug Info Version", i32 3}
 !19 = !{!"clang version 3.5 "}
 !20 = !DILocalVariable(name: "s", line: 3, arg: 1, scope: !4, file: !5, type: !9)
 !21 = !DILocation(line: 3, scope: !4)
 !22 = !DILocalVariable(name: "s", line: 3, arg: 1, scope: !4, file: !5, type: !9)
 !23 = !DILocation(line: 4, scope: !4)
-!24 = !DIExpression(DW_OP_deref, DW_OP_bit_piece, 0, 64)
+!24 = !DIExpression(DW_OP_deref, DW_OP_LLVM_fragment, 0, 64)
 !25 = !{}
-; This expression has elements after DW_OP_bit_piece.
+; This expression has elements after DW_OP_LLVM_fragment.
 ; CHECK: invalid expression
 ; CHECK-NEXT: !DIExpression({{[0-9]+}}, 64, 32, {{[0-9]+}})
 ; CHECK-NOT: invalid expression
-!27 = !DIExpression(DW_OP_bit_piece, 64, 32, DW_OP_deref)
+!27 = !DIExpression(DW_OP_LLVM_fragment, 64, 32, DW_OP_deref)

test/DebugInfo/X86/PR26148.ll

 !22 = !{i32 2, !"Dwarf Version", i32 2}
 !23 = !{i32 2, !"Debug Info Version", i32 3}
 !24 = !{i32 1, !"PIC Level", i32 2}
 !25 = !{!"clang version 3.9.0 (https://github.com/llvm-mirror/clang 8f258397c5afd7a708bd95770c718e81d08fb11a) (https://github.com/llvm-mirror/llvm 18481855bdfa1b4a424f81be8525db002671348d)"}
 !26 = !DIExpression()
 !27 = !DILocation(line: 5, column: 16, scope: !4)
 !28 = !DILocation(line: 6, column: 13, scope: !4)
 !29 = !DILocation(line: 6, column: 16, scope: !4)
-!30 = !DIExpression(DW_OP_bit_piece, 0, 32)
-!31 = !DIExpression(DW_OP_bit_piece, 32, 32)
-!32 = !DIExpression(DW_OP_bit_piece, 32, 16)
+!30 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+!31 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
+!32 = !DIExpression(DW_OP_LLVM_fragment, 32, 16)
 !33 = !DILocation(line: 8, column: 9, scope: !4)
 !34 = !DILocation(line: 9, column: 1, scope: !4)
 !35 = !DILocation(line: 11, column: 14, scope: !17)

test/DebugInfo/X86/array2.ll

 ; }
 ;
 ; RUN: opt %s -O2 -S -o - | FileCheck %s
 ; Test that we correctly lower dbg.declares for arrays.
 ;
 ; CHECK: define i32 @main
 ; CHECK: call void @llvm.dbg.value(metadata i32 42, i64 0, metadata ![[ARRAY:[0-9]+]], metadata ![[EXPR:[0-9]+]])
 ; CHECK: ![[ARRAY]] = !DILocalVariable(name: "array",{{.*}} line: 6
-; CHECK: ![[EXPR]] = !DIExpression(DW_OP_bit_piece, 0, 32)
+; CHECK: ![[EXPR]] = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"
 
 @main.array = private unnamed_addr constant [4 x i32] [i32 0, i32 1, i32 2, i32 3], align 16
 
 ; Function Attrs: nounwind ssp uwtable
 define void @f(i32* %p) #0 !dbg !4 {
 entry:

test/DebugInfo/X86/deleted-bit-piece.ll

 !7 = !{!8, !10}
 !8 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !6, baseType: !9, size: 32, align: 32)
 !9 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
 !10 = !DIDerivedType(tag: DW_TAG_member, name: "b", scope: !6, baseType: !9, size: 32, align: 32)
 !12 = distinct !DISubprogram(name: "foo", scope: null, file: !3, type: !13, isLocal: false, isDefinition: true, isOptimized: false, unit: !2)
 !13 = !DISubroutineType(types: !14)
 !14 = !{null}
 !15 = !DILocalVariable(name: "v", scope: !12, type: !6)
-!16 = !DIExpression(DW_OP_bit_piece, 32, 32)
+!16 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 !17 = !DILocation(line: 2755, column: 9, scope: !12)

test/DebugInfo/X86/nophysreg.ll

 !25 = !DIBasicType(tag: DW_TAG_base_type, name: "char", size: 8, align: 8, encoding: DW_ATE_signed_char)
 !26 = !DILocalVariable(name: "j", line: 19, scope: !24, file: !12, type: !25)
 !27 = !DILocalVariable(name: "I", line: 21, scope: !24, file: !12, type: !25)
 !28 = !DILocalVariable(name: "g", line: 24, scope: !24, file: !12, type: !4)
 !29 = !{i32 2, !"Dwarf Version", i32 2}
 !30 = !{i32 2, !"Debug Info Version", i32 3}
 !31 = !{i32 1, !"PIC Level", i32 2}
 !32 = !{!"clang version 3.7.0 (trunk 227088) (llvm/trunk 227091)"}
-!33 = !DIExpression(DW_OP_bit_piece, 0, 8)
+!33 = !DIExpression(DW_OP_LLVM_fragment, 0, 8)
 !34 = !DILocation(line: 7, column: 42, scope: !11)
-!35 = !DIExpression(DW_OP_bit_piece, 8, 4)
+!35 = !DIExpression(DW_OP_LLVM_fragment, 8, 4)
 !36 = !DIExpression()
 !37 = !DILocation(line: 7, column: 48, scope: !11)
 !38 = !DILocation(line: 7, column: 66, scope: !11)
 !39 = !DILocation(line: 13, column: 10, scope: !17)
 !40 = !DILocation(line: 13, column: 3, scope: !17)
 !41 = !DILocation(line: 15, column: 13, scope: !22)
 !42 = !{!43, !43, i64 0}
 !43 = !{!"int", !44, i64 0}

test/DebugInfo/X86/pieces-1.ll

 !16 = !DILocalVariable(name: "s", line: 3, arg: 1, scope: !4, file: !5, type: !9)
 !17 = !{i32 2, !"Dwarf Version", i32 4}
 !18 = !{i32 1, !"Debug Info Version", i32 3}
 !19 = !{!"clang version 3.5 "}
 !20 = !DILocalVariable(name: "s", line: 3, arg: 1, scope: !4, file: !5, type: !9)
 !21 = !DILocation(line: 3, scope: !4)
 !22 = !DILocalVariable(name: "s", line: 3, arg: 1, scope: !4, file: !5, type: !9)
 !23 = !DILocation(line: 4, scope: !4)
-!24 = !DIExpression(DW_OP_bit_piece, 0, 64)
+!24 = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
 !25 = !{}
-!27 = !DIExpression(DW_OP_bit_piece, 64, 32)
+!27 = !DIExpression(DW_OP_LLVM_fragment, 64, 32)

test/DebugInfo/X86/pieces-2.ll

 !21 = !DISubrange(count: 2)
 !22 = !{i32 2, !"Dwarf Version", i32 2}
 !23 = !{i32 1, !"Debug Info Version", i32 3}
 !24 = !{!"clang version 3.5.0 "}
 !25 = !DILocalVariable(name: "outer", line: 10, arg: 1, scope: !4, file: !5, type: !9)
 !26 = !DILocation(line: 10, scope: !4)
 !27 = !DILocation(line: 11, scope: !4)
 !28 = !DILocalVariable(name: "i1", line: 11, scope: !4, file: !5, type: !14)
-!29 = !DIExpression(DW_OP_bit_piece, 0, 32)
+!29 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 !31 = !{i32 3, i32 0, i32 12}
 !32 = !DILocation(line: 12, scope: !4)

test/DebugInfo/X86/pieces-3.ll

 !17 = !DIDerivedType(tag: DW_TAG_member, name: "a", line: 2, size: 32, align: 32, file: !1, scope: !15, baseType: !8)
 !18 = !DIDerivedType(tag: DW_TAG_member, name: "b", line: 3, size: 32, align: 32, offset: 32, file: !1, scope: !15, baseType: !8)
 !19 = !{!20}
 !20 = !DISubrange(count: 2)
 !21 = !{i32 2, !"Dwarf Version", i32 2}
 !22 = !{i32 1, !"Debug Info Version", i32 3}
 !23 = !{!"clang version 3.5.0 "}
 !24 = !DILocalVariable(name: "outer", line: 10, arg: 1, scope: !4, file: !5, type: !9)
-!25 = !DIExpression(DW_OP_bit_piece, 0, 64)
+!25 = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
 !26 = !DILocation(line: 10, scope: !4)
 !27 = !DILocalVariable(name: "outer", line: 10, arg: 1, scope: !4, file: !5, type: !9)
-!28 = !DIExpression(DW_OP_bit_piece, 64, 64)
+!28 = !DIExpression(DW_OP_LLVM_fragment, 64, 64)
 !29 = !DILocalVariable(name: "outer", line: 10, arg: 1, scope: !4, file: !5, type: !9)
-!30 = !DIExpression(DW_OP_bit_piece, 96, 32)
+!30 = !DIExpression(DW_OP_LLVM_fragment, 96, 32)
 !31 = !DILocalVariable(name: "outer", line: 10, arg: 1, scope: !4, file: !5, type: !9)
-!32 = !DIExpression(DW_OP_bit_piece, 64, 32)
+!32 = !DIExpression(DW_OP_LLVM_fragment, 64, 32)
 !33 = !DILocation(line: 11, scope: !4)
 !34 = !DILocalVariable(name: "i1", line: 11, scope: !4, file: !5, type: !14)
-!35 = !DIExpression(DW_OP_bit_piece, 0, 32)
+!35 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 !36 = !DILocation(line: 12, scope: !4)

test/DebugInfo/X86/pieces-4.ll

 ;   asm volatile("" : : : "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp",
 ;                "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15");
 ;   return o.x;
 ; }
 
 ; CHECK-LABEL: bitpiece_spill:                         # @bitpiece_spill
 ; CHECK:               callq   g
 ; CHECK:               movl    %eax, [[offs:[0-9]+]](%rsp)          # 4-byte Spill
-; CHECK:               #DEBUG_VALUE: bitpiece_spill:o [bit_piece offset=32 size=32] <- 0
-; CHECK:               #DEBUG_VALUE: bitpiece_spill:o [bit_piece offset=0 size=32] <- [%RSP+[[offs]]]
+; CHECK:               #DEBUG_VALUE: bitpiece_spill:o [fragment offset=32 size=32] <- 0
+; CHECK:               #DEBUG_VALUE: bitpiece_spill:o [fragment offset=0 size=32] <- [%RSP+[[offs]]]
 ; CHECK:               #APP
 ; CHECK:               #NO_APP
 ; CHECK:               movl    [[offs]](%rsp), %eax          # 4-byte Reload
 ; CHECK:               retq
 
 ; ModuleID = 't.c'
 source_filename = "t.c"
 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"

 !12 = !DILocalVariable(name: "o", scope: !7, file: !1, line: 4, type: !13)
 !13 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "IntPair", file: !1, line: 1, size: 64, align: 32, elements: !14)
 !14 = !{!15, !16}
 !15 = !DIDerivedType(tag: DW_TAG_member, name: "x", scope: !13, file: !1, line: 1, baseType: !10, size: 32, align: 32)
 !16 = !DIDerivedType(tag: DW_TAG_member, name: "y", scope: !13, file: !1, line: 1, baseType: !10, size: 32, align: 32, offset: 32)
 !17 = !DIExpression()
 !18 = !DILocation(line: 4, column: 18, scope: !7)
 !19 = !DILocation(line: 4, column: 23, scope: !7)
-!20 = !DIExpression(DW_OP_bit_piece, 0, 32)
-!21 = !DIExpression(DW_OP_bit_piece, 32, 32)
+!20 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+!21 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 !22 = !DILocation(line: 6, column: 3, scope: !7)
 !23 = !{i32 138}
 !24 = !DILocation(line: 8, column: 3, scope: !7)

test/DebugInfo/X86/sroasplit-1.ll

 
 ; Verify that SROA creates a variable piece when splitting i1.
 ; CHECK: %[[I1:.*]] = alloca [12 x i8], align 4
 ; CHECK: call void @llvm.dbg.declare(metadata [12 x i8]* %[[I1]], metadata ![[VAR:[0-9]+]], metadata ![[PIECE1:[0-9]+]])
 ; CHECK: call void @llvm.dbg.value(metadata i32 %[[A:.*]], i64 0, metadata ![[VAR]], metadata ![[PIECE2:[0-9]+]])
 ; CHECK: ret i32 %[[A]]
 ; Read Var and Piece:
 ; CHECK: ![[VAR]] = !DILocalVariable(name: "i1",{{.*}} line: 11,
-; CHECK: ![[PIECE1]] = !DIExpression(DW_OP_bit_piece, 32, 96)
-; CHECK: ![[PIECE2]] = !DIExpression(DW_OP_bit_piece, 0, 32)
+; CHECK: ![[PIECE1]] = !DIExpression(DW_OP_LLVM_fragment, 32, 96)
+; CHECK: ![[PIECE2]] = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"
 
 %struct.Outer = type { [2 x %struct.Inner] }
 %struct.Inner = type { i32, i64 }
 
 ; Function Attrs: nounwind ssp uwtable

test/DebugInfo/X86/sroasplit-2.ll

 ;    }
 ;
 
 ; Verify that SROA creates a variable piece when splitting i1.
 ; CHECK:  call void @llvm.dbg.value(metadata i64 %outer.coerce0, i64 0, metadata ![[O:[0-9]+]], metadata ![[PIECE1:[0-9]+]]),
 ; CHECK:  call void @llvm.dbg.value(metadata i64 %outer.coerce1, i64 0, metadata ![[O]], metadata ![[PIECE2:[0-9]+]]),
 ; CHECK:  call void @llvm.dbg.value({{.*}}, i64 0, metadata ![[I1:[0-9]+]], metadata ![[PIECE3:[0-9]+]]),
 ; CHECK-DAG: ![[O]] = !DILocalVariable(name: "outer",{{.*}} line: 10
-; CHECK-DAG: ![[PIECE1]] = !DIExpression(DW_OP_bit_piece, 0, 64)
-; CHECK-DAG: ![[PIECE2]] = !DIExpression(DW_OP_bit_piece, 64, 64)
+; CHECK-DAG: ![[PIECE1]] = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
+; CHECK-DAG: ![[PIECE2]] = !DIExpression(DW_OP_LLVM_fragment, 64, 64)
 ; CHECK-DAG: ![[I1]] = !DILocalVariable(name: "i1",{{.*}} line: 11
-; CHECK-DAG: ![[PIECE3]] = !DIExpression(DW_OP_bit_piece, 0, 32)
+; CHECK-DAG: ![[PIECE3]] = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 
 ; ModuleID = 'sroasplit-2.c'
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.9.0"
 
 %struct.Outer = type { [2 x %struct.Inner] }
 %struct.Inner = type { i32, i32 }
 

test/DebugInfo/X86/sroasplit-3.ll

 ; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
 ; ModuleID = 'test.c'
 ; Test that SROA updates the debug info correctly if an alloca was rewritten but
 ; not partitioned into multiple allocas.
 ;
 ; CHECK: call void @llvm.dbg.value(metadata float %s.coerce, i64 0, metadata ![[VAR:[0-9]+]], metadata ![[EXPR:[0-9]+]])
 ; CHECK: ![[VAR]] = !DILocalVariable(name: "s",{{.*}} line: 3,
 ; CHECK: ![[EXPR]] = !DIExpression(
-; CHECK-NOT:                       DW_OP_bit_piece
+; CHECK-NOT:                       DW_OP_LLVM_fragment
 
 ;
 ; struct S { float f; };
 ;  
 ; float foo(struct S s) {
 ;   return s.f;
 ; }
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"

test/DebugInfo/X86/sroasplit-4.ll

 ; RUN: opt -sroa < %s -S -o - | FileCheck %s
 ;
 ; Test that recursively splitting an alloca updates the debug info correctly.
 ; CHECK: %[[T:.*]] = load i64, i64* @t, align 8
 ; CHECK: call void @llvm.dbg.value(metadata i64 %[[T]], i64 0, metadata ![[Y:.*]], metadata ![[P1:.*]])
 ; CHECK: %[[T1:.*]] = load i64, i64* @t, align 8
 ; CHECK: call void @llvm.dbg.value(metadata i64 %[[T1]], i64 0, metadata ![[Y]], metadata ![[P2:.*]])
 ; CHECK: call void @llvm.dbg.value(metadata i64 %[[T]], i64 0, metadata ![[R:.*]], metadata ![[P3:.*]])
 ; CHECK: call void @llvm.dbg.value(metadata i64 %[[T1]], i64 0, metadata ![[R]], metadata ![[P4:.*]])
-; CHECK: ![[P1]] = !DIExpression(DW_OP_bit_piece, 0, 64)
-; CHECK: ![[P2]] = !DIExpression(DW_OP_bit_piece, 64, 64)
-; CHECK: ![[P3]] = !DIExpression(DW_OP_bit_piece, 192, 64)
-; CHECK: ![[P4]] = !DIExpression(DW_OP_bit_piece, 256, 64)
+; CHECK: ![[P1]] = !DIExpression(DW_OP_LLVM_fragment, 0, 64)
+; CHECK: ![[P2]] = !DIExpression(DW_OP_LLVM_fragment, 64, 64)
+; CHECK: ![[P3]] = !DIExpression(DW_OP_LLVM_fragment, 192, 64)
+; CHECK: ![[P4]] = !DIExpression(DW_OP_LLVM_fragment, 256, 64)
 ; 
 ; struct p {
 ;   __SIZE_TYPE__ s;
 ;   __SIZE_TYPE__ t;
 ; };
 ;  
 ; struct r {
 ;   int i;

test/DebugInfo/X86/sroasplit-5.ll

 ; }
 ; ModuleID = 'pr22495.c'
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
 ; When SROA is creating new smaller allocas, it may add padding.
 ;
 ; There should be no debug info for the padding.
-; CHECK-NOT: DW_OP_bit_piece, 56
-; CHECK: DIExpression(DW_OP_bit_piece, 32, 24)
-; CHECK-NOT: DW_OP_bit_piece, 56
-; CHECK: DIExpression(DW_OP_bit_piece, 0, 32)
-; CHECK-NOT: DW_OP_bit_piece, 56
+; CHECK-NOT: DW_OP_LLVM_fragment, 56
+; CHECK: DIExpression(DW_OP_LLVM_fragment, 32, 24)
+; CHECK-NOT: DW_OP_LLVM_fragment, 56
+; CHECK: DIExpression(DW_OP_LLVM_fragment, 0, 32)
+; CHECK-NOT: DW_OP_LLVM_fragment, 56
 %struct.prog_src_register = type { i32, i24 }
 
 ; Function Attrs: nounwind
 define i64 @src_reg_for_float() #0 !dbg !4 {
 entry:
   %retval = alloca %struct.prog_src_register, align 4
   %a = alloca %struct.prog_src_register, align 4
   %local = alloca i32, align 4

test/DebugInfo/X86/stack-value-piece.ll

 !12 = !{!13, !15}
 !13 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !11, file: !1, line: 1, baseType: !14, size: 32)
 !14 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
 !15 = !DIDerivedType(tag: DW_TAG_member, name: "b", scope: !11, file: !1, line: 1, baseType: !14, size: 32, offset: 32)
 !18 = !DILocalVariable(name: "r", scope: !7, file: !1, line: 3, type: !10)
 !19 = !DIExpression()
 !20 = !DILocation(line: 2, column: 9, scope: !7)
 !21 = !DILocation(line: 3, column: 5, scope: !7)
-!22 = !DIExpression(DW_OP_bit_piece, 0, 32)
-!23 = !DIExpression(DW_OP_bit_piece, 32, 32)
+!22 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+!23 = !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 !24 = !DILocation(line: 5, column: 1, scope: !7)
 !25 = distinct !DISubprogram(name: "f", scope: !1, file: !1, line: 8, type: !26, isLocal: false, isDefinition: true, scopeLine: 8, flags: DIFlagPrototyped, isOptimized: true, unit: !0)
 !26 = !DISubroutineType(types: !27)
 !27 = !{!28, !32}
 !28 = !DIDerivedType(tag: DW_TAG_typedef, name: "F", file: !1, line: 7, baseType: !29)
 !29 = distinct !DICompositeType(tag: DW_TAG_structure_type, file: !1, line: 7, size: 64, elements: !30)
 !30 = !{!31, !33}
 !31 = !DIDerivedType(tag: DW_TAG_member, name: "a", scope: !29, file: !1, line: 7, baseType: !32, size: 32)
 !32 = !DIBasicType(name: "float", size: 32, encoding: DW_ATE_float)
 !33 = !DIDerivedType(tag: DW_TAG_member, name: "b", scope: !29, file: !1, line: 7, baseType: !32, size: 32, offset: 32)
 !36 = !DILocalVariable(name: "r", scope: !25, file: !1, line: 9, type: !28)
 !37 = !DILocation(line: 8, column: 11, scope: !25)
 !38 = !DILocation(line: 9, column: 5, scope: !25)
 !39 = !DILocation(line: 10, column: 10, scope: !25)
 !40 = !DILocation(line: 11, column: 1, scope: !25)

test/Transforms/Inline/alloca-dbgdeclare.ll

 !40 = !DILocation(line: 7, scope: !15)
 !41 = !DILocation(line: 8, scope: !34)
 !42 = !{i64 0, i64 4, !43, i64 8, i64 16, !44}
 !43 = !{!37, !37, i64 0}
 !44 = !{!38, !38, i64 0}
 !45 = !DILocation(line: 9, scope: !15)
 !46 = !DILocalVariable(name: "p1", line: 6, arg: 1, scope: !15, file: !16, type: !4)
 !47 = distinct !DILocation(line: 11, scope: !21)
-!48 = !DIExpression(DW_OP_bit_piece, 32, 160)
+!48 = !DIExpression(DW_OP_LLVM_fragment, 32, 160)
 !49 = !DILocation(line: 6, scope: !15, inlinedAt: !47)
 !50 = !DILocation(line: 11, scope: !21)
-!51 = !DIExpression(DW_OP_bit_piece, 0, 32)
+!51 = !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 !52 = !DILocation(line: 7, scope: !34, inlinedAt: !47)
 !53 = !DILocation(line: 7, scope: !15, inlinedAt: !47)
 !54 = !DILocation(line: 8, scope: !34, inlinedAt: !47)
 !55 = !DILocation(line: 14, scope: !24)
 !56 = !DILocation(line: 15, scope: !24)

test/Transforms/SROA/dbg-single-piece.ll

 ; RUN: opt -sroa %s -S | FileCheck %s
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 
 %foo = type { [8 x i8], [8 x i8] }
 
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
 define void @_ZL18findInsertLocationPN4llvm17MachineBasicBlockENS_9SlotIndexERNS_13LiveIntervalsE() {
 entry:
   %retval = alloca %foo, align 8
   call void @llvm.dbg.declare(metadata %foo* %retval, metadata !1, metadata !7), !dbg !8
 ; Checks that SROA still inserts a bit_piece expression, even if it produces only one piece
 ; (as long as that piece is smaller than the whole thing)
 ; CHECK-NOT: call void @llvm.dbg.value
 ; CHECK: call void @llvm.dbg.value(metadata %foo* undef, i64 0, {{.*}}, metadata ![[BIT_PIECE:[0-9]+]]), !dbg
 ; CHECK-NOT: call void @llvm.dbg.value
-; CHECK: ![[BIT_PIECE]] = !DIExpression(DW_OP_bit_piece, 64, 64)
+; CHECK: ![[BIT_PIECE]] = !DIExpression(DW_OP_LLVM_fragment, 64, 64)
   %0 = bitcast %foo* %retval to i8*
   %1 = getelementptr inbounds i8, i8* %0, i64 8
   %2 = bitcast i8* %1 to %foo**
   store %foo* undef, %foo** %2, align 8
   ret void
 }
 
 attributes #0 = { nounwind readnone }

test/Transforms/Util/split-bit-piece.ll

 ; Checks that llvm.dbg.declare -> llvm.dbg.value conversion utility
 ; (here exposed through the SROA) pass, properly inserts bit_piece expressions
 ; if it only describes part of the variable.
 ; RUN: opt -S -sroa %s | FileCheck %s
 
 ; Function Attrs: nounwind readnone
 declare void @llvm.dbg.declare(metadata, metadata, metadata) #0
 
 ; Function Attrs: nounwind uwtable
 define hidden void @_ZN6__tsan9FastState14SetHistorySizeEi(i32 %hs) #1 align 2 {
 entry:
   %hs.addr = alloca i32, align 4
   %v1 = alloca i64, align 8
   %v2 = alloca i64, align 8
   store i32 %hs, i32* %hs.addr, align 4
 ; CHECK: call void @llvm.dbg.value(metadata i32 %hs, i64 0, metadata !{{[0-9]+}}, metadata ![[EXPR:[0-9]+]])
-; CHECK: ![[EXPR]] = !DIExpression(DW_OP_bit_piece, 0
+; CHECK: ![[EXPR]] = !DIExpression(DW_OP_LLVM_fragment, 0
   call void @llvm.dbg.declare(metadata i64* %v1, metadata !9, metadata !12), !dbg !13
   %0 = load i32, i32* %hs.addr, align 4
   %conv = sext i32 %0 to i64
   store i64 %conv, i64* %v1, align 8
   %1 = load i64, i64* %v2, align 8
   unreachable
 }
 

unittests/IR/MetadataTest.cpp

#define EXPECT_INVALID(...)                                                    \
   } while (false)
 
   // Empty expression should be valid.
   EXPECT_TRUE(DIExpression::get(Context, None));
 
   // Valid constructions.
   EXPECT_VALID(dwarf::DW_OP_plus, 6);
   EXPECT_VALID(dwarf::DW_OP_deref);
-  EXPECT_VALID(dwarf::DW_OP_bit_piece, 3, 7);
+  EXPECT_VALID(dwarf::DW_OP_LLVM_fragment, 3, 7);
   EXPECT_VALID(dwarf::DW_OP_plus, 6, dwarf::DW_OP_deref);
   EXPECT_VALID(dwarf::DW_OP_deref, dwarf::DW_OP_plus, 6);
-  EXPECT_VALID(dwarf::DW_OP_deref, dwarf::DW_OP_bit_piece, 3, 7);
-  EXPECT_VALID(dwarf::DW_OP_deref, dwarf::DW_OP_plus, 6, dwarf::DW_OP_bit_piece, 3, 7);
+  EXPECT_VALID(dwarf::DW_OP_deref, dwarf::DW_OP_LLVM_fragment, 3, 7);
+  EXPECT_VALID(dwarf::DW_OP_deref, dwarf::DW_OP_plus, 6,
+               dwarf::DW_OP_LLVM_fragment, 3, 7);
 
   // Invalid constructions.
   EXPECT_INVALID(~0u);
   EXPECT_INVALID(dwarf::DW_OP_plus);
-  EXPECT_INVALID(dwarf::DW_OP_bit_piece);
-  EXPECT_INVALID(dwarf::DW_OP_bit_piece, 3);
-  EXPECT_INVALID(dwarf::DW_OP_bit_piece, 3, 7, dwarf::DW_OP_plus, 3);
-  EXPECT_INVALID(dwarf::DW_OP_bit_piece, 3, 7, dwarf::DW_OP_deref);
+  EXPECT_INVALID(dwarf::DW_OP_LLVM_fragment);
+  EXPECT_INVALID(dwarf::DW_OP_LLVM_fragment, 3);
+  EXPECT_INVALID(dwarf::DW_OP_LLVM_fragment, 3, 7, dwarf::DW_OP_plus, 3);
+  EXPECT_INVALID(dwarf::DW_OP_LLVM_fragment, 3, 7, dwarf::DW_OP_deref);
 
 #undef EXPECT_VALID
 #undef EXPECT_INVALID
 }
 
 typedef MetadataTest DIObjCPropertyTest;
 
 TEST_F(DIObjCPropertyTest, get) {