[Sparc] Check register use with isPhysRegUsed() instead of reg_nodbg_empty()

[dcederman]

Summary

By using reg_nodbg_empty() to determine if a function can be treated as a leaf function or not, we miss the case when the register pair L0_L1 is used but not L0 by itself. This has the effect that use_all_i32_regs(), a test in reserved-regs.ll which tries to use all registers, gets treated as a leaf function.

[sepavloff]

What about this fix? Will it be committed?
The test reserved-regs.ll is one of two remaining fails that are observed if expensive checks are enabled (https://llvm.org/bugs/show_bug.cgi?id=30999)
With this fix the test passes.

[sepavloff]

Hi Daniel,
Your patch fixes the last failing test when expensive checks are enabled. Do you plan to commit this fix?
Thanks.

[dcederman]

Hi Serge,

I would like to have it committed, but have not gotten it approved by anyone yet. If you could click the accept revision button I can commit it tomorrow.

[sepavloff]

Venkatraman, James,
Do you think this patch can be accepted?

[jyknight]

Sorry, yes, this looks good!

llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp

if (UseFP) {
     return FrameOffset + MF.getFrameInfo().getStackSize();
   }
 }
 
 static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
 {
 
   for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
-    if (!MRI->reg_nodbg_empty(reg))
+    if (MRI->isPhysRegUsed(reg))
       return false;
 
   for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
-    if (!MRI->reg_nodbg_empty(reg))
+    if (MRI->isPhysRegUsed(reg))
       return false;
 
   return true;
 }
 
 bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
 {
 
   MachineRegisterInfo &MRI = MF.getRegInfo();
   MachineFrameInfo    &MFI = MF.getFrameInfo();
 
   return !(MFI.hasCalls()                  // has calls
-           || !MRI.reg_nodbg_empty(SP::L0) // Too many registers needed
-           || !MRI.reg_nodbg_empty(SP::O6) // %SP is used
+           || MRI.isPhysRegUsed(SP::L0)    // Too many registers needed
+           || MRI.isPhysRegUsed(SP::O6)    // %SP is used
            || hasFP(MF));                  // need %FP
 }
 
 void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
   MachineRegisterInfo &MRI = MF.getRegInfo();
   // Remap %i[0-7] to %o[0-7].
   for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
-    if (MRI.reg_nodbg_empty(reg))
+    if (!MRI.isPhysRegUsed(reg))
       continue;
 
     unsigned mapped_reg = reg - SP::I0 + SP::O0;
-    assert(MRI.reg_nodbg_empty(mapped_reg));
 
     // Replace I register with O register.
     MRI.replaceRegWith(reg, mapped_reg);
 
     // Also replace register pair super-registers.
     if ((reg - SP::I0) % 2 == 0) {
       unsigned preg = (reg - SP::I0) / 2 + SP::I0_I1;
       unsigned mapped_preg = preg - SP::I0_I1 + SP::O0_O1;

llvm/trunk/test/CodeGen/SPARC/reserved-regs.ll

-; RUN: llc -march=sparc  < %s | FileCheck %s
+; RUN: llc -march=sparc -verify-machineinstrs < %s | FileCheck %s
 
 @g = common global [32 x i32] zeroinitializer, align 16
 @h = common global [16 x i64] zeroinitializer, align 16
 
 ;; Ensures that we don't use registers which are supposed to be reserved.
 
 ; CHECK-LABEL: use_all_i32_regs:
+; CHECK: save %sp
 ; CHECK-NOT: %g0
 ; CHECK-NOT: %g1
 ; CHECK-NOT: %g5
 ; CHECK-NOT: %g6
 ; CHECK-NOT: %g7
 ; CHECK-NOT: %o6
 ; CHECK-NOT: %i6
 ; CHECK-NOT: %i7
entry:
   store volatile i32 %30, i32* getelementptr inbounds ([32 x i32], [32 x i32]* @g, i64 0, i64 29), align 4
   store volatile i32 %31, i32* getelementptr inbounds ([32 x i32], [32 x i32]* @g, i64 0, i64 30), align 8
   store volatile i32 %0, i32* getelementptr inbounds ([32 x i32], [32 x i32]* @g, i64 0, i64 31), align 4
   ret void
 }
 
 
 ; CHECK-LABEL: use_all_i64_regs:
+; CHECK: save %sp
 ; CHECK-NOT: %g0
 ; CHECK-NOT: %g1
 ; CHECK-NOT: %g4
 ; CHECK-NOT: %g5
 ; CHECK-NOT: %g6
 ; CHECK-NOT: %g7
 ; CHECK-NOT: %o6
 ; CHECK-NOT: %o7