AMDGPU: Stop creating unused virtual registers

[arsenm]

Summary

These are only used in the spill to VMEM path. Move them to the one use.

[• tstellarAMD]

LGTM.

[arsenm]

r285756

lib/Target/AMDGPU/SIRegisterInfo.cpp

bool SIRegisterInfo::spillSGPR(MachineBasicBlock::iterator MI,
 
   bool SpillToSMEM = ST.hasScalarStores() && EnableSpillSGPRToSMEM;
   if (SpillToSMEM && OnlyToVGPR)
     return false;
 
   // SubReg carries the "Kill" flag when SubReg == SuperReg.
   unsigned SubKillState = getKillRegState((NumSubRegs == 1) && IsKill);
   for (unsigned i = 0, e = NumSubRegs; i < e; ++i) {
-    unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
     unsigned SubReg = NumSubRegs == 1 ?
       SuperReg : getSubReg(SuperReg, getSubRegFromChannel(i));
 
     if (SpillToSMEM) {
       if (SuperReg == AMDGPU::M0) {
         assert(NumSubRegs == 1);
         unsigned CopyM0
           = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
if (Spill.hasReg()) {
       // it are fixed.
     } else {
       // XXX - Can to VGPR spill fail for some subregisters but not others?
       if (OnlyToVGPR)
         return false;
 
       // Spill SGPR to a frame index.
       // TODO: Should VI try to spill to VGPR and then spill to SMEM?
+      unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
 
       MachineInstrBuilder Mov
         = BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpReg)
         .addReg(SubReg, SubKillState);
 
 
       // There could be undef components of a spilled super register.
       // TODO: Can we detect this and skip the spill?
bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI,
   if (IsM0) {
     assert(NumSubRegs == 1);
     SuperReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
   }
 
   int64_t FrOffset = FrameInfo.getObjectOffset(Index);
 
   for (unsigned i = 0, e = NumSubRegs; i < e; ++i) {
-    unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
     unsigned SubReg = NumSubRegs == 1 ?
       SuperReg : getSubReg(SuperReg, getSubRegFromChannel(i));
 
     if (SpillToSMEM) {
       unsigned Size = FrameInfo.getObjectSize(Index);
       unsigned Align = FrameInfo.getObjectAlignment(Index);
       MachinePointerInfo PtrInfo
         = MachinePointerInfo::getFixedStack(*MF, Index);
if (Spill.hasReg()) {
         .addReg(MI->getOperand(0).getReg(), RegState::ImplicitDefine);
     } else {
       if (OnlyToVGPR)
         return false;
 
       // Restore SGPR from a stack slot.
       // FIXME: We should use S_LOAD_DWORD here for VI.
 
+      unsigned TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
       unsigned Align = FrameInfo.getObjectAlignment(Index);
       unsigned Size = FrameInfo.getObjectSize(Index);
 
       MachinePointerInfo PtrInfo
         = MachinePointerInfo::getFixedStack(*MF, Index);
 
       MachineMemOperand *MMO = MF->getMachineMemOperand(
         PtrInfo, MachineMemOperand::MOLoad, Size, Align);