[mips][fastisel] Consider soft-float an unsupported floating point mode

[sdardis]

Summary

Treat soft-float as unsupported for fast-isel. Additionally, ensure we check
that lowering f32 arguments also considers the case of soft-float mode.

[vkalintiris]

lib/Target/Mips/MipsFastISel.cpp

1368

We should check UnsupportedFPMode instead of useSoftFloat in order to be consistent with similar tests in other places.

test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll

1

FastISel is not enabled for microMIPS as we haven't test this configuration. Also, try to enable FastISel by using -O0 and -relocation-model=pic as we do on (hopefully most of) the other tests.

[sdardis]

Address review comments.

[ehostunreach]

LGTM.

[sdardis]

Thanks, committed rL283209.

lib/Target/Mips/MipsFastISel.cpp

explicit MipsFastISel(FunctionLoweringInfo &funcInfo,
         Subtarget(&funcInfo.MF->getSubtarget<MipsSubtarget>()),
         TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) {
     MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
     Context = &funcInfo.Fn->getContext();
     bool ISASupported = !Subtarget->hasMips32r6() &&
                         !Subtarget->inMicroMipsMode() && Subtarget->hasMips32();
     TargetSupported =
         ISASupported && TM.isPositionIndependent() && getABI().IsO32();
-    UnsupportedFPMode = Subtarget->isFP64bit();
+    UnsupportedFPMode = Subtarget->isFP64bit() || Subtarget->useSoftFloat();
   }
 
   unsigned fastMaterializeAlloca(const AllocaInst *AI) override;
   unsigned fastMaterializeConstant(const Constant *C) override;
   bool fastSelectInstruction(const Instruction *I) override;
 
 #include "MipsGenFastISel.inc"
 };
case MVT::i32:
       Allocation.emplace_back(&Mips::GPR32RegClass, *NextGPR32++);
 
       // Allocating any GPR32 prohibits further use of floating point arguments.
       NextFGR32 = FGR32ArgRegs.end();
       NextAFGR64 = AFGR64ArgRegs.end();
       break;
 
     case MVT::f32:
+      if (Subtarget->useSoftFloat()) {
+        DEBUG(dbgs() << ".. .. gave up (useSoftFloat())\n");
+        return false;
+      }
       if (NextFGR32 == FGR32ArgRegs.end()) {
         DEBUG(dbgs() << ".. .. gave up (ran out of FGR32 arguments)\n");
         return false;
       }
       DEBUG(dbgs() << ".. .. FGR32(" << *NextFGR32 << ")\n");
       Allocation.emplace_back(&Mips::FGR32RegClass, *NextFGR32++);
       // Allocating an FGR32 also allocates the super-register AFGR64, and
       // ABI rules require us to skip the corresponding GPR32.
       if (NextGPR32 != GPR32ArgRegs.end())
         NextGPR32++;
       if (NextAFGR64 != AFGR64ArgRegs.end())
         NextAFGR64++;
       break;
 
     case MVT::f64:
       if (UnsupportedFPMode) {
-        DEBUG(dbgs() << ".. .. gave up (UnsupportedFPMode\n");
+        DEBUG(dbgs() << ".. .. gave up (UnsupportedFPMode)\n");
         return false;
       }
       if (NextAFGR64 == AFGR64ArgRegs.end()) {
         DEBUG(dbgs() << ".. .. gave up (ran out of AFGR64 arguments)\n");
         return false;
       }
       DEBUG(dbgs() << ".. .. AFGR64(" << *NextAFGR64 << ")\n");
       Allocation.emplace_back(&Mips::AFGR64RegClass, *NextAFGR64++);

test/CodeGen/Mips/Fast-ISel/fast-isel-softfloat-lower-args.ll

+; RUN: not llc -march=mipsel -mcpu=mips32r3 -mattr=+micromips,+soft-float \
+; RUN:         -fast-isel -fast-isel-abort=3 -relocation-model=pic < %s
+
+; Test that FastISel aborts instead of trying to lower arguments for soft-float.
+
+define void @__signbit(double %__x) {
+entry:
+  %__x.addr = alloca double, align 8
+  store double %__x, double* %__x.addr, align 8
+  ret void
+}