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Differential D23644

[TSan][MIPS] Changes mips memory layout to support pie with address space randomization.
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Authored by slthakur on Aug 17 2016, 10:33 PM.

Details

Reviewers
dvyukov
samsonov

Diff Detail

Repository
rL LLVM

Event Timeline

slthakur updated this revision to Diff 68482.Aug 17 2016, 10:33 PM
slthakur retitled this revision from to [TSan][MIPS] Changes mips memory layout to support pie with address space randomization..
slthakur updated this object.
slthakur added reviewers: dvyukov, samsonov.
slthakur set the repository for this revision to rL LLVM.
slthakur added a project: Restricted Project.
slthakur added subscribers: jaydeep, llvm-commits.
Herald added a subscriber: kubamracek. · View Herald TranscriptAug 17 2016, 10:33 PM
dvyukov edited edge metadata.Aug 19 2016, 8:01 PM

Can we add a test for this?
There is test/tsan/pie_test.cc which is not blacklisted for mips. Does it work now?

slthakur added a comment.Aug 22 2016, 1:22 AM

The test test/tsan/pie_test.cc was failing for MIPS before. Its now working with this patch.

dvyukov accepted this revision.Aug 22 2016, 10:41 AM
dvyukov edited edge metadata.
This revision is now accepted and ready to land.Aug 22 2016, 10:41 AM
slthakur mentioned this in rL279505: [TSan][MIPS] Changes mips memory layout to support pie with address space….Aug 23 2016, 1:23 AM
slthakur closed this revision.Aug 23 2016, 1:25 AM

Committed in rL279505

Revision Contents

PathSize
lib/
tsan/
rtl/
21 lines

Diff 68482

lib/tsan/rtl/tsan_platform.h

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4000 0000 00 - 6000 0000 00: - 4000 0000 00 - 6000 0000 00: -
6000 0000 00 - 6200 0000 00: traces 6000 0000 00 - 6200 0000 00: traces
6200 0000 00 - fe00 0000 00: - 6200 0000 00 - fe00 0000 00: -
fe00 0000 00 - ff00 0000 00: heap fe00 0000 00 - ff00 0000 00: heap
ff00 0000 00 - ff80 0000 00: - ff00 0000 00 - ff80 0000 00: -
ff80 0000 00 - ffff ffff ff: modules and main thread stack ff80 0000 00 - ffff ffff ff: modules and main thread stack
*/ */
struct Mapping { struct Mapping {
static const uptr kMetaShadowBeg = 0x3000000000ull; static const uptr kMetaShadowBeg = 0x4000000000ull;
static const uptr kMetaShadowEnd = 0x4000000000ull; static const uptr kMetaShadowEnd = 0x5000000000ull;
static const uptr kTraceMemBeg = 0x6000000000ull; static const uptr kTraceMemBeg = 0xb000000000ull;
static const uptr kTraceMemEnd = 0x6200000000ull; static const uptr kTraceMemEnd = 0xb200000000ull;
static const uptr kShadowBeg = 0x1400000000ull; static const uptr kShadowBeg = 0x2400000000ull;
static const uptr kShadowEnd = 0x2400000000ull; static const uptr kShadowEnd = 0x4000000000ull;
static const uptr kHeapMemBeg = 0xfe00000000ull; static const uptr kHeapMemBeg = 0xfe00000000ull;
static const uptr kHeapMemEnd = 0xff00000000ull; static const uptr kHeapMemEnd = 0xff00000000ull;
static const uptr kLoAppMemBeg = 0x0100000000ull; static const uptr kLoAppMemBeg = 0x0100000000ull;
static const uptr kLoAppMemEnd = 0x0200000000ull; static const uptr kLoAppMemEnd = 0x0200000000ull;
static const uptr kMidAppMemBeg = 0xaa00000000ull;
static const uptr kMidAppMemEnd = 0xab00000000ull;
static const uptr kMidShadowOff = 0xa800000000ull;
static const uptr kHiAppMemBeg = 0xff80000000ull; static const uptr kHiAppMemBeg = 0xff80000000ull;
static const uptr kHiAppMemEnd = 0xffffffffffull; static const uptr kHiAppMemEnd = 0xffffffffffull;
static const uptr kAppMemMsk = 0xfc00000000ull; static const uptr kAppMemMsk = 0xf800000000ull;
static const uptr kAppMemXor = 0x0400000000ull; static const uptr kAppMemXor = 0x0800000000ull;
static const uptr kVdsoBeg = 0xfffff00000ull; static const uptr kVdsoBeg = 0xfffff00000ull;
}; };
#define TSAN_MID_APP_RANGE 1
#elif defined(__aarch64__) #elif defined(__aarch64__)
// AArch64 supports multiple VMA which leads to multiple address transformation // AArch64 supports multiple VMA which leads to multiple address transformation
// functions. To support these multiple VMAS transformations and mappings TSAN // functions. To support these multiple VMAS transformations and mappings TSAN
// runtime for AArch64 uses an external memory read (vmaSize) to select which // runtime for AArch64 uses an external memory read (vmaSize) to select which
// mapping to use. Although slower, it make a same instrumented binary run on // mapping to use. Although slower, it make a same instrumented binary run on
// multiple kernels. // multiple kernels.
/* /*
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