[AMDGPU] fix operand printing failure on dissassembly (LIGHTNING-260)

[vpykhtin]

Summary

There're cases when our TD instruction definitions has "silent" bugs (operand name mismatch between In/out dags and encoding fields) which may lead to a situation when instruction has less operands than expected on disassembly. While this definitely requires a fix for such mismatches, it would be nice if operand printer not crash when no operand is met on such instruction. This fix prints such operands as missing.

[arsenm]

LGTM

[arsenm]

test/MC/Disassembler/AMDGPU/missing_op.txt

4 ↗

(On Diff #67357)

Is this a valid assembler comment syntax? Should this be ; missing x y z?

[vpykhtin]

test/MC/Disassembler/AMDGPU/missing_op.txt

4 ↗

(On Diff #67357)

You're right that would be better, but unfortunatelly I have to print it upon printOperand entry and this creates such "intermediate" comment. Otherwise I would need to accumulate comment line and print it sometime afterwards. Anyway this assembler text shouldn't be assembled so I think such comment would be ok.

llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp

else {
     // operand. This is technically allowed for the encoding of s_mov_b64.
     O << formatHex(static_cast<uint64_t>(Imm));
   }
 }
 
 void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
                                      raw_ostream &O) {
 
+  if (OpNo >= MI->getNumOperands()) {
+    O << "/*Missing OP" << OpNo << "*/";
+    return;
+  }
+
   const MCOperand &Op = MI->getOperand(OpNo);
   if (Op.isReg()) {
     switch (Op.getReg()) {
     // This is the default predicate state, so we don't need to print it.
     case AMDGPU::PRED_SEL_OFF:
       break;
 
     default:

llvm/trunk/test/MC/Disassembler/AMDGPU/missing_op.txt

+# RUN: llvm-mc -arch=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+#TODO: this test will fail when we fix v_interp_p2_f32 signature, remove it then
+#VI: v_interp_p2_f32 16, [/*Missing OP1*/], /*Missing OP2*/, /*Missing OP3*/, /*Missing OP4*/
+0xd4 0x41 0x1d 0xd4