Add popcount(n) == bitsize(n) -> n == -1 transformation.

[deadalnix]

Summary

As per title.

[spatel]

LGTM. See inline comments for a couple of nits.

Also, can you please add a vector regression test for more coverage and so we know that we're using the right bitwidth in that case?

lib/Transforms/InstCombine/InstCombineCompares.cpp

2383 ↗

(On Diff #66722)

bitwidth(A) - capitalize for consistency

2388 ↗

(On Diff #66722)

The coding standard recommends 'auto *' for pointers:
http://llvm.org/docs/CodingStandards.html#use-auto-type-deduction-to-make-code-more-readable

[deadalnix]

Add test case for vectors
Style nits

llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp

Instruction *InstCombiner::foldICmpIntrinsicWithConstant(ICmpInst &ICI) {
   switch (II->getIntrinsicID()) {
   case Intrinsic::bswap:
     Worklist.Add(II);
     ICI.setOperand(0, II->getArgOperand(0));
     ICI.setOperand(1, Builder->getInt(Op1C->byteSwap()));
     return &ICI;
   case Intrinsic::ctlz:
   case Intrinsic::cttz:
-    // ctz(A) == bitwidth(a)  ->  A == 0 and likewise for !=
+    // ctz(A) == bitwidth(A)  ->  A == 0 and likewise for !=
     if (*Op1C == Op1C->getBitWidth()) {
       Worklist.Add(II);
       ICI.setOperand(0, II->getArgOperand(0));
       ICI.setOperand(1, ConstantInt::getNullValue(II->getType()));
       return &ICI;
     }
     break;
-  case Intrinsic::ctpop:
+  case Intrinsic::ctpop: {
     // popcount(A) == 0  ->  A == 0 and likewise for !=
-    if (*Op1C == 0) {
+    // popcount(A) == bitwidth(A)  ->  A == -1 and likewise for !=
+    bool IsZero = *Op1C == 0;
+    if (IsZero || *Op1C == Op1C->getBitWidth()) {
       Worklist.Add(II);
       ICI.setOperand(0, II->getArgOperand(0));
-      ICI.setOperand(1, ConstantInt::getNullValue(II->getType()));
+      auto *NewOp = IsZero
+        ? ConstantInt::getNullValue(II->getType())
+        : ConstantInt::getAllOnesValue(II->getType());
+      ICI.setOperand(1, NewOp);
       return &ICI;
     }
+    }
     break;
   default:
     break;
   }
   return nullptr;
 }
 
 /// Handle icmp (cast x to y), (cast/cst). We only handle extending casts so

llvm/trunk/test/Transforms/InstCombine/intrinsics.ll

 define void @cmp.simplify(i32 %a, i32 %b, i1* %c) {
 entry:
   %lz = tail call i32 @llvm.ctlz.i32(i32 %a, i1 false) nounwind readnone
   %lz.cmp = icmp eq i32 %lz, 32
   store volatile i1 %lz.cmp, i1* %c
   %tz = tail call i32 @llvm.cttz.i32(i32 %a, i1 false) nounwind readnone
   %tz.cmp = icmp ne i32 %tz, 32
   store volatile i1 %tz.cmp, i1* %c
-  %pop = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
-  %pop.cmp = icmp eq i32 %pop, 0
-  store volatile i1 %pop.cmp, i1* %c
+  %pop0 = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
+  %pop0.cmp = icmp eq i32 %pop0, 0
+  store volatile i1 %pop0.cmp, i1* %c
+  %pop1 = tail call i32 @llvm.ctpop.i32(i32 %b) nounwind readnone
+  %pop1.cmp = icmp eq i32 %pop1, 32
+  store volatile i1 %pop1.cmp, i1* %c
   ret void
 ; CHECK: @cmp.simplify
 ; CHECK-NEXT: entry:
 ; CHECK-NEXT: %lz.cmp = icmp eq i32 %a, 0
 ; CHECK-NEXT: store volatile i1 %lz.cmp, i1* %c
 ; CHECK-NEXT: %tz.cmp = icmp ne i32 %a, 0
 ; CHECK-NEXT: store volatile i1 %tz.cmp, i1* %c
-; CHECK-NEXT: %pop.cmp = icmp eq i32 %b, 0
-; CHECK-NEXT: store volatile i1 %pop.cmp, i1* %c
+; CHECK-NEXT: %pop0.cmp = icmp eq i32 %b, 0
+; CHECK-NEXT: store volatile i1 %pop0.cmp, i1* %c
+; CHECK-NEXT: %pop1.cmp = icmp eq i32 %b, -1
+; CHECK-NEXT: store volatile i1 %pop1.cmp, i1* %c
 }
 
 define <2 x i1> @ctlz_cmp_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @ctlz_cmp_vec(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq <2 x i32> %a, zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %x = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %a, i1 false) nounwind readnone
   %cmp = icmp eq <2 x i32> %x, <i32 32, i32 32>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @cttz_cmp_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @cttz_cmp_vec(
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i32> %a, zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %x = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %a, i1 false) nounwind readnone
   %cmp = icmp ne <2 x i32> %x, <i32 32, i32 32>
   ret <2 x i1> %cmp
 }
 
-define <2 x i1> @ctpop_cmp_vec(<2 x i32> %a) {
+define void @ctpop_cmp_vec(<2 x i32> %a, <2 x i1>* %b) {
+  %pop0 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a) nounwind readnone
+  %pop0.cmp = icmp eq <2 x i32> %pop0, zeroinitializer
+  store volatile <2 x i1> %pop0.cmp, <2 x i1>* %b
+  %pop1 = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a) nounwind readnone
+  %pop1.cmp = icmp eq <2 x i32> %pop1, < i32 32, i32 32 >
+  store volatile <2 x i1> %pop1.cmp, <2 x i1>* %b
+  ret void
 ; CHECK-LABEL: @ctpop_cmp_vec(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq <2 x i32> %a, zeroinitializer
-; CHECK-NEXT:    ret <2 x i1> [[CMP]]
-;
-  %x = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a) nounwind readnone
-  %cmp = icmp eq <2 x i32> %x, zeroinitializer
-  ret <2 x i1> %cmp
+; CHECK-NEXT: %pop0.cmp = icmp eq <2 x i32> %a, zeroinitializer
+; CHECK-NEXT: store volatile <2 x i1> %pop0.cmp, <2 x i1>* %c
+; CHECK-NEXT: %pop1.cmp = icmp eq <2 x i32> %a, zeroinitializer
+; CHECK-NEXT: store volatile <2 x i1> %pop1.cmp, <2 x i1>* %c
 }
 
 define i32 @cttz_simplify1a(i32 %x) nounwind readnone ssp {
   %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
   %shr3 = lshr i32 %tmp1, 5
   ret i32 %shr3
 
 ; CHECK-LABEL: @cttz_simplify1a(