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Differential D22538

[AMDGPU] Emit read-only data to .rodata for hsa
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Authored by kzhuravl on Jul 19 2016, 3:01 PM.

Details

Reviewers
• tstellarAMD
arsenm
Commits
rG3c0d8d22fe67: [AMDGPU] Emit read-only data to .rodata for hsa
rL276298: [AMDGPU] Emit read-only data to .rodata for hsa

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Repository
rL LLVM

Event Timeline

kzhuravl updated this revision to Diff 64570.Jul 19 2016, 3:01 PM
kzhuravl retitled this revision from to [AMDGPU] Emit read-only data to .rodata for hsa.
kzhuravl updated this object.
kzhuravl added a reviewer: • tstellarAMD.
kzhuravl added a subscriber: llvm-commits.
Herald added subscribers: kzhuravl, arsenm. · View Herald TranscriptJul 19 2016, 3:01 PM
arsenm accepted this revision.Jul 19 2016, 3:11 PM
arsenm added a reviewer: arsenm.

LGTM

This revision is now accepted and ready to land.Jul 19 2016, 3:11 PM
Closed by commit rL276298: [AMDGPU] Emit read-only data to .rodata for hsa (authored by kzhuravl). · Explain WhyJul 21 2016, 9:06 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
AMDGPU/
3 lines
test/
CodeGen/
AMDGPU/
2 lines
2 lines

Diff 64910

llvm/trunk/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp

Show All 18 Lines
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Generic Object File // Generic Object File
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
MCSection *AMDGPUTargetObjectFile::SelectSectionForGlobal(const GlobalValue *GV, MCSection *AMDGPUTargetObjectFile::SelectSectionForGlobal(const GlobalValue *GV,
SectionKind Kind, SectionKind Kind,
Mangler &Mang, Mangler &Mang,
const TargetMachine &TM) const { const TargetMachine &TM) const {
if (Kind.isReadOnly() && AMDGPU::isReadOnlySegment(GV)) if (Kind.isReadOnly() && AMDGPU::isReadOnlySegment(GV) &&
TM.getTargetTriple().getOS() != Triple::AMDHSA)
return TextSection; return TextSection;
return TargetLoweringObjectFileELF::SelectSectionForGlobal(GV, Kind, Mang, TM); return TargetLoweringObjectFileELF::SelectSectionForGlobal(GV, Kind, Mang, TM);
} }

llvm/trunk/test/CodeGen/AMDGPU/global-constant.ll

; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NOHSA %s
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA %s
@readonly = private unnamed_addr addrspace(2) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0] @readonly = private unnamed_addr addrspace(2) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0]
@readonly2 = private unnamed_addr addrspace(2) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0] @readonly2 = private unnamed_addr addrspace(2) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0]
; GCN-LABEL: {{^}}main: ; GCN-LABEL: {{^}}main:
; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}} ; GCN: s_getpc_b64 s{{\[}}[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]{{\]}}
; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], readonly ; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], readonly
; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0 ; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], 0
; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}} ; GCN: s_getpc_b64 s{{\[}}[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]{{\]}}
; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], readonly ; GCN-NEXT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], readonly
; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0 ; GCN: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], 0
; NOHSA: .text ; NOHSA: .text
; HSA: .text ; HSA: .section .rodata
; GCN: readonly: ; GCN: readonly:
; GCN: readonly2: ; GCN: readonly2:
define void @main(i32 %index, float addrspace(1)* %out) { define void @main(i32 %index, float addrspace(1)* %out) {
%ptr = getelementptr [4 x float], [4 x float] addrspace(2) * @readonly, i32 0, i32 %index %ptr = getelementptr [4 x float], [4 x float] addrspace(2) * @readonly, i32 0, i32 %index
%val = load float, float addrspace(2)* %ptr %val = load float, float addrspace(2)* %ptr
store float %val, float addrspace(1)* %out store float %val, float addrspace(1)* %out
%ptr2 = getelementptr [4 x float], [4 x float] addrspace(2) * @readonly2, i32 0, i32 %index %ptr2 = getelementptr [4 x float], [4 x float] addrspace(2) * @readonly2, i32 0, i32 %index
%val2 = load float, float addrspace(2)* %ptr2 %val2 = load float, float addrspace(2)* %ptr2
store float %val2, float addrspace(1)* %out store float %val2, float addrspace(1)* %out
ret void ret void
} }

llvm/trunk/test/CodeGen/AMDGPU/hsa-globals.ll

Show All 32 Lines
; ASM: .type common_global_program,@object ; ASM: .type common_global_program,@object
; ASM: .comm common_global_program,4,2 ; ASM: .comm common_global_program,4,2
; ASM: external_global_program: ; ASM: external_global_program:
; ASM: .long 0 ; ASM: .long 0
; ASM: .size external_global_program, 4 ; ASM: .size external_global_program, 4
; ASM: .type internal_readonly,@object ; ASM: .type internal_readonly,@object
; ASM: .text ; ASM: .section .rodata.cst4,"aM",@progbits,4
; ASM: internal_readonly: ; ASM: internal_readonly:
; ASM: .long 0 ; ASM: .long 0
; ASM: .size internal_readonly, 4 ; ASM: .size internal_readonly, 4
; ASM: .type external_readonly,@object ; ASM: .type external_readonly,@object
; ASM: .globl external_readonly ; ASM: .globl external_readonly
; ASM: external_readonly: ; ASM: external_readonly:
; ASM: .long 0 ; ASM: .long 0
; ASM: .size external_readonly, 4 ; ASM: .size external_readonly, 4