[ARM][LLD] Initial support for ARM TLS

[peter.smith]

Summary

Add relocations and identification functions for the Initial Exec, Local Exec, and Global Dynamic TLS model defined in Addenda to, and Errata in, the ABI for the ARM Architecture.

ARM uses variant 1 of the thread local storage data structures as defined in ELF Handling for Thread-Local Storage. The implementation fits into to the existing TLS model so the lld change is largely just identifying relocations.

Limitations:

• The "experimental" descriptor based model that can be selected in gcc, but not clang with -mtls-dialect=gnu2 is not supported.
• The relocations R_ARM_TLS_LE12 and R_ARM_TLS_IE12GP are not supported, I know of no ARM Toolchain that generates these relocations as they are an optimization that limits the size of the TLS block too much.
• No code relaxation is supported as the standard ARM TLS model puts the TLS relocations on literal data and not code.
• Support for the local dynamic model will come in a follow up patch. The test cases depend on adding symbol(tlsldm) support to llvm-mc (https://reviews.llvm.org/D22461).

References:

• ARM TLS model: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0045e/IHI0045E_ABI_addenda.pdf
• Relocations: http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044f/IHI0044F_aaelf.pdf
• TLS variants: https://www.akkadia.org/drepper/tls.pdf

[ruiu]

Code LGTM, but these tests seems too long to me. As a comparison, test/ELF/aarch64-tls-gdie.s is just 34 lines. Can you reduce the test assembly so that you really test the feature that you are adding?

ELF/Target.cpp

1522 ↗

(On Diff #64312)

+ -?

[peter.smith]

Thanks for the review. My intention was to have the tests closely follow the structure that a compiler would output for simple accesses to TLS variables. I'll cut the tests down a bit more and will post an update tomorrow.

[peter.smith]

Changes since last revision:

• Rewrite the test cases to limit the amount of unnecessary code. The code-sequences now closely match the TLS examples in the ABI for the ARM Architecture [1].
• Add a test case for local-exec

It could be possible to streamline the tests further to just the literals but I think that this would make it hard for a human to interpret the test and what it is checking for.

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ihi0045e/IHI0045E_ABI_addenda.pdf

[ruiu]

I still don't think that testing with relatively large mocked compiler outputs is a good idea since, well, it is out of scope of this patch. Large tests tend to be updated in the future for unrelated changes because they contain unrelated stuff. I'd appreciate if you test only the feature you are focusing on with this patch.

[peter.smith]

Changes since last version:
Removed all code-sequences from tests. Leaving just literals and some nop instructions used to provide some separation between labels.

[peter.smith]

Corrected mistake in R_ARM_TLS_LE32 implementation in relocateOne and test. It should include the Thread Control Block Size in the offset from thread pointer.

[ruiu]

LGTM

[peter.smith]

Thanks for the review, committed r276095

ELF/Target.cpp

1522 ↗

(On Diff #64312)

The comment GOT(S) + - Got_ORG is wrong. In fact the above line is also wrong as it is missing A. It should be GOT(S) + A - P.

lld/trunk/ELF/Target.cpp

 };
 
 class ARMTargetInfo final : public TargetInfo {
 public:
   ARMTargetInfo();
   RelExpr getRelExpr(uint32_t Type, const SymbolBody &S) const override;
   uint32_t getDynRel(uint32_t Type) const override;
   uint64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
+  bool isTlsGlobalDynamicRel(uint32_t Type) const override;
+  bool isTlsInitialExecRel(uint32_t Type) const override;
   void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   RelExpr getThunkExpr(RelExpr Expr, uint32_t RelocType,
                        const InputFile &File,
                        const SymbolBody &S) const override;
   void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
ARMTargetInfo::ARMTargetInfo() {
   PltRel = R_ARM_JUMP_SLOT;
   TlsGotRel = R_ARM_TLS_TPOFF32;
   TlsModuleIndexRel = R_ARM_TLS_DTPMOD32;
   TlsOffsetRel = R_ARM_TLS_DTPOFF32;
   GotEntrySize = 4;
   GotPltEntrySize = 4;
   PltEntrySize = 16;
   PltHeaderSize = 20;
+  // ARM uses Variant 1 TLS
+  TcbSize = 8;
 }
 
 RelExpr ARMTargetInfo::getRelExpr(uint32_t Type, const SymbolBody &S) const {
   switch (Type) {
   default:
     return R_ABS;
   case R_ARM_THM_JUMP11:
     return R_PC;
   case R_ARM_CALL:
   case R_ARM_JUMP24:
   case R_ARM_PC24:
   case R_ARM_PLT32:
   case R_ARM_THM_JUMP19:
   case R_ARM_THM_JUMP24:
   case R_ARM_THM_CALL:
     return R_PLT_PC;
   case R_ARM_GOTOFF32:
     // (S + A) - GOT_ORG
     return R_GOTREL;
   case R_ARM_GOT_BREL:
     // GOT(S) + A - GOT_ORG
     return R_GOT_OFF;
   case R_ARM_GOT_PREL:
-    // GOT(S) + - GOT_ORG
+  case R_ARM_TLS_IE32:
+    // GOT(S) + A - P
     return R_GOT_PC;
+  case R_ARM_TLS_GD32:
+    return R_TLSGD_PC;
   case R_ARM_BASE_PREL:
     // B(S) + A - P
     // FIXME: currently B(S) assumed to be .got, this may not hold for all
     // platforms.
     return R_GOTONLY_PC;
   case R_ARM_MOVW_PREL_NC:
   case R_ARM_MOVT_PREL:
   case R_ARM_PREL31:
   case R_ARM_REL32:
   case R_ARM_THM_MOVW_PREL_NC:
   case R_ARM_THM_MOVT_PREL:
     return R_PC;
+  case R_ARM_TLS_LE32:
+    return R_TLS;
   }
 }
 
 uint32_t ARMTargetInfo::getDynRel(uint32_t Type) const {
   if (Type == R_ARM_ABS32)
     return Type;
   // Keep it going with a dummy value so that we can find more reloc errors.
   errorDynRel(Type);
void ARMTargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
   case R_ARM_NONE:
     break;
   case R_ARM_ABS32:
   case R_ARM_BASE_PREL:
   case R_ARM_GOTOFF32:
   case R_ARM_GOT_BREL:
   case R_ARM_GOT_PREL:
   case R_ARM_REL32:
+  case R_ARM_TLS_GD32:
+  case R_ARM_TLS_IE32:
+  case R_ARM_TLS_LE32:
     write32le(Loc, Val);
     break;
   case R_ARM_PREL31:
     checkInt<31>(Val, Type);
     write32le(Loc, (read32le(Loc) & 0x80000000) | (Val & ~0x80000000));
     break;
   case R_ARM_CALL:
     // R_ARM_CALL is used for BL and BLX instructions, depending on the
uint64_t ARMTargetInfo::getImplicitAddend(const uint8_t *Buf,
   default:
     return 0;
   case R_ARM_ABS32:
   case R_ARM_BASE_PREL:
   case R_ARM_GOTOFF32:
   case R_ARM_GOT_BREL:
   case R_ARM_GOT_PREL:
   case R_ARM_REL32:
+  case R_ARM_TLS_GD32:
+  case R_ARM_TLS_IE32:
+  case R_ARM_TLS_LE32:
     return SignExtend64<32>(read32le(Buf));
   case R_ARM_PREL31:
     return SignExtend64<31>(read32le(Buf));
   case R_ARM_CALL:
   case R_ARM_JUMP24:
   case R_ARM_PC24:
   case R_ARM_PLT32:
     return SignExtend64<26>(read32le(Buf) << 2);
case R_ARM_THM_MOVT_PREL: {
     return SignExtend64<16>(((Hi & 0x000f) << 12) | // imm4
                             ((Hi & 0x0400) << 1) |  // i
                             ((Lo & 0x7000) >> 4) |  // imm3
                             (Lo & 0x00ff));         // imm8
   }
   }
 }
 
+bool ARMTargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const {
+  return Type == R_ARM_TLS_GD32;
+}
+
+bool ARMTargetInfo::isTlsInitialExecRel(uint32_t Type) const {
+  return Type == R_ARM_TLS_IE32;
+}
+
 template <class ELFT> MipsTargetInfo<ELFT>::MipsTargetInfo() {
   GotPltHeaderEntriesNum = 2;
   PageSize = 65536;
   GotEntrySize = sizeof(typename ELFT::uint);
   GotPltEntrySize = sizeof(typename ELFT::uint);
   PltEntrySize = 16;
   PltHeaderSize = 32;
   CopyRel = R_MIPS_COPY;

lld/trunk/test/ELF/arm-tls-gd32.s

+// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
+// RUN: ld.lld %t.o -o %t.so -shared
+// RUN: llvm-readobj -s -dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
+// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t.so | FileCheck %s
+// REQUIRES: arm
+
+// Test the handling of the global-dynamic TLS model. Dynamic Loader finds
+// module index R_ARM_TLS_DTPMOD32 and the offset within the module
+// R_ARM_TLS_DTPOFF32. One of the variables is hidden which permits relaxation
+// to local dynamic
+
+ .text
+ .syntax unified
+ .globl  func
+ .p2align        2
+ .type   func,%function
+func:
+.L0:
+ nop
+.L1:
+ nop
+.L2:
+ nop
+
+ .p2align        2
+// Generate R_ARM_TLS_GD32 relocations
+// Allocates a pair of GOT entries dynamically relocated by R_ARM_TLS_DTPMOD32
+// and R_ARM_TLS_DTPOFF32 respectively. The literal contains the offset of the
+// first GOT entry from the place
+.Lt0: .word   x(TLSGD) + (. - .L0 - 8)
+.Lt1: .word   y(TLSGD) + (. - .L1 - 8)
+.Lt2: .word   z(TLSGD) + (. - .L2 - 8)
+
+// __thread int x = 10
+// __thread int y;
+// __thread int z __attribute((visibility("hidden")))
+
+ .hidden z
+ .globl  z
+ .globl  y
+ .globl  x
+
+ .section       .tbss,"awT",%nobits
+ .p2align  2
+.TLSSTART:
+ .type  z, %object
+z:
+ .space 4
+ .type  y, %object
+y:
+ .space 4
+ .section       .tdata,"awT",%progbits
+ .p2align 2
+ .type  x, %object
+x:
+ .word  10
+
+// SEC:      Name: .tdata
+// SEC-NEXT: Type: SHT_PROGBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_TLS
+// SEC-NEXT:   SHF_WRITE
+// SEC-NEXT:  ]
+// SEC-NEXT: Address: 0x2000
+// SEC:      Size: 4
+// SEC:      Name: .tbss
+// SEC-NEXT: Type: SHT_NOBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_TLS
+// SEC-NEXT:   SHF_WRITE
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x2004
+// SEC:      Size: 8
+
+// SEC:      Name: .got
+// SEC-NEXT: Type: SHT_PROGBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_WRITE
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x204C
+// SEC:      Size: 24
+
+// SEC: Dynamic Relocations {
+// SEC-NEXT: 0x205C R_ARM_TLS_DTPMOD32 -
+// SEC-NEXT: 0x204C R_ARM_TLS_DTPMOD32 x
+// SEC-NEXT: 0x2050 R_ARM_TLS_DTPOFF32 x
+// SEC-NEXT: 0x2054 R_ARM_TLS_DTPMOD32 y
+// SEC-NEXT: 0x2058 R_ARM_TLS_DTPOFF32 y
+
+
+// CHECK: Disassembly
+// CHECK-NEXT: func:
+// CHECK-NEXT:    1000:      00 f0 20 e3     nop
+// CHECK-NEXT:    1004:      00 f0 20 e3     nop
+// CHECK-NEXT:    1008:      00 f0 20 e3     nop
+
+// (0x204c - 0x100c) + (0x100c - 0x1000 - 8) = 0x1044
+// CHECK:    100c:  44 10 00 00
+// (0x2054 - 0x1010) + (0x1010 - 0x1004 - 8) = 0x1048
+// CHECK-NEXT:    1010: 48 10 00 00
+// (0x205c - 0x1014) + (0x1014 - 0x1008 - 8) = 0x104c
+// CHECK-NEXT:    1014: 4c 10 00 00
+

lld/trunk/test/ELF/arm-tls-ie32.s

+// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
+// RUN: ld.lld %t.o -o %t.so -shared
+// RUN: llvm-readobj -s -dyn-relocations %t.so | FileCheck --check-prefix=SEC %s
+// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t.so | FileCheck %s
+// REQUIRES: arm
+
+// Test the handling of the initial-exec TLS model. Relative location within
+// static TLS is a run-time constant computed by dynamic loader as a result
+// of the R_ARM_TLS_TPOFF32 relocation.
+
+ .syntax unified
+ .arm
+ .globl func
+ .type  func,%function
+ .p2align 2
+func:
+.L0:
+ nop
+.L1:
+ nop
+.L2:
+ nop
+
+ .p2align 2
+// Generate R_ARM_TLS_IE32 static relocations
+// Allocates a GOT entry dynamically relocated by R_ARM_TLS_TPOFF32
+// literal contains the offset of the GOT entry from the place
+.Lt0: .word  x(gottpoff) + (. - .L0 - 8)
+.Lt1: .word  y(gottpoff) + (. - .L1 - 8)
+.Lt2: .word  .TLSSTART(gottpoff) + (. - .L2 - 8)
+
+// __thread int x = 10
+// __thread int y;
+// __thread int z __attribute((visibility("hidden")))
+ .hidden z
+ .globl  z
+ .globl  y
+ .globl  x
+
+ .section       .tbss,"awT",%nobits
+ .p2align  2
+.TLSSTART:
+ .type  z, %object
+z:
+ .space 4
+ .type  y, %object
+y:
+ .space 4
+ .section       .tdata,"awT",%progbits
+ .p2align 2
+ .type  x, %object
+x:
+ .word  10
+
+// SEC:      Name: .tdata
+// SEC-NEXT: Type: SHT_PROGBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_TLS
+// SEC-NEXT:   SHF_WRITE
+// SEC:      Size: 4
+// SEC:      Name: .tbss
+// SEC-NEXT: Type: SHT_NOBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_TLS
+// SEC-NEXT:   SHF_WRITE
+// SEC: Size: 8
+
+// SEC:      Name: .got
+// SEC-NEXT: Type: SHT_PROGBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:    SHF_ALLOC
+// SEC-NEXT:    SHF_WRITE
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x204C
+// SEC:      Size: 12
+
+
+// SEC: Dynamic Relocations {
+// SEC:  0x2054 R_ARM_TLS_TPOFF32
+// SEC:  0x204C R_ARM_TLS_TPOFF32 x
+// SEC:  0x2050 R_ARM_TLS_TPOFF32 y
+
+// CHECK: Disassembly of section .text:
+// CHECK-NEXT: func:
+// CHECK-NEXT:    1000: 00 f0 20 e3     nop
+// CHECK-NEXT:    1004: 00 f0 20 e3     nop
+// CHECK-NEXT:    1008: 00 f0 20 e3     nop
+
+// (0x204c - 0x100c) + (0x100c - 0x1000 - 8) = 0x1044
+// CHECK:         100c: 44 10 00 00
+// (0x2050 - 0x1010) + (0x1010 - 0x1004 - 8) = 0x1044
+// CHECK-NEXT:    1010: 44 10 00 00
+// (0x2054 - 0x1014) + (0x1014 - 0x1008 - 8) = 0x1044
+// CHECK-NEXT:    1014: 44 10 00 00

lld/trunk/test/ELF/arm-tls-le32.s

+// RUN: llvm-mc %s -o %t.o -filetype=obj -triple=armv7a-linux-gnueabi
+// RUN: ld.lld %t.o -o %t
+// RUN: llvm-readobj -s -dyn-relocations %t | FileCheck --check-prefix=SEC %s
+// RUN: llvm-objdump -d -triple=armv7a-linux-gnueabi %t | FileCheck %s
+// REQUIRES: arm
+
+// Test the handling of the local exec TLS model. TLS can be resolved
+// statically for an application. The code sequences assume a thread pointer
+// in r9
+
+ .text
+ .syntax unified
+ .globl  _start
+ .p2align        2
+ .type   _start,%function
+_start:
+ .p2align        2
+// Generate R_ARM_TLS_LE32 relocations. These resolve statically to the offset
+// of the variable from the thread pointer
+.Lt0: .word   x(TPOFF)
+.Lt1: .word   y(TPOFF)
+.Lt2: .word   z(TPOFF)
+
+// __thread int x = 10
+// __thread int y;
+// __thread int z __attribute((visibility("hidden")))
+
+ .hidden z
+ .globl  z
+ .globl  y
+ .globl  x
+
+ .section       .tbss,"awT",%nobits
+ .p2align  2
+.TLSSTART:
+ .type  z, %object
+z:
+ .space 4
+ .type  y, %object
+y:
+ .space 4
+ .section       .tdata,"awT",%progbits
+ .p2align 2
+ .type  x, %object
+x:
+ .word  10
+
+// SEC:      Name: .tdata
+// SEC-NEXT: Type: SHT_PROGBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_TLS
+// SEC-NEXT:   SHF_WRITE
+// SEC-NEXT:  ]
+// SEC-NEXT: Address: 0x12000
+// SEC:      Size: 4
+// SEC:      Name: .tbss
+// SEC-NEXT: Type: SHT_NOBITS
+// SEC-NEXT: Flags [
+// SEC-NEXT:   SHF_ALLOC
+// SEC-NEXT:   SHF_TLS
+// SEC-NEXT:   SHF_WRITE
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x12004
+// SEC:      Size: 8
+
+// SEC: Dynamic Relocations {
+// SEC-NEXT: }
+
+// CHECK: Disassembly of section .text:
+// CHECK-NEXT: _start:
+// offset of x from Thread pointer = (TcbSize + 0x0 = 0x8)
+// CHECK-NEXT:   11000:         08 00 00 00
+// offset of z from Thread pointer = (TcbSize + 0x8 = 0x10)
+// CHECK-NEXT:   11004:         10 00 00 00
+// offset of y from Thread pointer = (TcbSize + 0x4 = 0xc)
+// CHECK-NEXT:   11008:         0c 00 00 00