[AArch64] Set FMOVS0 and FMOVD0 as isAsCheapAsAMove when needed.

[haicheng]

Summary

If a subtarget has both ZCZeroing and CustomCheapAsMoveHandling features (now only Kryo has both), set FMOVS0 and FMOVD0 isAsCheapAsAMove.

[t.p.northover]

Looks fine to me.

Tim.

llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp

return (Subtarget.getProcFamily() == AArch64Subtarget::ExynosM1 &&
             AArch64_AM::getShiftType(Imm) == AArch64_AM::LSL);
 
   // If MOVi32imm or MOVi64imm can be expanded into ORRWri or
   // ORRXri, it is as cheap as MOV
   case AArch64::MOVi32imm:
     return canBeExpandedToORR(MI, 32);
   case AArch64::MOVi64imm:
     return canBeExpandedToORR(MI, 64);
+
+  // It is cheap to move #0 to float registers if the subtarget has 
+  // ZeroCycleZeroing feature.
+  case AArch64::FMOVS0:
+  case AArch64::FMOVD0:
+    return Subtarget.hasZeroCycleZeroing();
   }
 
   llvm_unreachable("Unknown opcode to check as cheap as a move!");
 }
 
 bool AArch64InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
                                              unsigned &SrcReg, unsigned &DstReg,
                                              unsigned &SubIdx) const {

llvm/trunk/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll

 ; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s -check-prefix=CYCLONE --check-prefix=ALL
 ; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=kryo < %s | FileCheck %s -check-prefix=KRYO --check-prefix=ALL
 
 ; rdar://11481771
 ; rdar://13713797
 
 define void @t1() nounwind ssp {
 entry:
 ; ALL-LABEL: t1:
 ; ALL-NOT: fmov
 ; CYCLONE: movi.2d v0, #0000000000000000
 ; CYCLONE: movi.2d v1, #0000000000000000
 ; CYCLONE: movi.2d v2, #0000000000000000
 ; CYCLONE: movi.2d v3, #0000000000000000
 ; KRYO: movi v0.2d, #0000000000000000
-; KRYO: mov v1.16b, v0.16b 
-; KRYO: mov v2.16b, v0.16b 
-; KRYO: mov v3.16b, v0.16b
+; KRYO: movi v1.2d, #0000000000000000
+; KRYO: movi v2.2d, #0000000000000000
+; KRYO: movi v3.2d, #0000000000000000
   tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
   ret void
 }
 
 define void @t2() nounwind ssp {
 entry:
 ; ALL-LABEL: t2:
 ; ALL-NOT: mov w0, wzr

 }
 
 define void @t4() nounwind ssp {
 ; ALL-LABEL: t4:
 ; ALL-NOT: fmov
 ; CYCLONE: movi.2d v0, #0000000000000000
 ; CYCLONE: movi.2d v1, #0000000000000000
 ; KRYO: movi v0.2d, #0000000000000000
-; KRYO: mov v1.16b, v0.16b
+; KRYO: movi v1.2d, #0000000000000000
   tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
   ret void
 }
 
 declare void @bar(double, double, double, double)
 declare void @bari(i32, i32)
 declare void @barl(i64, i64)
 declare void @barf(float, float)