AMDGPU: Fix missing scc def on control flow pseudos

[arsenm]

Summary

These are all expanded to instructions that include an scc def.

[• tstellarAMD]

LGTM.

[arsenm]

r275132

lib/Target/AMDGPU/SIInstructions.td

 def SI_MASK_BRANCH : PseudoInstSI <
   (outs), (ins brtarget:$target, SReg_64:$dst)> {
   let isBranch = 1;
   let isTerminator = 1;
   let isBarrier = 1;
   let SALU = 1;
 }
 
-let Uses = [EXEC], Defs = [EXEC] in {
+let Uses = [EXEC], Defs = [EXEC, SCC] in {
 
 let isBranch = 1, isTerminator = 1 in {
 
 def SI_IF: PseudoInstSI <
   (outs SReg_64:$dst), (ins SReg_64:$vcc, brtarget:$target),
   [(set i64:$dst, (int_amdgcn_if i1:$vcc, bb:$target))]> {
   let Constraints = "";
 }
def SI_ELSE_BREAK : PseudoInstSI <
   [(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))]
 >;
 
 def SI_END_CF : PseudoInstSI <
   (outs), (ins SReg_64:$saved),
   [(int_amdgcn_end_cf i64:$saved)]
 >;
 
-} // End Uses = [EXEC], Defs = [EXEC], usesCustomInserter = 1
+} // End Uses = [EXEC], Defs = [EXEC, SCC], usesCustomInserter = 1
 
 let Uses = [EXEC], Defs = [EXEC,VCC] in {
 def SI_KILL : PseudoInstSI <
   (outs), (ins VSrc_32:$src),
   [(AMDGPUkill i32:$src)]> {
   let isConvergent = 1;
   let usesCustomInserter = 1;
 }