[Clang][AVX512][Intrinsics]Adding intrinsics for mov{ss|sd} instruction set

[delena]

lib/Headers/avx512fintrin.h

4530

this intrinsic should be void.

test/CodeGen/avx512f-builtins.c

248

Why do you see load here?

[delena]

lib/Headers/avx512fintrin.h

9353

selectps should not be used here. It complicates IR.
You can write the following:
res = A;
res[0] = (U&1)? B[0]:W[0];

test/CodeGen/avx512f-builtins.c

395

you should not see any "load" here.

lib/Headers/avx512fintrin.h

 }
 
 static __inline __m512i __DEFAULT_FN_ATTRS
 _mm512_load_epi64 (void const *__P)
 {
   return *(__m512i *) __P;
 }
 
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_load_ss (__m128 __W, __mmask8 __U, const float* __A)
+{
+  __m128 temp = __builtin_ia32_selectps_128 ((__mmask8) __U,
+                                             (__v4sf) _mm_load_ss(__A),
+                                             (__v4sf) __W);
+  return (__m128) { temp[0], 0, 0, 0}; 
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_load_ss (__mmask8 __U, const float* __A)
+{
+  __m128 temp = __builtin_ia32_selectps_128 ((__mmask8) __U,
+                                             (__v4sf) _mm_load_ss(__A),
+                                             (__v4sf) _mm_setzero_si128());
+   return (__m128) {temp[0], 0, 0, 0};
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_load_sd (__m128d __W, __mmask8 __U, const double* __A)
+{
+ __m128d temp =  __builtin_ia32_selectpd_128 ((__mmask8) __U,
+                                              (__v2df) _mm_load_sd(__A),
+                                              (__v2df) __W);
+  return (__m128d) {temp[0], 0};
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_maskz_load_sd (__mmask8 __U, const double* __A)
+{
+  __m128d temp = __builtin_ia32_selectpd_128 ((__mmask8) __U,
+                                              (__v2df) _mm_load_sd(__A),
+                                              (__v2df) _mm_setzero_pd ());
+  return (__m128d) {temp[0], 0};
+}
+
 /* SIMD store ops */
 
 static __inline void __DEFAULT_FN_ATTRS
 _mm512_mask_storeu_epi64(void *__P, __mmask8 __U, __m512i __A)
 {
   __builtin_ia32_storedqudi512_mask ((long long *)__P, (__v8di) __A,
                                      (__mmask8) __U);
 }

 }
 
 static __inline void __DEFAULT_FN_ATTRS
 _mm512_store_epi64 (void *__P, __m512i __A)
 {
   *(__m512i *) __P = __A;
 }
 
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_store_ss (float * __W, __mmask8 __U, __m128 __A)
+{
+  if(__U & 1)
+    _mm_store_ss(__W, __A);
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_store_sd (double * __W, __mmask8 __U, __m128d __A)
+{
+  if(__U & 1)
+    _mm_store_sd(__W, __A);
+}
+
 /* Mask ops */
 
 static __inline __mmask16 __DEFAULT_FN_ATTRS
 _mm512_knot(__mmask16 __M)
 {
   return __builtin_ia32_knothi(__M);
 }
 

 static __inline__ __m512 __DEFAULT_FN_ATTRS
 _mm512_maskz_mov_ps (__mmask16 __U, __m512 __A)
 {
   return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U,
              (__v16sf) __A,
              (__v16sf) _mm512_setzero_ps ());
 }
 
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
+{
+  return (__m128) _mm_move_ss( __A, __builtin_ia32_selectps_128 ((__mmask8) __U,
+                                                                 (__v4sf) __B,
+                                                                 (__v4sf) __W));
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B)
+{
+  return (__m128) _mm_move_ss( __A, __builtin_ia32_selectps_128 ((__mmask8) __U,
+                                                                 (__v4sf) __B,
+                                                                 (__v4sf) _mm_setzero_si128()));
+}
+
+static __inline__ __m128d __DEFAULT_FN_ATTRS
+_mm_mask_move_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B)
+{
+  return (__m128d) _mm_move_sd( __A, __builtin_ia32_selectpd_128 ((__mmask8) __U,
+                                                                  (__v2df) __B,
+                                                                  (__v2df) __W));
+}
+
+static __inline__ __m128 __DEFAULT_FN_ATTRS
+_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B)
+{
+  return (__m128d) _mm_move_sd(__A, __builtin_ia32_selectpd_128 ((__mmask8) __U,
+                                                                 (__v2df) __B,
+                                                                 (__v2df) _mm_setzero_pd ()));
+}
+
+
 static __inline__ void __DEFAULT_FN_ATTRS
 _mm512_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m512d __A)
 {
   __builtin_ia32_compressstoredf512_mask ((__v8df *) __P, (__v8df) __A,
             (__mmask8) __U);
 }
 
 static __inline__ void __DEFAULT_FN_ATTRS

test/CodeGen/avx512f-builtins.c

 
 void test_mm512_mask_store_pd(void *p, __m512d a, __mmask8 m)
 {
   // CHECK-LABEL: @test_mm512_mask_store_pd
   // CHECK: @llvm.masked.store.v8f64(<8 x double> %{{.*}}, <8 x double>* %{{.*}}, i32 64, <8 x i1> %{{.*}})
   _mm512_mask_store_pd(p, m, a);
 }
 
+__m128 test_mm_mask_store_ss (float * __W, __mmask8 __U, __m128 __A)
+{
+  // CHECK-LABEL: @test_mm_mask_store_ss
+  // CHECK: store float {{.*}}, float* {{.*}}
+  // CHECK: load <4 x float>, <4 x float>* {{.*}}
+  return _mm_mask_store_ss (__W, __U, __A);
+}
+
+__m128d test_mm_mask_store_sd (double * __W, __mmask8 __U, __m128d __A)
+{
+  // CHECK-LABEL: @test_mm_mask_store_sd
+  // CHECK: store double {{.*}}, double* {{.*}}
+  // CHECK: load <2 x double>, <2 x double>* {{.*}}
+  return _mm_mask_store_sd ( __W,  __U,  __A);
+}
+
+
 void test_mm512_mask_storeu_epi32(void *__P, __mmask16 __U, __m512i __A) {
   // CHECK-LABEL: @test_mm512_mask_storeu_epi32
   // CHECK: @llvm.masked.store.v16i32(<16 x i32> %{{.*}}, <16 x i32>* %{{.*}}, i32 1, <16 x i1> %{{.*}})
   return _mm512_mask_storeu_epi32(__P, __U, __A); 
 }
 
 void test_mm512_mask_storeu_epi64(void *__P, __mmask8 __U, __m512i __A) {
   // CHECK-LABEL: @test_mm512_mask_storeu_epi64

 
 __m512d test_mm512_maskz_load_pd(__mmask8 __U, void *__P)
 {
   // CHECK-LABEL: @test_mm512_maskz_load_pd
   // CHECK: @llvm.masked.load.v8f64(<8 x double>* %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x double> %{{.*}})
   return _mm512_maskz_load_pd(__U, __P);
 }
 
+__m128 test_mm_mask_load_ss (__m128 __W, __mmask8 __U, float const* __A)
+{
+  // CHECK-LABEL: @test_mm_mask_load_ss
+  // CHECK: select <4 x i1> {{.*}}, <4 x float> {{.*}}, <4 x float> {{.*}}
+  // CHECK: load <4 x float>, <4 x float>* {{.*}}
+  return _mm_mask_load_ss ( __W,  __U,  __A);
+}
+
+__m128 test_mm_maskz_load_ss (__mmask8 __U, float const* __A)
+{
+  // CHECK-LABEL: @test_mm_maskz_load_ss
+  // CHECK: select <4 x i1> {{.*}}, <4 x float> {{.*}}, <4 x float> {{.*}}
+  // CHECK: load <4 x float>, <4 x float>* {{.*}}
+  return _mm_maskz_load_ss (__U, __A);
+}
+
+__m128d test_mm_mask_load_sd (__m128 __W, __mmask8 __U, double const* __A)
+{
+  // CHECK-LABEL: @test_mm_mask_load_sd
+  // CHECK: select <2 x i1>{{.*}}, <2 x double>{{.*}}, <2 x double>{{.*}} 
+  // CHECK: load <2 x double>, <2 x double>* {{.*}}
+  return _mm_mask_load_sd ( __W,  __U,  __A);
+}
+
+__m128d test_mm_maskz_load_sd (__mmask8 __U, double const* __A)
+{
+  // CHECK-LABEL: @test_mm_maskz_load_sd
+  // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}}
+  // CHECK: load <2 x double>, <2 x double>* {{.*}}
+  return _mm_maskz_load_sd (__U, __A);
+}
+
 __m512d test_mm512_set1_pd(double d)
 {
   // CHECK-LABEL: @test_mm512_set1_pd
   // CHECK: insertelement <8 x double> {{.*}}, i32 0
   // CHECK: insertelement <8 x double> {{.*}}, i32 1
   // CHECK: insertelement <8 x double> {{.*}}, i32 2
   // CHECK: insertelement <8 x double> {{.*}}, i32 3
   // CHECK: insertelement <8 x double> {{.*}}, i32 4

 }
 
 __m512 test_mm512_maskz_mov_ps(__mmask16 __U, __m512 __A) {
   // CHECK-LABEL: @test_mm512_maskz_mov_ps
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}}
   return _mm512_maskz_mov_ps(__U, __A); 
 }
 
+__m128 test_mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B)
+{
+  // CHECK-LABEL: @test_mm_mask_move_ss
+  // CHECK: select <4 x i1>{{.*}}, <4 x float> {{.*}}, <4 x float>{{.*}}
+  // CHECK: load <4 x float>, <4 x float>* {{.*}}
+ return _mm_mask_move_ss ( __W,  __U,  __A,  __B);
+}
+
+__m128 test_mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B)
+{
+  // CHECK-LABEL: @test_mm_maskz_move_ss
+  // CHECK: select <4 x i1>{{.*}}, <4 x float> {{.*}}, <4 x float>{{.*}}
+  // CHECK: load <4 x float>, <4 x float>* {{.*}}
+  return _mm_maskz_move_ss (__U, __A, __B);
+}
+
+__m128d test_mm_mask_move_sd (__m128 __W, __mmask8 __U, __m128d __A, __m128d __B)
+{
+  // CHECK-LABEL: @test_mm_mask_move_sd
+  // CHECK: select <2 x i1>{{.*}}, <2 x double>{{.*}}, <2 x double>{{.*}}
+  // CHECK: load <2 x double>, <2 x double>* {{.*}}
+  return _mm_mask_move_sd ( __W,  __U,  __A,  __B);
+}
+
+__m128d test_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B)
+{
+  // CHECK-LABEL: @test_mm_maskz_move_sd
+  // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}}
+  // CHECK: load <2 x double>, <2 x double>* {{.*}}
+  return _mm_maskz_move_sd (__U, __A, __B);
+}
+
 void test_mm512_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m512d __A) {
   // CHECK-LABEL: @test_mm512_mask_compressstoreu_pd
   // CHECK: @llvm.x86.avx512.mask.compress.store.pd.512
   return _mm512_mask_compressstoreu_pd(__P, __U, __A); 
 }
 
 void test_mm512_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m512i __A) {
   // CHECK-LABEL: @test_mm512_mask_compressstoreu_epi64