Support/ELF: Add AMDGPU relocation definitions to match documentation

[• tstellarAMD]

These are the non-codegen parts of D21400 and D21401 split out into a separate patch. I also dropped the RelocVisitor changes, because I was using the wrong kinds of relocations for DWARF. These changes will be re-visited when we do more work on DWARF support.

[kzhuravl]

Can you add a test? something along these lines:
http://reviews.llvm.org/file/data/lxwxdp2mphkmmbhdplym/PHID-FILE-z7hdaz3x2zhor57rst56/test_Object_AMDGPU_elf64-relocs.yaml

for each relocation.

[• tstellarAMD]

Add yaml test case.

[kzhuravl]

LGTM

[• rafael]

LGTM too

include/llvm/Support/ELF.h

 #include "ELFRelocs/Sparc.def"
 };
 
 // ELF Relocation types for WebAssembly
 enum {
 #include "ELFRelocs/WebAssembly.def"
 };
 
+// ELF Relocation types for AMDGPU
+enum {
+#include "ELFRelocs/AMDGPU.def"
+};
+
 #undef ELF_RELOC
 
 // Section header.
 struct Elf32_Shdr {
   Elf32_Word sh_name;      // Section name (index into string table)
   Elf32_Word sh_type;      // Section type (SHT_*)
   Elf32_Word sh_flags;     // Section flags (SHF_*)
   Elf32_Addr sh_addr;      // Address where section is to be loaded

include/llvm/Support/ELFRelocs/AMDGPU.def

+#ifndef ELF_RELOC
+#error "ELF_RELOC must be defined"
+#endif
+
+ELF_RELOC(R_AMDGPU_NONE,          0)
+ELF_RELOC(R_AMDGPU_ABS32_LO,      1)
+ELF_RELOC(R_AMDGPU_ABS32_HI,      2)
+ELF_RELOC(R_AMDGPU_ABS64,         3)
+ELF_RELOC(R_AMDGPU_REL32,         4)
+ELF_RELOC(R_AMDGPU_REL64,         5)
+ELF_RELOC(R_AMDGPU_ABS32,         6)

lib/Object/ELF.cpp

#include "llvm/Support/ELFRelocs/Sparc.def"
     break;
   case ELF::EM_WEBASSEMBLY:
     switch (Type) {
 #include "llvm/Support/ELFRelocs/WebAssembly.def"
     default:
       break;
     }
     break;
+  case ELF::EM_AMDGPU:
+    switch (Type) {
+#include "llvm/Support/ELFRelocs/AMDGPU.def"
+    default:
+      break;
+    }
+    break;
   default:
     break;
   }
   return "Unknown";
 }
 
 #undef ELF_RELOC
 
 } // end namespace object
 } // end namespace llvm

lib/ObjectYAML/ELFYAML.cpp

 #include "llvm/Support/ELFRelocs/AArch64.def"
     break;
   case ELF::EM_ARM:
 #include "llvm/Support/ELFRelocs/ARM.def"
     break;
   case ELF::EM_LANAI:
 #include "llvm/Support/ELFRelocs/Lanai.def"
     break;
+  case ELF::EM_AMDGPU:
+#include "llvm/Support/ELFRelocs/AMDGPU.def"
+    break;
   default:
     llvm_unreachable("Unsupported architecture");
   }
 #undef ELF_RELOC
 }
 
 void ScalarEnumerationTraits<ELFYAML::MIPS_AFL_REG>::enumeration(
     IO &IO, ELFYAML::MIPS_AFL_REG &Value) {