[mips] bnec/beqc register constraint fix

[sdardis]

Summary

beqc and bnec cannot have $rs == $rt. Inhibit compact branch creation
if that would occur.

[dsanders]

This needs a test case. Going by the original 7MB reproducer I think we need a test case with a conditional branch where both operands are evaluated in different basic blocks but can be CSE'd. I think the compiler should have eliminated the branch as well though since 'bnec $5, $5, ...' is never going to be taken.

[sdardis]

Added a test reduced down from bug report.

[dsanders]

test/CodeGen/Mips/compactbranches/beqc-bnec-register-constraint.ll

35–36 ↗

(On Diff #58767)

; CHECK-NOT: bnec $[[R0:[0-9]+]], R0

The R0 and R1 should be [[R0]] and [[R1]]

Also, I'm not sure variables can be used in the same directive that defines them. I'll double check that.

[dsanders]

LGTM with the missing [[ and ]] added.

test/CodeGen/Mips/compactbranches/beqc-bnec-register-constraint.ll

35–36 ↗

(On Diff #58767)

Also, I'm not sure variables can be used in the same directive that defines them. I'll double check that.

This works.

[sdardis]

Thanks for the review.

lib/Target/Mips/MipsInstrInfo.cpp

if (Subtarget.hasMips32r6() || canUseShortMicroMipsCTI) {
     switch (Opcode) {
     case Mips::B:
       return Mips::BC;
     case Mips::BAL:
       return Mips::BALC;
     case Mips::BEQ:
       if (canUseShortMicroMipsCTI)
         return Mips::BEQZC_MM;
-      else
-        return Mips::BEQC;
+      else if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
+        return 0;
     case Mips::BNE:
       if (canUseShortMicroMipsCTI)
         return Mips::BNEZC_MM;
-      else
-        return Mips::BNEC;
+      else if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
+        return 0;
     case Mips::BGE:
       if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
         return 0;
       return Mips::BGEC;
     case Mips::BGEU:
       if (I->getOperand(0).getReg() == I->getOperand(1).getReg())
         return 0;
       return Mips::BGEUC;