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Differential D20618

[Clang][avx512][builtin] Adding missing intrinsics for cvt
ClosedPublic

Authored by m_zuckerman on May 25 2016, 6:03 AM.

Details

Reviewers
AsafBadouh
delena
igorb
Commits
rG9fcf3552add6: [Clang][avx512][builtin] Adding missing intrinsics for cvt
rC271205: [Clang][avx512][builtin] Adding missing intrinsics for cvt
rL271205: [Clang][avx512][builtin] Adding missing intrinsics for cvt

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Event Timeline

m_zuckerman updated this revision to Diff 58405.May 25 2016, 6:03 AM
m_zuckerman retitled this revision from to [Clang][avx512][builtin] Adding missing intrinsics for cvt .
m_zuckerman updated this object.
m_zuckerman added reviewers: AsafBadouh, igorb, delena.
m_zuckerman added a subscriber: cfe-commits.
delena accepted this revision.May 26 2016, 1:00 PM
delena edited edge metadata.
This revision is now accepted and ready to land.May 26 2016, 1:00 PM
Closed by commit rL271205: [Clang][avx512][builtin] Adding missing intrinsics for cvt (authored by mzuckerm). · Explain WhyMay 30 2016, 6:28 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Headers/
11 lines
test/
CodeGen/
7 lines

Diff 58405

lib/Headers/avx512fintrin.h

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_mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A) _mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A)
{ {
return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A, return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
(__v16si) __W, (__v16si) __W,
(__mmask16) __U, (__mmask16) __U,
_MM_FROUND_CUR_DIRECTION); _MM_FROUND_CUR_DIRECTION);
} }
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_maskz_cvtps_epu32 ( __mmask16 __U, __m512 __A)
{
return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,
(__v16si)
_mm512_setzero_si512 (),
(__mmask16) __U ,
_MM_FROUND_CUR_DIRECTION);
}
#define _mm512_cvt_roundpd_epu32(A, R) __extension__ ({ \ #define _mm512_cvt_roundpd_epu32(A, R) __extension__ ({ \
(__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \ (__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \
(__v8si)_mm256_setzero_si256(), \ (__v8si)_mm256_setzero_si256(), \
(__mmask8)-1, (int)(R)); }) (__mmask8)-1, (int)(R)); })
static __inline__ __m256i __DEFAULT_FN_ATTRS static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm512_cvtpd_epu32 (__m512d __A) _mm512_cvtpd_epu32 (__m512d __A)
{ {
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test/CodeGen/avx512f-builtins.c

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__m512i test_mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A) __m512i test_mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A)
{ {
// CHECK-LABEL: @test_mm512_mask_cvtps_epu32 // CHECK-LABEL: @test_mm512_mask_cvtps_epu32
// CHECK: @llvm.x86.avx512.mask.cvtps2udq.512 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.512
return _mm512_mask_cvtps_epu32( __W, __U, __A); return _mm512_mask_cvtps_epu32( __W, __U, __A);
} }
__m512i test_mm512_maskz_cvtps_epu32 (__mmask16 __U, __m512 __A)
{
// CHECK-LABEL: @test_mm512_mask_cvtps_epu32
// CHECK: @llvm.x86.avx512.mask.cvtps2udq.512
return _mm512_mask_cvtps_epu32( __U, __A);
}
__m512d test_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) __m512d test_mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B)
{ {
// CHECK-LABEL: @test_mm512_mask_max_pd // CHECK-LABEL: @test_mm512_mask_max_pd
// CHECK: @llvm.x86.avx512.mask.max.pd.512 // CHECK: @llvm.x86.avx512.mask.max.pd.512
return _mm512_mask_max_pd (__W,__U,__A,__B); return _mm512_mask_max_pd (__W,__U,__A,__B);
} }
__m512d test_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) __m512d test_mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B)
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