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[AMDGPU] Assembler: basic support for SDWA instructions
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Authored by SamWot on Apr 21 2016, 5:16 AM.

Details

Summary

Support for SDWA instructions for VOP1 and VOP2 encoding.
Not done yet:

  • converters for support optional operands and modifiers
  • VOPC
  • sext() modifier
  • intrinsics
  • VOP2b (see vop_dpp.s)
  • V_MAC_F32 (see vop_dpp.s)

Diff Detail

Repository
rL LLVM

Event Timeline

SamWot updated this revision to Diff 54488.Apr 21 2016, 5:16 AM
SamWot retitled this revision from to [AMDGPU] Assembler: basic support for SDWA instructions.
SamWot updated this object.
SamWot added reviewers: nhaustov, vpykhtin.
SamWot edited edge metadata.Apr 21 2016, 5:17 AM
SamWot added a project: Restricted Project.
nhaustov added inline comments.Apr 21 2016, 6:15 AM
test/MC/AMDGPU/vop_sdwa.s
15 ↗(On Diff #54488)

Please use registers different from v0 to make sure it is visible in the encoding.

SamWot updated this revision to Diff 54624.Apr 22 2016, 3:36 AM

Updated test to use registers other than v0

nhaustov accepted this revision.Apr 25 2016, 6:29 AM
nhaustov edited edge metadata.

LGTM

This revision is now accepted and ready to land.Apr 25 2016, 6:29 AM
This revision was automatically updated to reflect the committed changes.