[AMDGPU] Assembler: prevent parseDPPCtrlOps from eating invalid tokens

[nhaustov]

LGTM

llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

return ((Imm >= 0x000) && (Imm <= 0x0ff)) ||
            (Imm == 0x142) ||
            (Imm == 0x143);
   }
   return false;
 }
 
 AMDGPUAsmParser::OperandMatchResultTy
 AMDGPUAsmParser::parseDPPCtrlOps(OperandVector &Operands) {
-  // ToDo: use same syntax as sp3 for dpp_ctrl
   SMLoc S = Parser.getTok().getLoc();
   StringRef Prefix;
   int64_t Int;
 
   if (getLexer().getKind() == AsmToken::Identifier) {
     Prefix = Parser.getTok().getString();
   } else {
     return MatchOperand_NoMatch;
   }
 
   if (Prefix == "row_mirror") {
     Int = 0x140;
   } else if (Prefix == "row_half_mirror") {
     Int = 0x141;
   } else {
+    // Check to prevent parseDPPCtrlOps from eating invalid tokens
+    if (Prefix != "quad_perm"
+        && Prefix != "row_shl"
+        && Prefix != "row_shr"
+        && Prefix != "row_ror"
+        && Prefix != "wave_shl"
+        && Prefix != "wave_rol"
+        && Prefix != "wave_shr"
+        && Prefix != "wave_ror"
+        && Prefix != "row_bcast") {
+      return MatchOperand_NoMatch;
+    }
+
     Parser.Lex();
     if (getLexer().isNot(AsmToken::Colon))
       return MatchOperand_ParseFail;
 
     if (Prefix == "quad_perm") {
       // quad_perm:[%d,%d,%d,%d]
       Parser.Lex();
       if (getLexer().isNot(AsmToken::LBrac))
if (Prefix == "quad_perm") {
         Int = 0x13C;
       } else if (Prefix == "row_bcast") {
         if (Int == 15) {
           Int = 0x142;
         } else if (Int == 31) {
           Int = 0x143;
         }
       } else {
-        return MatchOperand_NoMatch;
+        return MatchOperand_ParseFail;
       }
     }
   }
   Parser.Lex(); // eat last token
 
   Operands.push_back(AMDGPUOperand::CreateImm(Int, S,
                                               AMDGPUOperand::ImmTyDppCtrl));
   return MatchOperand_Success;