Make TLS work for PIE executables on aarch64.

[ed]

Summary

Similar to r265462, TLS related relocations aren't marked as relative,
meaning that we end up generating R_AARCH64_RELATIVE relocations for
them. This change adds TLS relocations that I've seen on my system. With
this patch applied CloudABI's unit testing binary now passes on aarch64.

[ruiu]

LGTM

ELF/Target.cpp

1256–1274

Please sort them in a follow-up patch.

ELF/Target.cpp

AArch64TargetInfo::AArch64TargetInfo() {
   PltEntrySize = 16;
   PltZeroSize = 32;
 }
 
 bool AArch64TargetInfo::isRelRelative(uint32_t Type) const {
   switch (Type) {
   default:
     return false;
+  case R_AARCH64_TLSLE_ADD_TPREL_HI12:
+  case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+  case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
+  case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
   case R_AARCH64_PREL32:
   case R_AARCH64_ADR_PREL_LO21:
   case R_AARCH64_ADR_PREL_PG_HI21:
   case R_AARCH64_ADR_GOT_PAGE:
   case R_AARCH64_LDST8_ABS_LO12_NC:
   case R_AARCH64_LDST16_ABS_LO12_NC:
   case R_AARCH64_LDST32_ABS_LO12_NC:
   case R_AARCH64_LDST64_ABS_LO12_NC:
   case R_AARCH64_LDST128_ABS_LO12_NC:
   case R_AARCH64_ADD_ABS_LO12_NC:
   case R_AARCH64_CALL26:
   case R_AARCH64_JUMP26:
   case R_AARCH64_CONDBR19:
   case R_AARCH64_TSTBR14:
   case R_AARCH64_PREL64:
     return true;
   }
 }
 
 bool AArch64TargetInfo::isTlsGlobalDynamicRel(uint32_t Type) const {
   return Type == R_AARCH64_TLSDESC_ADR_PAGE21 ||
          Type == R_AARCH64_TLSDESC_LD64_LO12_NC ||
          Type == R_AARCH64_TLSDESC_ADD_LO12_NC ||

test/ELF/aarch64-tls-pie.s

+# REQUIRES: aarch64
+# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-cloudabi %s -o %t1.o
+# RUN: ld.lld -pie %t1.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck %s
+
+# Similar to bug 27174: R_AARCH64_TLSLE_*TPREL* relocations should be
+# eliminated when building a PIE executable, as the static TLS layout is
+# fixed.
+#
+# CHECK:      Relocations [
+# CHECK-NEXT: ]
+
+  .globl  _start
+_start:
+  # Accessing the variable directly.
+  add x11, x8, :tprel_hi12:i
+  add x11, x11, :tprel_lo12_nc:i
+
+  # Accessing the variable through the GOT.
+  adrp  x10, :gottprel:i
+  mrs x8, TPIDR_EL0
+  ldr  x10, [x10, :gottprel_lo12:i]
+
+  .section  .tbss.i,"awT",@nobits
+  .globl  i
+i:
+  .word 0
+  .size i, 4