Fix SROA creating invalid bitcasts between address spaces

[arsenm]

Ping!

[arsenm]

Ping!

[david.tweed]

lib/Transforms/Scalar/SROA.cpp

2530

The patch as a whole seems to make sense, but I wonder if it might make sense in the long run to add a convenience member function "getPointerToInSameAddrSpace(OtherPtr)"? It probably depends how many places crop up that need this, but if more are going to turn up it might be clearer. Not sure.

[pekka.jaaskelainen]

This patch fixes http://llvm.org/bugs/show_bug.cgi?id=15907 for me. It applies to LLVM 3.4 and make check passes. Could we get this in there also?

[david.tweed]

I think it's important to stop the crashing when doing SROA on this kind of code. This patch seems like the right way to do this, so I think moving it in to trunk (at least) is warranted. However, I don't claim to fully understand the intricacies of SROA so I'd prefer someone knowledgeable to do another pass on this.

[joey]

lib/Transforms/Scalar/SROA.cpp

1432

This line can also crash! I'll try get a test case.

[joey]

lib/Transforms/Scalar/SROA.cpp

1432

Here is the test case, it runs with 'opt -sroa'.

target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
target triple = "armv7-none-linux-gnueabi"

%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] }

; Function Attrs: nounwind
define void @copy_struct([5 x i64] %in.coerce) {
for.end:
  %in = alloca %struct.struct_test_27.0.13, align 8
  %0 = bitcast %struct.struct_test_27.0.13* %in to [5 x i64]*
  store [5 x i64] %in.coerce, [5 x i64]* %0, align 8
  %scevgep9 = getelementptr %struct.struct_test_27.0.13* %in, i32 0, i32 4, i32 0
  %scevgep910 = bitcast i32* %scevgep9 to i8*
  call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* undef, i8* %scevgep910, i32 16, i32 4, i1 false)
  ret void 
}

; Function Attrs: nounwind 
declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture readonly, i32, i32, i1)

[arsenm]

Merge in other SROA address patches I had lying around, add another testcase.

[arsenm]

Ping

lib/Transforms/Scalar/SROA.cpp

1432

This works for me. I have a couple more patches that fix SROA address spaces that I missed on the first pass, but they don't seem necessary to also fix this.

[chandlerc]

Matt, this change is simply not in a useful state to review, much less commit.

To try to give you an idea of how broken this currently is, I spent the afternoon working through it.

1. The change as posted doesn't pass its own tests. It appears you merged the test changes from D1765 into here, but not the code changes? I backed those out to get to a state that passed its own tests.
2. Several of the changes which seem correct don't actually get exercised by any of your tests. It's not surprising as these changes are used to form GEPs and other complex pointers, and none of your test cases do anything like this. The only thing you have tested is doing memcpy across address spaces. So only those changes really make sense.
3. One of the changes to the memcpy rewriting also didn't get exercised by your existing test cases. This is because that change is to the "vector-load" based memcpy rewriting rules and none of your test cases trigger vector rewriting.
4. Right above the changes you made to memcpy rewriting is a totally separate (and important!) path for memcpy rewriting where we form a *new* memcpy. You didn't write any test cases for this. In fact, doing so would also provide a the root of a test case for the change Joey found (I don't know off hand what all would be required).
5. Several of your changes are to code for rewriting loads and stores. The only loads and stores SROA currently rewrites are *alloca* loads and stores, so these changes are actually unnecessary given the current semantic constraint model which SROA operates under: alloca pointers are always in the default address space.
6. Despite the changes I mention in #5, you didn't fix any of the *other* numerous places where we create loads, stores, or pointer casts in SROA for alloca-derived pointers, and so even if we were to allow allocas in different address spaces, the change as it stands doesn't seem like a principled change in that direction (although it might be a good incremental step).

I now have a minimal patch and 3 test cases which fix half of memcpy rewriting. If you can provide a test case for vector-load/store based memcpy rewriting which exercises the 3'rd aspect of that change, I would be happy to submit that as a first step. That is what I would pursue as the next step to make forward progress.

After that, you should provide test cases which exercise the other half of memcpy rewriting at all, and fixes the obvious bugs there.

Finally you should provide test cases which form interesting pointer adjustments including complex "natural" GEPs in the process of memcpy rewriting in order to flush out the bugs inside of getAdjustedPtr (and getNaturalGEPWithOffset). This will probably also require the first change in D1765 (I think, this I haven't actually tested as I was trying to get through D1764).

I have left comments in-line on the patch to highlight which changes are which, and to provide clarification.

-Chandler

lib/Transforms/Scalar/SROA.cpp

1327

No test case actually requires this change. I think this is actually necessary, but we really need a test case for it.

1428–1430

I also think this change is likely necessary, but again no test case fails if I delete it. We need a test case here as well.

1432

Joey, I have run this test case through opt with just the two diff hunks that are were already tested, and it passed for me every time I tried it.

2118

This change is unnecessary.

2143

This change is unnecessary.

2254–2256

This change is unnecessary.

2546

Undoing this change doesn't cause any test regressions. This change is *definitely* correct, but still needs a test case.

[arsenm]

Thanks for the review! Some of the pieces aren't supposed to be strictly necessary. I'm also trying to get rid of the default address space arguments, and it seems like a better idea to do the consistent thing and get the address space from the value rather than hardcoding to 0 since you know it's an alloca derived pointer. I'll work on updating the tests tomorrow

[arsenm]

Add / replace some tests to hit a few more lines, resplit removing default address space arguments to separate patch

[arsenm]

Ping

[arsenm]

Ping

[pekka.jaaskelainen]

FWIW, I just tested that the updated patch still fixes the issue I saw and applies to the 3.4 branch.

[silviu.baranga]

Hi,

Is this being progressed? I've encountered this issue recently on trunk (r199497) so the problem is still there.
It would be really nice to have a fix for this go into trunk.

Thanks,
Silviu

[arsenm]

Ping

[• rafael]

test/Transforms/SROA/basictest.ll

4

Why do you need to change this? Nothing on this test uses an address space.

[arsenm]

test/Transforms/SROA/basictest.ll

4

This belongs with the one of my other SROA patches which does touch this test

[arsenm]

test/Transforms/SROA/basictest.ll

4

Actually, it's used in this one too with the newly added @PR14105_as1 test

[• rafael]

---

Matt Arsenault wrote:

Rafael Ávila de Espíndola wrote:

Why do you need to change this? Nothing on this test uses an address space.

This belongs with the one of my other SROA patches which does touch this test

Actually, it's used in this one too with the newly added @PR14105_as1 test

Sorry. In phab it looked like a new file when I first looked at it.

Cheers,
Rafael

[• rafael]

Sorry. In phab it looked like a new file when I first looked at it.

OK, I tried to take a quick look, but there is no way that I can get
enough confidence on how SROA works in a short time.

In the end I just extracted a trivial cleanup from this patch
(r201425) and rebased it on trunk (attached).

I also checked that every use of an address space in the patch is tested.

Cheers,
Rafael

• {F37588, layout=link}

[chandlerc]

After fighting some fires in SROA, all of the state for this was fresh in my head so I took another look at this.

The patch looked essentially good at this point (and thanks for helping with the test case validation Rafael!), but pointed out some really terrible factoring and cleanup in the memcpy rewriter. I've cleaned all of that cruft up, and applied a rebased version of this patch with just a few tweaks in r202247.

[arsenm]

Can we get this into the 3.4.1 branch?

lib/Transforms/Scalar/SROA.cpp

 /// If no natural GEP can be constructed, this function returns null.
 static Value *getNaturalGEPWithOffset(IRBuilderTy &IRB, const DataLayout &DL,
                                       Value *Ptr, APInt Offset, Type *TargetTy,
                                       SmallVectorImpl<Value *> &Indices) {
   PointerType *Ty = cast<PointerType>(Ptr->getType());
 
   // Don't consider any GEPs through an i8* as natural unless the TargetTy is
   // an i8.
-  if (Ty == IRB.getInt8PtrTy() && TargetTy->isIntegerTy(8))
+  if (Ty == IRB.getInt8PtrTy(Ty->getAddressSpace()) && TargetTy->isIntegerTy(8))
     return 0;
 
   Type *ElementTy = Ty->getElementType();
   if (!ElementTy->isSized())
     return 0; // We can't GEP through an unsized element.
   APInt ElementSize(Offset.getBitWidth(), DL.getTypeAllocSize(ElementTy));
   if (ElementSize == 0)
     return 0; // Zero-length arrays can't help us build a natural GEP.
do {
     } else {
       break;
     }
     assert(Ptr->getType()->isPointerTy() && "Unexpected operand type!");
   } while (Visited.insert(Ptr));
 
   if (!OffsetPtr) {
     if (!Int8Ptr) {
-      Int8Ptr = IRB.CreateBitCast(Ptr, IRB.getInt8PtrTy(),
+      unsigned AS = Ptr->getType()->getPointerAddressSpace();
+      Int8Ptr = IRB.CreateBitCast(Ptr, IRB.getInt8PtrTy(AS),
                                   "raw_cast");
       Int8PtrOffset = Offset;
     }
 
     OffsetPtr = Int8PtrOffset == 0 ? Int8Ptr :
       IRB.CreateInBoundsGEP(Int8Ptr, IRB.getInt(Int8PtrOffset),
                             "raw_idx");
   }
   Ptr = OffsetPtr;
 
   // On the off chance we were targeting i8*, guard the bitcast here.
   if (Ptr->getType() != PointerTy)
if (VecTy) {
       V = rewriteVectorizedLoadInst(NewBeginOffset, NewEndOffset);
     } else if (IntTy && LI.getType()->isIntegerTy()) {
       V = rewriteIntegerLoad(LI, NewBeginOffset, NewEndOffset);
     } else if (NewBeginOffset == NewAllocaBeginOffset &&
                canConvertValue(DL, NewAllocaTy, LI.getType())) {
       V = IRB.CreateAlignedLoad(&NewAI, NewAI.getAlignment(),
                                 LI.isVolatile(), "load");
     } else {
       Type *LTy = TargetTy->getPointerTo();
       V = IRB.CreateAlignedLoad(
           getAdjustedAllocaPtr(IRB, NewBeginOffset, LTy),
           getOffsetTypeAlign(TargetTy, NewBeginOffset - NewAllocaBeginOffset),
           LI.isVolatile(), "load");
       IsPtrAdjusted = true;
     }
     V = convertValue(DL, IRB, V, TargetTy);
 
     if (IsSplit) {
       assert(!LI.isVolatile());
       assert(LI.getType()->isIntegerTy() &&
              "Only integer type loads and stores are split");
       assert(Size < DL.getTypeStoreSize(LI.getType()) &&
              "Split load isn't smaller than original load");
       assert(LI.getType()->getIntegerBitWidth() ==
              DL.getTypeStoreSizeInBits(LI.getType()) &&
              "Non-byte-multiple bit width");
       // Move the insertion point just past the load so that we can refer to it.
       IRB.SetInsertPoint(llvm::next(BasicBlock::iterator(&LI)));
       // Create a placeholder value with the same type as LI to use as the
       // basis for the new value. This allows us to replace the uses of LI with
       // the computed value, and then replace the placeholder with LI, leaving
       // LI only used for this computation.
       Value *Placeholder
         = new LoadInst(UndefValue::get(LI.getType()->getPointerTo()));
       V = insertInteger(DL, IRB, Placeholder, V, NewBeginOffset,
                         "insert");
       LI.replaceAllUsesWith(V);
       Placeholder->replaceAllUsesWith(&LI);
       delete Placeholder;
     } else {
       LI.replaceAllUsesWith(V);
     }
bool visitStoreInst(StoreInst &SI) {
     StoreInst *NewSI;
     if (NewBeginOffset == NewAllocaBeginOffset &&
         NewEndOffset == NewAllocaEndOffset &&
         canConvertValue(DL, V->getType(), NewAllocaTy)) {
       V = convertValue(DL, IRB, V, NewAllocaTy);
       NewSI = IRB.CreateAlignedStore(V, &NewAI, NewAI.getAlignment(),
                                      SI.isVolatile());
     } else {
       Value *NewPtr = getAdjustedAllocaPtr(IRB, NewBeginOffset,
                                            V->getType()->getPointerTo());
       NewSI = IRB.CreateAlignedStore(
           V, NewPtr, getOffsetTypeAlign(
                          V->getType(), NewBeginOffset - NewAllocaBeginOffset),
           SI.isVolatile());
     }
     (void)NewSI;
     Pass.DeadInsts.insert(&SI);
     deleteIfTriviallyDead(OldOp);
 
bool visitMemTransferInst(MemTransferInst &II) {
     // Compute the intersecting offset range.
     assert(BeginOffset < NewAllocaEndOffset);
     assert(EndOffset > NewAllocaBeginOffset);
     uint64_t NewBeginOffset = std::max(BeginOffset, NewAllocaBeginOffset);
     uint64_t NewEndOffset = std::min(EndOffset, NewAllocaEndOffset);
 
     assert(II.getRawSource() == OldPtr || II.getRawDest() == OldPtr);
     bool IsDest = II.getRawDest() == OldPtr;
+    Value *OtherPtr = IsDest ? II.getRawSource() : II.getRawDest();
+    unsigned OtherAS = OtherPtr->getType()->getPointerAddressSpace();
+    Type *OtherPtrTy = NewAllocaTy->getPointerTo(OtherAS);
 
     // Compute the relative offset within the transfer.
-    unsigned IntPtrWidth = DL.getPointerSizeInBits();
+    unsigned IntPtrWidth = DL.getPointerSizeInBits(OtherAS);
     APInt RelOffset(IntPtrWidth, NewBeginOffset - BeginOffset);
 
     unsigned Align = II.getAlignment();
     uint64_t SliceOffset = NewBeginOffset - NewAllocaBeginOffset;
     if (Align > 1)
       Align =
           MinAlign(RelOffset.zextOrTrunc(64).getZExtValue(),
                    MinAlign(II.getAlignment(), getOffsetAlign(SliceOffset)));
if (EmitMemCpy && &OldAI == &NewAI) {
                                       NewEndOffset - NewBeginOffset));
       return false;
     }
     // Record this instruction for deletion.
     Pass.DeadInsts.insert(&II);
 
     // Strip all inbounds GEPs and pointer casts to try to dig out any root
     // alloca that should be re-examined after rewriting this instruction.
-    Value *OtherPtr = IsDest ? II.getRawSource() : II.getRawDest();
     if (AllocaInst *AI
           = dyn_cast<AllocaInst>(OtherPtr->stripInBoundsOffsets()))
       Pass.Worklist.insert(AI);
 
     if (EmitMemCpy) {
-      Type *OtherPtrTy = IsDest ? II.getRawSource()->getType()
-                                : II.getRawDest()->getType();
+      Type *OtherPtrTy = OtherPtr->getType();
 
       // Compute the other pointer, folding as much as possible to produce
       // a single, simple GEP in most cases.
       OtherPtr = getAdjustedPtr(IRB, DL, OtherPtr, RelOffset, OtherPtrTy);
 
       Value *OurPtr = getAdjustedAllocaPtr(
           IRB, NewBeginOffset,
           IsDest ? II.getRawDest()->getType() : II.getRawSource()->getType());
       Type *SizeTy = II.getLength()->getType();
       Constant *Size = ConstantInt::get(SizeTy, NewEndOffset - NewBeginOffset);
 
       CallInst *New = IRB.CreateMemCpy(IsDest ? OurPtr : OtherPtr,
                                        IsDest ? OtherPtr : OurPtr,
                                        Size, Align, II.isVolatile());
       (void)New;
       DEBUG(dbgs() << "          to: " << *New << "\n");
       return false;
     }
 
     // Note that we clamp the alignment to 1 here as a 0 alignment for a memcpy
     // is equivalent to 1, but that isn't true if we end up rewriting this as
     // a load or store.
     if (!Align)
       Align = 1;
 
     bool IsWholeAlloca = NewBeginOffset == NewAllocaBeginOffset &&
                          NewEndOffset == NewAllocaEndOffset;
     uint64_t Size = NewEndOffset - NewBeginOffset;
     unsigned BeginIndex = VecTy ? getIndex(NewBeginOffset) : 0;
     unsigned EndIndex = VecTy ? getIndex(NewEndOffset) : 0;
     unsigned NumElements = EndIndex - BeginIndex;
     IntegerType *SubIntTy
       = IntTy ? Type::getIntNTy(IntTy->getContext(), Size*8) : 0;
 
-    Type *OtherPtrTy = NewAI.getType();
     if (VecTy && !IsWholeAlloca) {
       if (NumElements == 1)
         OtherPtrTy = VecTy->getElementType();
       else
         OtherPtrTy = VectorType::get(VecTy->getElementType(), NumElements);
 
-      OtherPtrTy = OtherPtrTy->getPointerTo();
+      OtherPtrTy = OtherPtrTy->getPointerTo(OtherAS);
     } else if (IntTy && !IsWholeAlloca) {
-      OtherPtrTy = SubIntTy->getPointerTo();
+      OtherPtrTy = SubIntTy->getPointerTo(OtherAS);
     }
 
     Value *SrcPtr = getAdjustedPtr(IRB, DL, OtherPtr, RelOffset, OtherPtrTy);
     Value *DstPtr = &NewAI;
     if (!IsDest)
       std::swap(SrcPtr, DstPtr);
 
     Value *Src;

test/Transforms/SROA/address-spaces.ll

+; RUN: opt < %s -sroa -S | FileCheck %s
+target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
+
+declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1)
+declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture readonly, i32, i32, i1)
+declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture readonly, i32, i32, i1)
+declare void @llvm.memcpy.p1i8.p1i8.i32(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture readonly, i32, i32, i1)
+
+
+; Make sure an illegal bitcast isn't introduced
+define void @test_address_space_1_1(<2 x i64> addrspace(1)* %a, i16 addrspace(1)* %b) {
+; CHECK-LABEL: @test_address_space_1_1(
+; CHECK: load <2 x i64> addrspace(1)* %a, align 2
+; CHECK: store <2 x i64> {{.*}}, <2 x i64> addrspace(1)* {{.*}}, align 2
+; CHECK: ret void
+  %aa = alloca <2 x i64>, align 16
+  %aptr = bitcast <2 x i64> addrspace(1)* %a to i8 addrspace(1)*
+  %aaptr = bitcast <2 x i64>* %aa to i8*
+  call void @llvm.memcpy.p0i8.p1i8.i32(i8* %aaptr, i8 addrspace(1)* %aptr, i32 16, i32 2, i1 false)
+  %bptr = bitcast i16 addrspace(1)* %b to i8 addrspace(1)*
+  call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* %bptr, i8* %aaptr, i32 16, i32 2, i1 false)
+  ret void
+}
+
+define void @test_address_space_1_0(<2 x i64> addrspace(1)* %a, i16* %b) {
+; CHECK-LABEL: @test_address_space_1_0(
+; CHECK: load <2 x i64> addrspace(1)* %a, align 2
+; CHECK: store <2 x i64> {{.*}}, <2 x i64>* {{.*}}, align 2
+; CHECK: ret void
+  %aa = alloca <2 x i64>, align 16
+  %aptr = bitcast <2 x i64> addrspace(1)* %a to i8 addrspace(1)*
+  %aaptr = bitcast <2 x i64>* %aa to i8*
+  call void @llvm.memcpy.p0i8.p1i8.i32(i8* %aaptr, i8 addrspace(1)* %aptr, i32 16, i32 2, i1 false)
+  %bptr = bitcast i16* %b to i8*
+  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %bptr, i8* %aaptr, i32 16, i32 2, i1 false)
+  ret void
+}
+
+define void @test_address_space_0_1(<2 x i64>* %a, i16 addrspace(1)* %b) {
+; CHECK-LABEL: @test_address_space_0_1(
+; CHECK: load <2 x i64>* %a, align 2
+; CHECK: store <2 x i64> {{.*}}, <2 x i64> addrspace(1)* {{.*}}, align 2
+; CHECK: ret void
+  %aa = alloca <2 x i64>, align 16
+  %aptr = bitcast <2 x i64>* %a to i8*
+  %aaptr = bitcast <2 x i64>* %aa to i8*
+  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %aaptr, i8* %aptr, i32 16, i32 2, i1 false)
+  %bptr = bitcast i16 addrspace(1)* %b to i8 addrspace(1)*
+  call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* %bptr, i8* %aaptr, i32 16, i32 2, i1 false)
+  ret void
+}
+
+%struct.struct_test_27.0.13 = type { i32, float, i64, i8, [4 x i32] }
+
+; Function Attrs: nounwind
+define void @copy_struct([5 x i64] %in.coerce) {
+; CHECK-LABEL: @copy_struct(
+; CHECK-NOT: memcpy
+for.end:
+  %in = alloca %struct.struct_test_27.0.13, align 8
+  %0 = bitcast %struct.struct_test_27.0.13* %in to [5 x i64]*
+  store [5 x i64] %in.coerce, [5 x i64]* %0, align 8
+  %scevgep9 = getelementptr %struct.struct_test_27.0.13* %in, i32 0, i32 4, i32 0
+  %scevgep910 = bitcast i32* %scevgep9 to i8*
+  call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* undef, i8* %scevgep910, i32 16, i32 4, i1 false)
+  ret void
+}
+
+define void @test_address_space_gep_index(i8 addrspace(1)* %out) {
+; CHECK-LABEL: @test_address_space_gep_index(
+; CHECK-NOT: alloca
+  %a = alloca [16 x i8]
+  %raw1 = getelementptr inbounds [16 x i8]* %a, i32 0, i32 0
+  %ptr1 = bitcast i8* %raw1 to double*
+  %raw2 = getelementptr inbounds [16 x i8]* %a, i32 0, i32 8
+  %ptr2 = bitcast i8* %raw2 to double*
+
+  call void @llvm.memcpy.p0i8.p1i8.i32(i8* %raw1, i8 addrspace(1)* %out, i32 16, i32 0, i1 false)
+; CHECK: %[[val2:.*]] = load double addrspace(1)* %{{.*}}, align 1
+; CHECK: getelementptr inbounds i8 addrspace(1)* %out, i16 8
+; CHECK: %[[val1:.*]] = load double addrspace(1)* %{{.*}}, align 1
+  %val1 = load double* %ptr2, align 1
+  %val2 = load double* %ptr1, align 1
+
+  store double %val1, double* %ptr1, align 1
+  store double %val2, double* %ptr2, align 1
+  call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* %out, i8* %raw1, i32 16, i32 0, i1 false)
+; CHECK: store double %[[val1]], double addrspace(1)* %{{.*}}, align 1
+; CHECK: getelementptr inbounds i8 addrspace(1)* %out, i16 8
+; CHECK: store double %[[val2]], double addrspace(1)* %{{.*}}, align 1
+  ret void
+; CHECK: ret void
+}
+

test/Transforms/SROA/basictest.ll

 ; RUN: opt < %s -sroa -S | FileCheck %s
 ; RUN: opt < %s -sroa -force-ssa-updater -S | FileCheck %s
 
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
+target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
 
 declare void @llvm.lifetime.start(i64, i8* nocapture)
 declare void @llvm.lifetime.end(i64, i8* nocapture)
 
 define i32 @test0() {
 ; CHECK-LABEL: @test0(
 ; CHECK-NOT: alloca
 ; CHECK: ret i32

 ; CHECK-NEXT: %[[gep_dst:.*]] = getelementptr inbounds i8* %dst, i64 60
 ; CHECK-NEXT: %[[gep_src:.*]] = getelementptr inbounds [40 x i8]* %[[test4_a6]], i64 0, i64 0
 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %[[gep_dst]], i8* %[[gep_src]], i32 40
 
   ret void
 }
 
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
+declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i32, i1) nounwind
 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
 
 define i16 @test5() {
 ; CHECK-LABEL: @test5(
 ; CHECK-NOT: alloca float
 ; CHECK:      %[[cast:.*]] = bitcast float 0.0{{.*}} to i32
 ; CHECK-NEXT: %[[shr:.*]] = lshr i32 %[[cast]], 16
; CHECK-NEXT: getelementptr inbounds { [16 x i8] }* %ptr, i64 -1, i32 0, i64 0
 
   %cast1 = bitcast { [16 x i8 ] }* %gep to i8*
   %cast2 = bitcast { [16 x i8 ] }* %a to i8*
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %cast1, i8* %cast2, i32 16, i32 8, i1 true)
   ret void
 ; CHECK: ret
 }
 
+define void @PR14105_as1({ [16 x i8] } addrspace(1)* %ptr) {
+; Make sure this the right address space pointer is used for type check.
+; CHECK-LABEL: @PR14105_as1(
+
+entry:
+  %a = alloca { [16 x i8] }, align 8
+; CHECK: alloca [16 x i8], align 8
+
+  %gep = getelementptr inbounds { [16 x i8] } addrspace(1)* %ptr, i64 -1
+; CHECK-NEXT: getelementptr inbounds { [16 x i8] } addrspace(1)* %ptr, i16 -1, i32 0, i64 0
+
+  %cast1 = bitcast { [16 x i8 ] } addrspace(1)* %gep to i8 addrspace(1)*
+  %cast2 = bitcast { [16 x i8 ] }* %a to i8*
+  call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* %cast1, i8* %cast2, i32 16, i32 8, i1 true)
+  ret void
+; CHECK: ret
+}
+
 define void @PR14465() {
 ; Ensure that we don't crash when analyzing a alloca larger than the maximum
 ; integer type width (MAX_INT_BITS) supported by llvm (1048576*32 > (1<<23)-1).
 ; CHECK-LABEL: @PR14465(
 
   %stack = alloca [1048576 x i32], align 16
 ; CHECK: alloca [1048576 x i32]
   %cast = bitcast [1048576 x i32]* %stack to i8*

test/Transforms/SROA/vector-promotion.ll

; CHECK-NEXT: extractelement <4 x i32> %[[load]], i32 0
   %tmp4 = add i32 %tmp1, %tmp2
   %tmp5 = add i32 %tmp3, %tmp4
   ret i32 %tmp5
 ; CHECK-NEXT: add
 ; CHECK-NEXT: add
 ; CHECK-NEXT: ret
 }
 
+declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) nounwind
+
+; Same as test4 with a different sized address  space pointer source.
+define i32 @test4_as1(<4 x i32> %x, <4 x i32> %y, <4 x i32> addrspace(1)* %z) {
+; CHECK-LABEL: @test4_as1(
+entry:
+  %a = alloca [2 x <4 x i32>]
+; CHECK-NOT: alloca
+
+  %a.x = getelementptr inbounds [2 x <4 x i32>]* %a, i64 0, i64 0
+  store <4 x i32> %x, <4 x i32>* %a.x
+  %a.y = getelementptr inbounds [2 x <4 x i32>]* %a, i64 0, i64 1
+  store <4 x i32> %y, <4 x i32>* %a.y
+; CHECK-NOT: store
+
+  %a.y.cast = bitcast <4 x i32>* %a.y to i8*
+  %z.cast = bitcast <4 x i32> addrspace(1)* %z to i8 addrspace(1)*
+  call void @llvm.memcpy.p0i8.p1i8.i32(i8* %a.y.cast, i8 addrspace(1)* %z.cast, i32 16, i32 1, i1 false)
+; CHECK-NOT: memcpy
+
+  %a.tmp1 = getelementptr inbounds [2 x <4 x i32>]* %a, i64 0, i64 0, i64 2
+  %a.tmp1.cast = bitcast i32* %a.tmp1 to i8*
+  %z.tmp1 = getelementptr inbounds <4 x i32> addrspace(1)* %z, i16 0, i16 2
+  %z.tmp1.cast = bitcast i32 addrspace(1)* %z.tmp1 to i8 addrspace(1)*
+  call void @llvm.memcpy.p0i8.p1i8.i32(i8* %a.tmp1.cast, i8 addrspace(1)* %z.tmp1.cast, i32 4, i32 1, i1 false)
+  %tmp1 = load i32* %a.tmp1
+  %a.tmp2 = getelementptr inbounds [2 x <4 x i32>]* %a, i64 0, i64 1, i64 3
+  %tmp2 = load i32* %a.tmp2
+  %a.tmp3 = getelementptr inbounds [2 x <4 x i32>]* %a, i64 0, i64 1, i64 0
+  %tmp3 = load i32* %a.tmp3
+; CHECK-NOT: memcpy
+; CHECK:      %[[load:.*]] = load <4 x i32> addrspace(1)* %z
+; CHECK-NEXT: %[[gep:.*]] = getelementptr inbounds <4 x i32> addrspace(1)* %z, i64 0, i64 2
+; CHECK-NEXT: %[[element_load:.*]] = load i32 addrspace(1)* %[[gep]]
+; CHECK-NEXT: %[[insert:.*]] = insertelement <4 x i32> %x, i32 %[[element_load]], i32 2
+; CHECK-NEXT: extractelement <4 x i32> %[[insert]], i32 2
+; CHECK-NEXT: extractelement <4 x i32> %[[load]], i32 3
+; CHECK-NEXT: extractelement <4 x i32> %[[load]], i32 0
+
+  %tmp4 = add i32 %tmp1, %tmp2
+  %tmp5 = add i32 %tmp3, %tmp4
+  ret i32 %tmp5
+; CHECK-NEXT: add
+; CHECK-NEXT: add
+; CHECK-NEXT: ret
+}
+
 define i32 @test5(<4 x i32> %x, <4 x i32> %y, <4 x i32>* %z) {
 ; CHECK-LABEL: @test5(
 ; The same as the above, but with reversed source and destination for the
 ; element memcpy, and a self copy.
 entry:
   %a = alloca [2 x <4 x i32>]
 ; CHECK-NOT: alloca