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AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer

Authored by tstellarAMD on Feb 16 2016, 1:50 PM.



Instead of trying to replace SMRD instructions with a VGPR base pointer
with an equivalent MUBUF instruction, we now copy the base pointer to
SGPRs using v_readfirstlane.

This is safe to do, because any load selected as an SMRD instruction
has been proven to have a uniform base pointer, so each thread in the
wave will have the same pointer value in VGPRs.

This will fix some errors on VI from trying to replace SMRD instructions
with addr64-enabled MUBUF instructions that don't exist.

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Event Timeline

tstellarAMD retitled this revision from to AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer.
tstellarAMD updated this object.
tstellarAMD added reviewers: cfang, arsenm, nhaehnle.
tstellarAMD added a subscriber: llvm-commits.
arsenm accepted this revision.Feb 16 2016, 3:15 PM
arsenm edited edge metadata.


This revision is now accepted and ready to land.Feb 16 2016, 3:15 PM
cfang edited edge metadata.Feb 17 2016, 10:08 AM

A good approach. Can we use v_readfirstlane for some other cases in SIFixSGPRCopies? There might be optimization choice which
approaches are better.

nhaehnle accepted this revision.Feb 18 2016, 8:12 AM
nhaehnle edited edge metadata.

This does indeed fix the problem in Mesa that we talked about, thank you.

There should probably be a comment about why this is OK because SMRD is only originally selected when the pointer is known uniform

This revision was automatically updated to reflect the committed changes.