[Power PC] softening long double type

[spetrovic]

Summary

This patch implements softening of long double type (ppcf128) on ppc32 architecture and enables operations for this type for soft float.

[spetrovic]

ping

[spetrovic]

Hal, are you ok with this change ?

[hfinkel]

LGTM.

include/llvm/CodeGen/RuntimeLibcalls.h

enum Libcall {
     FMIN_PPCF128,
     FMAX_F32,
     FMAX_F64,
     FMAX_F80,
     FMAX_F128,
     FMAX_PPCF128,
 
     // CONVERSION
+    FPEXT_F32_PPCF128,
+    FPEXT_F64_PPCF128,
     FPEXT_F64_F128,
     FPEXT_F32_F128,
     FPEXT_F32_F64,
     FPEXT_F16_F32,
     FPROUND_F32_F16,
     FPROUND_F64_F16,
     FPROUND_F80_F16,
     FPROUND_F128_F16,
enum Libcall {
     UINTTOFP_I128_F80,
     UINTTOFP_I128_F128,
     UINTTOFP_I128_PPCF128,
 
     // COMPARISON
     OEQ_F32,
     OEQ_F64,
     OEQ_F128,
+    OEQ_PPCF128,
     UNE_F32,
     UNE_F64,
     UNE_F128,
+    UNE_PPCF128,
     OGE_F32,
     OGE_F64,
     OGE_F128,
+    OGE_PPCF128,
     OLT_F32,
     OLT_F64,
     OLT_F128,
+    OLT_PPCF128,
     OLE_F32,
     OLE_F64,
     OLE_F128,
+    OLE_PPCF128,
     OGT_F32,
     OGT_F64,
     OGT_F128,
+    OGT_PPCF128,
     UO_F32,
     UO_F64,
     UO_F128,
+    UO_PPCF128,
     O_F32,
     O_F64,
     O_F128,
+    O_PPCF128,
 
     // MEMORY
     MEMCPY,
     MEMSET,
     MEMMOVE,
 
     // EXCEPTION HANDLING
     UNWIND_RESUME,

lib/CodeGen/SelectionDAG/TargetLowering.cpp

 }
 
 /// Soften the operands of a comparison. This code is shared among BR_CC,
 /// SELECT_CC, and SETCC handlers.
 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
                                          SDValue &NewLHS, SDValue &NewRHS,
                                          ISD::CondCode &CCCode,
                                          SDLoc dl) const {
-  assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
+  assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128 || VT == MVT::ppcf128)
          && "Unsupported setcc type!");
 
   // Expand into one or more soft-fp libcall(s).
   RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
   bool ShouldInvertCC = false;
   switch (CCCode) {
   case ISD::SETEQ:
   case ISD::SETOEQ:
     LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :
-          (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;
+          (VT == MVT::f64) ? RTLIB::OEQ_F64 :
+          (VT == MVT::f128) ? RTLIB::OEQ_F128 : RTLIB::OEQ_PPCF128;
     break;
   case ISD::SETNE:
   case ISD::SETUNE:
     LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 :
-          (VT == MVT::f64) ? RTLIB::UNE_F64 : RTLIB::UNE_F128;
+          (VT == MVT::f64) ? RTLIB::UNE_F64 :
+          (VT == MVT::f128) ? RTLIB::UNE_F128 : RTLIB::UNE_PPCF128;
     break;
   case ISD::SETGE:
   case ISD::SETOGE:
     LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
-          (VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;
+          (VT == MVT::f64) ? RTLIB::OGE_F64 :
+          (VT == MVT::f128) ? RTLIB::OGE_F128 : RTLIB::OGE_PPCF128;
     break;
   case ISD::SETLT:
   case ISD::SETOLT:
     LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
-          (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
+          (VT == MVT::f64) ? RTLIB::OLT_F64 :
+          (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128;
     break;
   case ISD::SETLE:
   case ISD::SETOLE:
     LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 :
-          (VT == MVT::f64) ? RTLIB::OLE_F64 : RTLIB::OLE_F128;
+          (VT == MVT::f64) ? RTLIB::OLE_F64 :
+          (VT == MVT::f128) ? RTLIB::OLE_F128 : RTLIB::OLE_PPCF128;
     break;
   case ISD::SETGT:
   case ISD::SETOGT:
     LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 :
-          (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;
+          (VT == MVT::f64) ? RTLIB::OGT_F64 :
+          (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128;
     break;
   case ISD::SETUO:
     LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 :
-          (VT == MVT::f64) ? RTLIB::UO_F64 : RTLIB::UO_F128;
+          (VT == MVT::f64) ? RTLIB::UO_F64 :
+          (VT == MVT::f128) ? RTLIB::UO_F128 : RTLIB::UO_PPCF128;
     break;
   case ISD::SETO:
     LC1 = (VT == MVT::f32) ? RTLIB::O_F32 :
-          (VT == MVT::f64) ? RTLIB::O_F64 : RTLIB::O_F128;
+          (VT == MVT::f64) ? RTLIB::O_F64 :
+          (VT == MVT::f128) ? RTLIB::O_F128 : RTLIB::O_PPCF128;
     break;
   case ISD::SETONE:
     // SETONE = SETOLT | SETOGT
     LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
-          (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
+          (VT == MVT::f64) ? RTLIB::OLT_F64 :
+          (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128;
     LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 :
-          (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;
+          (VT == MVT::f64) ? RTLIB::OGT_F64 :
+          (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128;
     break;
   case ISD::SETUEQ:
     LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 :
-          (VT == MVT::f64) ? RTLIB::UO_F64 : RTLIB::UO_F128;
+          (VT == MVT::f64) ? RTLIB::UO_F64 :
+          (VT == MVT::f128) ? RTLIB::UO_F64 : RTLIB::UO_PPCF128;
     LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :
-          (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;
+          (VT == MVT::f64) ? RTLIB::OEQ_F64 :
+          (VT == MVT::f128) ? RTLIB::OEQ_F128 : RTLIB::OEQ_PPCF128;
     break;
   default:
     // Invert CC for unordered comparisons
     ShouldInvertCC = true;
     switch (CCCode) {
     case ISD::SETULT:
       LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
-            (VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;
+            (VT == MVT::f64) ? RTLIB::OGE_F64 :
+            (VT == MVT::f128) ? RTLIB::OGE_F128 : RTLIB::OGE_PPCF128;
       break;
     case ISD::SETULE:
       LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 :
-            (VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;
+            (VT == MVT::f64) ? RTLIB::OGT_F64 :
+            (VT == MVT::f128) ? RTLIB::OGT_F128 : RTLIB::OGT_PPCF128;
       break;
     case ISD::SETUGT:
       LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 :
-            (VT == MVT::f64) ? RTLIB::OLE_F64 : RTLIB::OLE_F128;
+            (VT == MVT::f64) ? RTLIB::OLE_F64 :
+            (VT == MVT::f128) ? RTLIB::OLE_F128 : RTLIB::OLE_PPCF128;
       break;
     case ISD::SETUGE:
       LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
-            (VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
+            (VT == MVT::f64) ? RTLIB::OLT_F64 :
+            (VT == MVT::f128) ? RTLIB::OLT_F128 : RTLIB::OLT_PPCF128;
       break;
     default: llvm_unreachable("Do not know how to soften this setcc!");
     }
   }
 
   // Use the target specific return value for comparions lib calls.
   EVT RetVT = getCmpLibcallReturnType();
   SDValue Ops[2] = {NewLHS, NewRHS};

lib/CodeGen/TargetLoweringBase.cpp

static void InitLibcallNames(const char **Names, const Triple &TT) {
   Names[RTLIB::ROUND_F80] = "roundl";
   Names[RTLIB::ROUND_F128] = "roundl";
   Names[RTLIB::ROUND_PPCF128] = "roundl";
   Names[RTLIB::COPYSIGN_F32] = "copysignf";
   Names[RTLIB::COPYSIGN_F64] = "copysign";
   Names[RTLIB::COPYSIGN_F80] = "copysignl";
   Names[RTLIB::COPYSIGN_F128] = "copysignl";
   Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";
+  Names[RTLIB::FPEXT_F32_PPCF128] = "__gcc_stoq";
+  Names[RTLIB::FPEXT_F64_PPCF128] = "__gcc_dtoq";
   Names[RTLIB::FPEXT_F64_F128] = "__extenddftf2";
   Names[RTLIB::FPEXT_F32_F128] = "__extendsftf2";
   Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";
   Names[RTLIB::FPEXT_F16_F32] = "__gnu_h2f_ieee";
   Names[RTLIB::FPROUND_F32_F16] = "__gnu_f2h_ieee";
   Names[RTLIB::FPROUND_F64_F16] = "__truncdfhf2";
   Names[RTLIB::FPROUND_F80_F16] = "__truncxfhf2";
   Names[RTLIB::FPROUND_F128_F16] = "__trunctfhf2";
   Names[RTLIB::FPROUND_PPCF128_F16] = "__trunctfhf2";
   Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";
   Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";
   Names[RTLIB::FPROUND_F128_F32] = "__trunctfsf2";
-  Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
+  Names[RTLIB::FPROUND_PPCF128_F32] = "__gcc_qtos";
   Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
   Names[RTLIB::FPROUND_F128_F64] = "__trunctfdf2";
-  Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
+  Names[RTLIB::FPROUND_PPCF128_F64] = "__gcc_qtod";
   Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
   Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
   Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
   Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
   Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
   Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
   Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
   Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
   Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
   Names[RTLIB::FPTOSINT_F128_I32] = "__fixtfsi";
   Names[RTLIB::FPTOSINT_F128_I64] = "__fixtfdi";
   Names[RTLIB::FPTOSINT_F128_I128] = "__fixtfti";
-  Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
+  Names[RTLIB::FPTOSINT_PPCF128_I32] = "__gcc_qtou";
   Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
   Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
   Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
   Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
   Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
   Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
   Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
   Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
   Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
   Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
   Names[RTLIB::FPTOUINT_F80_I128] = "__fixunsxfti";
   Names[RTLIB::FPTOUINT_F128_I32] = "__fixunstfsi";
   Names[RTLIB::FPTOUINT_F128_I64] = "__fixunstfdi";
   Names[RTLIB::FPTOUINT_F128_I128] = "__fixunstfti";
   Names[RTLIB::FPTOUINT_PPCF128_I32] = "__fixunstfsi";
   Names[RTLIB::FPTOUINT_PPCF128_I64] = "__fixunstfdi";
   Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
   Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
   Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
   Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
   Names[RTLIB::SINTTOFP_I32_F128] = "__floatsitf";
-  Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
+  Names[RTLIB::SINTTOFP_I32_PPCF128] = "__gcc_itoq";
   Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
   Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
   Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
   Names[RTLIB::SINTTOFP_I64_F128] = "__floatditf";
   Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
   Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
   Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
   Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
   Names[RTLIB::SINTTOFP_I128_F128] = "__floattitf";
   Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
   Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
   Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
   Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
   Names[RTLIB::UINTTOFP_I32_F128] = "__floatunsitf";
-  Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
+  Names[RTLIB::UINTTOFP_I32_PPCF128] = "__gcc_utoq";
   Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
   Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
   Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
   Names[RTLIB::UINTTOFP_I64_F128] = "__floatunditf";
   Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
   Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
   Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
   Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
   Names[RTLIB::UINTTOFP_I128_F128] = "__floatuntitf";
   Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
   Names[RTLIB::OEQ_F32] = "__eqsf2";
   Names[RTLIB::OEQ_F64] = "__eqdf2";
   Names[RTLIB::OEQ_F128] = "__eqtf2";
+  Names[RTLIB::OEQ_PPCF128] = "__gcc_qeq";
   Names[RTLIB::UNE_F32] = "__nesf2";
   Names[RTLIB::UNE_F64] = "__nedf2";
   Names[RTLIB::UNE_F128] = "__netf2";
+  Names[RTLIB::UNE_PPCF128] = "__gcc_qne";
   Names[RTLIB::OGE_F32] = "__gesf2";
   Names[RTLIB::OGE_F64] = "__gedf2";
   Names[RTLIB::OGE_F128] = "__getf2";
+  Names[RTLIB::OGE_PPCF128] = "__gcc_qge";
   Names[RTLIB::OLT_F32] = "__ltsf2";
   Names[RTLIB::OLT_F64] = "__ltdf2";
   Names[RTLIB::OLT_F128] = "__lttf2";
+  Names[RTLIB::OLT_PPCF128] = "__gcc_qlt";
   Names[RTLIB::OLE_F32] = "__lesf2";
   Names[RTLIB::OLE_F64] = "__ledf2";
   Names[RTLIB::OLE_F128] = "__letf2";
+  Names[RTLIB::OLE_PPCF128] = "__gcc_qle";
   Names[RTLIB::OGT_F32] = "__gtsf2";
   Names[RTLIB::OGT_F64] = "__gtdf2";
   Names[RTLIB::OGT_F128] = "__gttf2";
+  Names[RTLIB::OGT_PPCF128] = "__gcc_qgt";
   Names[RTLIB::UO_F32] = "__unordsf2";
   Names[RTLIB::UO_F64] = "__unorddf2";
   Names[RTLIB::UO_F128] = "__unordtf2";
+  Names[RTLIB::UO_PPCF128] = "__gcc_qunord";
   Names[RTLIB::O_F32] = "__unordsf2";
   Names[RTLIB::O_F64] = "__unorddf2";
   Names[RTLIB::O_F128] = "__unordtf2";
+  Names[RTLIB::O_PPCF128] = "__gcc_qunord";
   Names[RTLIB::MEMCPY] = "memcpy";
   Names[RTLIB::MEMMOVE] = "memmove";
   Names[RTLIB::MEMSET] = "memset";
   Names[RTLIB::UNWIND_RESUME] = "_Unwind_Resume";
   Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_1] = "__sync_val_compare_and_swap_1";
   Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_2] = "__sync_val_compare_and_swap_2";
   Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_4] = "__sync_val_compare_and_swap_4";
   Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8] = "__sync_val_compare_and_swap_8";
RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
   if (OpVT == MVT::f16) {
     if (RetVT == MVT::f32)
       return FPEXT_F16_F32;
   } else if (OpVT == MVT::f32) {
     if (RetVT == MVT::f64)
       return FPEXT_F32_F64;
     if (RetVT == MVT::f128)
       return FPEXT_F32_F128;
+    if (RetVT == MVT::ppcf128)
+      return FPEXT_F32_PPCF128;
   } else if (OpVT == MVT::f64) {
     if (RetVT == MVT::f128)
       return FPEXT_F64_F128;
+    else if (RetVT == MVT::ppcf128)
+      return FPEXT_F64_PPCF128;
   }
 
   return UNKNOWN_LIBCALL;
 }
 
 /// getFPROUND - Return the FPROUND_*_* value for the given types, or
 /// UNKNOWN_LIBCALL if there is none.
 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) {

 
 /// InitCmpLibcallCCs - Set default comparison libcall CC.
 ///
 static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
   memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
   CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
   CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
   CCs[RTLIB::OEQ_F128] = ISD::SETEQ;
+  CCs[RTLIB::OEQ_PPCF128] = ISD::SETEQ;
   CCs[RTLIB::UNE_F32] = ISD::SETNE;
   CCs[RTLIB::UNE_F64] = ISD::SETNE;
   CCs[RTLIB::UNE_F128] = ISD::SETNE;
+  CCs[RTLIB::UNE_PPCF128] = ISD::SETNE;
   CCs[RTLIB::OGE_F32] = ISD::SETGE;
   CCs[RTLIB::OGE_F64] = ISD::SETGE;
   CCs[RTLIB::OGE_F128] = ISD::SETGE;
+  CCs[RTLIB::OGE_PPCF128] = ISD::SETGE;
   CCs[RTLIB::OLT_F32] = ISD::SETLT;
   CCs[RTLIB::OLT_F64] = ISD::SETLT;
   CCs[RTLIB::OLT_F128] = ISD::SETLT;
+  CCs[RTLIB::OLT_PPCF128] = ISD::SETLT;
   CCs[RTLIB::OLE_F32] = ISD::SETLE;
   CCs[RTLIB::OLE_F64] = ISD::SETLE;
   CCs[RTLIB::OLE_F128] = ISD::SETLE;
+  CCs[RTLIB::OLE_PPCF128] = ISD::SETLE;
   CCs[RTLIB::OGT_F32] = ISD::SETGT;
   CCs[RTLIB::OGT_F64] = ISD::SETGT;
   CCs[RTLIB::OGT_F128] = ISD::SETGT;
+  CCs[RTLIB::OGT_PPCF128] = ISD::SETGT;
   CCs[RTLIB::UO_F32] = ISD::SETNE;
   CCs[RTLIB::UO_F64] = ISD::SETNE;
   CCs[RTLIB::UO_F128] = ISD::SETNE;
+  CCs[RTLIB::UO_PPCF128] = ISD::SETNE;
   CCs[RTLIB::O_F32] = ISD::SETEQ;
   CCs[RTLIB::O_F64] = ISD::SETEQ;
   CCs[RTLIB::O_F128] = ISD::SETEQ;
+  CCs[RTLIB::O_PPCF128] = ISD::SETEQ;
 }
 
 /// NOTE: The TargetMachine owns TLOF.
 TargetLoweringBase::TargetLoweringBase(const TargetMachine &tm) : TM(tm) {
   initActions();
 
   // Perform these initializations only once.
   MaxStoresPerMemset = MaxStoresPerMemcpy = MaxStoresPerMemmove = 8;
if (isTypeLegal(IVT)) {
       RegisterTypeForVT[IntReg] = TransformToType[IntReg] =
         (const MVT::SimpleValueType)LegalIntReg;
       ValueTypeActions.setTypeAction(IVT, TypePromoteInteger);
     }
   }
 
   // ppcf128 type is really two f64's.
   if (!isTypeLegal(MVT::ppcf128)) {
+    if (isTypeLegal(MVT::f64)) {
       NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];
       RegisterTypeForVT[MVT::ppcf128] = MVT::f64;
       TransformToType[MVT::ppcf128] = MVT::f64;
       ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);
+    } else {
+      NumRegistersForVT[MVT::ppcf128] = NumRegistersForVT[MVT::i128];
+      RegisterTypeForVT[MVT::ppcf128] = RegisterTypeForVT[MVT::i128];
+      TransformToType[MVT::ppcf128] = MVT::i128;
+      ValueTypeActions.setTypeAction(MVT::ppcf128, TypeSoftenFloat);
+    }
   }
 
   // Decide how to handle f128. If the target does not have native f128 support,
   // expand it to i128 and we will be generating soft float library calls.
   if (!isTypeLegal(MVT::f128)) {
     NumRegistersForVT[MVT::f128] = NumRegistersForVT[MVT::i128];
     RegisterTypeForVT[MVT::f128] = RegisterTypeForVT[MVT::i128];
     TransformToType[MVT::f128] = MVT::i128;

test/CodeGen/ppcf128sf.ll

+; RUN: llc  -mtriple=powerpc-unknown-linux-gnu -O0 < %s | FileCheck %s
+
+@ld = common global ppc_fp128 0xM00000000000000000000000000000000, align 16
+@ld2 = common global ppc_fp128 0xM00000000000000000000000000000000, align 16
+@d = common global double 0.000000e+00, align 8
+@f = common global float 0.000000e+00, align 4
+@i = common global i32 0, align 4
+@ui = common global i32 0, align 4
+@var = common global i8 0, align 1
+
+define void @foo() #0 {
+entry:
+  %c = alloca ppc_fp128, align 16
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %add = fadd ppc_fp128 %0, %1
+  store ppc_fp128 %add, ppc_fp128* %c, align 16
+  %2 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %3 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %sub = fsub ppc_fp128 %2, %3
+  store ppc_fp128 %sub, ppc_fp128* %c, align 16
+  %4 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %5 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %mul = fmul ppc_fp128 %4, %5
+  store ppc_fp128 %mul, ppc_fp128* %c, align 16
+  %6 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %7 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %div = fdiv ppc_fp128 %6, %7
+  store ppc_fp128 %div, ppc_fp128* %c, align 16
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qadd
+  ; CHECK-LABEL:    __gcc_qsub
+  ; CHECK-LABEL:    __gcc_qmul
+  ; CHECK-LABEL:    __gcc_qdiv
+}
+
+define void @foo1() #0 {
+entry:
+  %0 = load double, double* @d, align 8
+  %conv = fpext double %0 to ppc_fp128
+  store ppc_fp128 %conv, ppc_fp128* @ld, align 16
+  ret void
+
+  ; CHECK-LABEL:    __gcc_dtoq
+}
+
+define void @foo2() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %conv = fptrunc ppc_fp128 %0 to double
+  store double %conv, double* @d, align 8
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qtod
+}
+
+define void @foo3() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %conv = fptrunc ppc_fp128 %0 to float
+  store float %conv, float* @f, align 4
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qtos
+}
+
+define void @foo4() #0 {
+entry:
+  %0 = load i32, i32* @i, align 4
+  %conv = sitofp i32 %0 to ppc_fp128
+  store ppc_fp128 %conv, ppc_fp128* @ld, align 16
+  ret void
+
+  ; CHECK-LABEL:    __gcc_itoq
+}
+
+define void @foo5() #0 {
+entry:
+  %0 = load i32, i32* @ui, align 4
+  %conv = uitofp i32 %0 to ppc_fp128
+  store ppc_fp128 %conv, ppc_fp128* @ld, align 16
+  ret void
+
+  ; CHECK-LABEL:    __gcc_utoq
+}
+
+define void @foo6() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %cmp = fcmp oeq ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qeq
+}
+
+define void @foo7() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %cmp = fcmp une ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qne
+}
+
+define void @foo8() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %cmp = fcmp ogt ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qgt
+}
+
+define void @foo9() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %cmp = fcmp olt ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qlt
+}
+
+define void @foo10() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %cmp = fcmp ole ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qle
+}
+
+define void @foo11() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %cmp = fcmp une ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qunord
+}
+
+define void @foo12() #0 {
+entry:
+  %0 = load ppc_fp128, ppc_fp128* @ld, align 16
+  %1 = load ppc_fp128, ppc_fp128* @ld2, align 16
+  %cmp = fcmp oge ppc_fp128 %0, %1
+  %conv = zext i1 %cmp to i32
+  %conv1 = trunc i32 %conv to i8
+  store i8 %conv1, i8* @var, align 1
+  ret void
+
+  ; CHECK-LABEL:    __gcc_qge
+}
+
+attributes #0 = { "use-soft-float"="true" }