[AVX512] add PSRLW Intrinsic

[igorb]

please use utils/update_llc_test_checks.py script to generate CHECKs, don't put encoding.
Missing tests without mask ( vpsrlw $255, %zmm0, %zmm1) version.

include/llvm/IR/IntrinsicsX86.td

2200

please add whitespace

test/CodeGen/X86/avx512bwvl-intrinsics.ll

4415

please add whitespace

4475

remove empty line

4492

Requare only AVX512BW , move 512bit tests to avx512bw-intrinsics.ll

[delena]

LGTM

[igorb]

LGTM

include/llvm/IR/IntrinsicsX86.td

def int_x86_avx512_mask_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi512">,
               Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
                          llvm_i32_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_psrai_d : GCCBuiltin<"__builtin_ia32_psradi512">,
               Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty,
                          llvm_i32_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_psrai_q : GCCBuiltin<"__builtin_ia32_psraqi512">,
               Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
                          llvm_i32_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
   
+  def int_x86_avx512_mask_psrl_w_128 : GCCBuiltin<"__builtin_ia32_psrlw128_mask">,
+              Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty,
+                         llvm_v8i16_ty,llvm_v8i16_ty,llvm_i8_ty], [IntrNoMem]>;
+  def int_x86_avx512_mask_psrl_w_256 : GCCBuiltin<"__builtin_ia32_psrlw256_mask">,
+              Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+                         llvm_v8i16_ty,llvm_v16i16_ty,llvm_i16_ty], [IntrNoMem]>;
+  def int_x86_avx512_mask_psrl_w_512 : GCCBuiltin<"__builtin_ia32_psrlw512_mask">,
+              Intrinsic<[llvm_v32i16_ty], [llvm_v32i16_ty,
+                         llvm_v8i16_ty,llvm_v32i16_ty,llvm_i32_ty], [IntrNoMem]>;
+
+  def int_x86_avx512_mask_psrli_w_128 : GCCBuiltin<"__builtin_ia32_psrlwai128_mask">,
+              Intrinsic<[llvm_v8i16_ty], [llvm_v8i16_ty,
+                         llvm_i8_ty,llvm_v8i16_ty,llvm_i8_ty], [IntrNoMem]>;
+  def int_x86_avx512_mask_psrli_w_256 : GCCBuiltin<"__builtin_ia32_psrlwi256_mask">,
+              Intrinsic<[llvm_v16i16_ty], [llvm_v16i16_ty,
+                         llvm_i8_ty,llvm_v16i16_ty,llvm_i16_ty], [IntrNoMem]>;
+  def int_x86_avx512_mask_psrli_w_512 : GCCBuiltin<"__builtin_ia32_psrlwi512_mask">,
+              Intrinsic<[llvm_v32i16_ty], [llvm_v32i16_ty,
+                         llvm_i8_ty,llvm_v32i16_ty,llvm_i32_ty], [IntrNoMem]>;
+  
   def int_x86_avx512_mask_psll_d : GCCBuiltin<"__builtin_ia32_pslld512_mask">,
               Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty,
                          llvm_v4i32_ty, llvm_v16i32_ty, llvm_i16_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_psll_q : GCCBuiltin<"__builtin_ia32_psllq512_mask">,
               Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
                          llvm_v2i64_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
   def int_x86_avx512_mask_psrl_d : GCCBuiltin<"__builtin_ia32_psrld512_mask">,
               Intrinsic<[llvm_v16i32_ty], [llvm_v16i32_ty,

lib/Target/X86/X86IntrinsicsInfo.h

static const IntrinsicData  IntrinsicsWithoutChain[] = {
   X86_INTRINSIC_DATA(avx512_mask_psra_d,        INTR_TYPE_2OP_MASK, X86ISD::VSRA, 0),
   X86_INTRINSIC_DATA(avx512_mask_psra_q,        INTR_TYPE_2OP_MASK, X86ISD::VSRA, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrai_d,       VSHIFT_MASK, X86ISD::VSRAI, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrai_q,       VSHIFT_MASK, X86ISD::VSRAI, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrav_d,       INTR_TYPE_2OP_MASK, ISD::SRA, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrav_q,       INTR_TYPE_2OP_MASK, ISD::SRA, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrl_d,        INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrl_q,        INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
+  X86_INTRINSIC_DATA(avx512_mask_psrl_w_128,    INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
+  X86_INTRINSIC_DATA(avx512_mask_psrl_w_256,    INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
+  X86_INTRINSIC_DATA(avx512_mask_psrl_w_512,    INTR_TYPE_2OP_MASK, X86ISD::VSRL, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrli_d,       VSHIFT_MASK, X86ISD::VSRLI, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrli_q,       VSHIFT_MASK, X86ISD::VSRLI, 0),
+  X86_INTRINSIC_DATA(avx512_mask_psrli_w_128,   INTR_TYPE_2OP_MASK, X86ISD::VSRLI, 0),
+  X86_INTRINSIC_DATA(avx512_mask_psrli_w_256,   INTR_TYPE_2OP_MASK, X86ISD::VSRLI, 0),
+  X86_INTRINSIC_DATA(avx512_mask_psrli_w_512,   INTR_TYPE_2OP_MASK, X86ISD::VSRLI, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrlv_d,       INTR_TYPE_2OP_MASK, ISD::SRL, 0),
   X86_INTRINSIC_DATA(avx512_mask_psrlv_q,       INTR_TYPE_2OP_MASK, ISD::SRL, 0),
   X86_INTRINSIC_DATA(avx512_mask_psub_b_128, INTR_TYPE_2OP_MASK, ISD::SUB, 0),
   X86_INTRINSIC_DATA(avx512_mask_psub_b_256, INTR_TYPE_2OP_MASK, ISD::SUB, 0),
   X86_INTRINSIC_DATA(avx512_mask_psub_b_512, INTR_TYPE_2OP_MASK, ISD::SUB, 0),
   X86_INTRINSIC_DATA(avx512_mask_psub_d_128, INTR_TYPE_2OP_MASK, ISD::SUB, 0),
   X86_INTRINSIC_DATA(avx512_mask_psub_d_256, INTR_TYPE_2OP_MASK, ISD::SUB, 0),
   X86_INTRINSIC_DATA(avx512_mask_psub_d_512, INTR_TYPE_2OP_MASK, ISD::SUB, 0),

test/CodeGen/X86/avx512bwvl-intrinsics.ll

 ; CHECK-NEXT:    retq ## encoding: [0xc3]
   %res = call <32 x i16> @llvm.x86.avx512.pbroadcastw.512(<8 x i16> %x0, <32 x i16> %x1, i32 -1)
   %res1 = call <32 x i16> @llvm.x86.avx512.pbroadcastw.512(<8 x i16> %x0, <32 x i16> %x1, i32 %mask)
   %res2 = call <32 x i16> @llvm.x86.avx512.pbroadcastw.512(<8 x i16> %x0, <32 x i16> zeroinitializer, i32 %mask)
   %res3 = add <32 x i16> %res, %res1
   %res4 = add <32 x i16> %res2, %res3
   ret <32 x i16> %res4
 }
+declare <8 x i16> @llvm.x86.avx512.mask.psrl.w.128(<8 x i16>, <8 x i16>,<8 x i16> ,i8) nounwind readnone
+define <8 x i16> @test_psrlw_128(<8 x i16> %src,<8 x i16> %a0,<8 x i16> %count,i8 %mask) {
+   ; CHECK-LABEL: _test_psrlw_128:
+    ;CHECK: vpsrlw  %xmm1, %xmm0, %xmm2 {%k1} 
+     %res = call <8 x i16> @llvm.x86.avx512.mask.psrl.w.128(<8 x i16> %src,<8 x i16> %a0,<8 x i16> %count,i8 %mask)
+      ret <8 x i16> %res
+}
+
+define <8 x i16> @test_psrlw_128z(<8 x i16> %src,<8 x i16> %count,<8 x i16> %a0,i8 %mask) {
+   ; CHECK-LABEL: _test_psrlw_128z:
+    ;CHECK:vpsrlw %xmm1, %xmm0, %xmm0 {%k1} {z}
+     %res = call <8 x i16> @llvm.x86.avx512.mask.psrl.w.128(<8 x i16> %src,<8 x i16> %count,<8 x i16> zeroinitializer,i8 %mask)
+      ret <8 x i16> %res
+}
+
+
+declare <16 x i16> @llvm.x86.avx512.mask.psrl.w.256(<16 x i16>, <8 x i16>,<16 x i16> ,i16) nounwind readnone
+define <16 x i16> @test_psrlw_256(<16 x i16> %src,<8 x i16> %count,<16 x i16> %a0,i16 %mask) {
+   ; CHECK-LABEL: _test_psrlw_256:
+    ;CHECK:vpsrlw %xmm1, %ymm0, %ymm2 {%k1} 
+     %res = call <16 x i16> @llvm.x86.avx512.mask.psrl.w.256(<16 x i16> %src,<8 x i16> %count,<16 x i16> %a0,i16 %mask)
+      ret <16 x i16> %res
+}
+
+define <16 x i16> @test_psrlw_256z(<16 x i16> %src,<8 x i16> %count,<16 x i16> %a0,i16 %mask) {
+   ; CHECK-LABEL: _test_psrlw_256z:
+    ;CHECK:vpsrlw %xmm1, %ymm0, %ymm0 {%k1} {z}
+     %res = call <16 x i16> @llvm.x86.avx512.mask.psrl.w.256(<16 x i16> %src,<8 x i16> %count,<16 x i16> zeroinitializer,i16 %mask)
+      ret <16 x i16> %res
+}
+
+declare <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16>, <8 x i16>,<32 x i16> ,i32) nounwind readnone
+define <32 x i16> @test_psrlw_512(<32 x i16> %src,<8 x i16> %count,<32 x i16> %a0,i32 %mask) {
+   ; CHECK-LABEL: _test_psrlw_512:
+    ;CHECK:vpsrlw %xmm1, %zmm0, %zmm2 {%k1}
+     %res = call <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16> %src,<8 x i16> %count,<32 x i16> %a0,i32 %mask)
+      ret <32 x i16> %res
+}
+
+define <32 x i16> @test_psrlw_512z(<32 x i16> %src,<8 x i16> %count,<32 x i16> %a0,i32 %mask) {
+   ; CHECK-LABEL: _test_psrlw_512z:
+    ;CHECK:vpsrlw %xmm1, %zmm0, %zmm0 {%k1} {z} 
+     %res = call <32 x i16> @llvm.x86.avx512.mask.psrl.w.512(<32 x i16> %src,<8 x i16> %count,<32 x i16> zeroinitializer,i32 %mask)
+      ret <32 x i16> %res
+}
 
+declare <8 x i16> @llvm.x86.avx512.mask.psrli.w.128(<8 x i16>, i8,<8 x i16> ,i8) nounwind readnone
+define <8 x i16> @test_psrlwi_128(<8 x i16> %src,i8 %imm,<8 x i16> %a0,i8 %mask) {
+   ; CHECK-LABEL: _test_psrlwi_128:
+    ;CHECK:vpsrlw $255, %xmm0, %xmm1 {%k1} 
+     %res = call <8 x i16> @llvm.x86.avx512.mask.psrli.w.128(<8 x i16> %src,i8 255 ,<8 x i16> %a0,i8 %mask)
+      ret <8 x i16> %res
+}
+
+define <8 x i16> @test_psrlwi_128z(<8 x i16> %src,i8 %imm,<8 x i16> %a0,i8 %mask) {
+   ; CHECK-LABEL: _test_psrlwi_128z:
+    ;CHECK:vpsrlw $255, %xmm0, %xmm0 {%k1} {z}
+     %res = call <8 x i16> @llvm.x86.avx512.mask.psrli.w.128(<8 x i16> %src,i8 255,<8 x i16> zeroinitializer,i8 %mask)
+      ret <8 x i16> %res
+}
+
+
+declare <16 x i16> @llvm.x86.avx512.mask.psrli.w.256(<16 x i16>,i8 ,<16 x i16> ,i16) nounwind readnone
+define <16 x i16> @test_psrlwi_256(<16 x i16> %src,i8 %imm,<16 x i16> %a0,i16 %mask) {
+   ; CHECK-LABEL: _test_psrlwi_256:
+    ;CHECK:vpsrlw $255, %ymm0, %ymm1 {%k1} 
+     %res = call <16 x i16> @llvm.x86.avx512.mask.psrli.w.256(<16 x i16> %src,i8 255,<16 x i16> %a0,i16 %mask)
+      ret <16 x i16> %res
+}
+
+define <16 x i16> @test_psrlwi_256z(<16 x i16> %src,i8 %imm,<16 x i16> %a0,i16 %mask) {
+   ; CHECK-LABEL: _test_psrlwi_256z:
+    ;CHECK:vpsrlw $255, %ymm0, %ymm0 {%k1} {z}
+     %res = call <16 x i16> @llvm.x86.avx512.mask.psrli.w.256(<16 x i16> %src,i8 255,<16 x i16> zeroinitializer,i16 %mask)
+      ret <16 x i16> %res
+}
+
+declare <32 x i16> @llvm.x86.avx512.mask.psrli.w.512(<32 x i16>,i8 %imm,<32 x i16> ,i32) nounwind readnone
+define <32 x i16> @test_psrlwi_512(<32 x i16> %src,i8 %imm,<32 x i16> %a0,i32 %mask) {
+   ; CHECK-LABEL: _test_psrlwi_512:
+    ;CHECK:vpsrlw $255, %zmm0, %zmm1 {%k1} 
+     %res = call <32 x i16> @llvm.x86.avx512.mask.psrli.w.512(<32 x i16> %src,i8 255,<32 x i16> %a0,i32 %mask)
+      ret <32 x i16> %res
+}
+
+define <32 x i16> @test_psrlwi_512z(<32 x i16> %src,i8 %imm,<32 x i16> %a0,i32 %mask) {
+   ; CHECK-LABEL: _test_psrlwi_512z:
+    ;CHECK:vpsrlw $255, %zmm0, %zmm0 {%k1} {z} 
+     %res = call <32 x i16> @llvm.x86.avx512.mask.psrli.w.512(<32 x i16> %src,i8 255,<32 x i16> zeroinitializer,i32 %mask)
+      ret <32 x i16> %res
+}