[SystemZ][z/OS] Add support for function name field of PPA1

[Everybody0523]

Summary

This PR causes the PPA1 to emit the function's name if it exists. This field is not emitted for unnamed functions.

[uweigand]

See minor nit inline. Otherwise LGTM.

llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp

1129

Please pass OutStreamer as first argument for consistency with emitPPA1Flags. Also, just pass in a StringRef OutName instead of all of MF.

[Everybody0523]

Change signature of emitPPA1Name() to match precedent.

[uweigand]

LGTM, thanks!

llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp

 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 #include "llvm/IR/Mangler.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCInstBuilder.h"
 #include "llvm/MC/MCSectionELF.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/ConvertEBCDIC.h"
 
 using namespace llvm;
 
 // Return an RI instruction like MI with opcode Opcode, but with the
 // GR64 register operands turned into GR32s.
 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) {
   if (MI->isCompare())
     return MCInstBuilder(Opcode)
if (TM.getTargetTriple().isOSzOS()) {
     OutStreamer->popSection();
 
     CurrentFnPPA1Sym = nullptr;
     CurrentFnEPMarkerSym = nullptr;
   }
 }
 
 static void emitPPA1Flags(std::unique_ptr<MCStreamer> &OutStreamer, bool VarArg,
-                          bool StackProtector, bool FPRMask, bool VRMask) {
+                          bool StackProtector, bool FPRMask, bool VRMask,
+                          bool HasName) {
   enum class PPA1Flag1 : uint8_t {
     DSA64Bit = (0x80 >> 0),
     VarArg = (0x80 >> 7),
     LLVM_MARK_AS_BITMASK_ENUM(DSA64Bit)
   };
   enum class PPA1Flag2 : uint8_t {
     ExternalProcedure = (0x80 >> 0),
     STACKPROTECTOR = (0x80 >> 3),
enum class PPA1Flag4 : uint8_t {
     ProcedureNamePresent = (0x80 >> 7),
     LLVM_MARK_AS_BITMASK_ENUM(EPMOffsetPresent)
   };
 
   // Declare optional section flags that can be modified.
   auto Flags1 = PPA1Flag1(0);
   auto Flags2 = PPA1Flag2::ExternalProcedure;
   auto Flags3 = PPA1Flag3(0);
-  auto Flags4 = PPA1Flag4::EPMOffsetPresent | PPA1Flag4::ProcedureNamePresent;
+  auto Flags4 = PPA1Flag4::EPMOffsetPresent;
 
   Flags1 |= PPA1Flag1::DSA64Bit;
 
   if (VarArg)
     Flags1 |= PPA1Flag1::VarArg;
 
   if (StackProtector)
     Flags2 |= PPA1Flag2::STACKPROTECTOR;
 
   // SavedGPRMask, SavedFPRMask, and SavedVRMask are precomputed in.
   if (FPRMask)
     Flags3 |= PPA1Flag3::FPRMask; // Add emit FPR mask flag.
 
   if (VRMask)
     Flags4 |= PPA1Flag4::VRMask; // Add emit VR mask flag.
 
+  if (HasName)
+    Flags4 |= PPA1Flag4::ProcedureNamePresent; // Add optional name block.
+
   OutStreamer->AddComment("PPA1 Flags 1");
   if ((Flags1 & PPA1Flag1::DSA64Bit) == PPA1Flag1::DSA64Bit)
     OutStreamer->AddComment("  Bit 0: 1 = 64-bit DSA");
   else
     OutStreamer->AddComment("  Bit 0: 0 = 32-bit DSA");
   if ((Flags1 & PPA1Flag1::VarArg) == PPA1Flag1::VarArg)
     OutStreamer->AddComment("  Bit 7: 1 = Vararg function");
   OutStreamer->emitInt8(static_cast<uint8_t>(Flags1)); // Flags 1.
static void emitPPA1Flags(std::unique_ptr<MCStreamer> &OutStreamer, bool VarArg,
   if ((Flags3 & PPA1Flag3::FPRMask) == PPA1Flag3::FPRMask)
     OutStreamer->AddComment("  Bit 2: 1 = FP Reg Mask is in optional area");
   OutStreamer->emitInt8(
       static_cast<uint8_t>(Flags3)); // Flags 3 (optional sections).
 
   OutStreamer->AddComment("PPA1 Flags 4");
   if ((Flags4 & PPA1Flag4::VRMask) == PPA1Flag4::VRMask)
     OutStreamer->AddComment("  Bit 2: 1 = Vector Reg Mask is in optional area");
+  if ((Flags4 & PPA1Flag4::ProcedureNamePresent) ==
+      PPA1Flag4::ProcedureNamePresent)
+    OutStreamer->AddComment("  Bit 7: 1 = Name Length and Name");
   OutStreamer->emitInt8(static_cast<uint8_t>(
       Flags4)); // Flags 4 (optional sections, always emit these).
 }
 
+static void emitPPA1Name(std::unique_ptr<MCStreamer> &OutStreamer,
+                         StringRef OutName) {
+  size_t NameSize = OutName.size();
+  uint16_t OutSize;
+  if (NameSize < UINT16_MAX) {
+    OutSize = static_cast<uint16_t>(NameSize);
+  } else {
+    OutName = OutName.substr(0, UINT16_MAX);
+    OutSize = UINT16_MAX;
+  }
+  // Emit padding to ensure that the next optional field word-aligned.
+  uint8_t ExtraZeros = 4 - ((2 + OutSize) % 4);
+
+  SmallString<512> OutnameConv;
+  ConverterEBCDIC::convertToEBCDIC(OutName, OutnameConv);
+  OutName = OutnameConv.str();
+
+  OutStreamer->AddComment("Length of Name");
+  OutStreamer->emitInt16(OutSize);
+  OutStreamer->AddComment("Name of Function");
+  OutStreamer->emitBytes(OutName);
+  OutStreamer->emitZeros(ExtraZeros);
+}
+
 void SystemZAsmPrinter::emitPPA1(MCSymbol *FnEndSym) {
   const TargetRegisterInfo *TRI = MF->getRegInfo().getTargetRegisterInfo();
   const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
   const auto TargetHasVector = Subtarget.hasVector();
 
   const SystemZMachineFunctionInfo *ZFI =
       MF->getInfo<SystemZMachineFunctionInfo>();
   const auto *ZFL = static_cast<const SystemZXPLINKFrameLowering *>(
void SystemZAsmPrinter::emitPPA1(MCSymbol *FnEndSym) {
   OutStreamer->emitLabel(CurrentFnPPA1Sym);
   OutStreamer->AddComment("Version");
   OutStreamer->emitInt8(0x02); // Version.
   OutStreamer->AddComment("LE Signature X'CE'");
   OutStreamer->emitInt8(0xCE); // CEL signature.
   OutStreamer->AddComment("Saved GPR Mask");
   OutStreamer->emitInt16(SavedGPRMask);
 
+  bool HasName =
+      MF->getFunction().hasName() && MF->getFunction().getName().size() > 0;
+
   emitPPA1Flags(OutStreamer, MF->getFunction().isVarArg(),
                 MFFrame.hasStackProtectorIndex(), SavedFPRMask != 0,
-                TargetHasVector && SavedVRMask != 0);
+                TargetHasVector && SavedVRMask != 0, HasName);
 
   OutStreamer->AddComment("Length/4 of Parms");
   OutStreamer->emitInt16(
       static_cast<uint16_t>(ZFI->getSizeOfFnParams() / 4)); // Parms/4.
   OutStreamer->AddComment("Length of Code");
   OutStreamer->emitAbsoluteSymbolDiff(FnEndSym, CurrentFnEPMarkerSym, 4);
 
   // Emit saved FPR mask and offset to FPR save area (0x20 of flags 3).
OutStreamer->AddComment(Twine("  Bit 0-3: Register R")
                                 .concat(utostr(FrameAndVROffset >> 28))
                                 .str());
     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")
                                 .concat(utostr(FrameAndVROffset & 0x0FFFFFFF))
                                 .str());
     OutStreamer->emitInt32(FrameAndVROffset);
   }
 
+  // Emit name length and name optional section (0x01 of flags 4)
+  if (HasName)
+    emitPPA1Name(OutStreamer, MF->getFunction().getName());
+
   // Emit offset to entry point optional section (0x80 of flags 4).
   OutStreamer->emitAbsoluteSymbolDiff(CurrentFnEPMarkerSym, CurrentFnPPA1Sym,
                                       4);
 }
 
 void SystemZAsmPrinter::emitFunctionEntryLabel() {
   const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
 

llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll

 ; CHECK-NOT: lmg
 define i64 @leaf_func0(i64 %a, i64 %b, i64 %c) {
   %n = add i64 %a, %b
   %m = mul i64 %n, %c
   %o = sub i64 %m, 4
   ret i64 %o
 }
 
+
+; =============================
+;     Tests for PPA1 Fields
+; =============================
+; CHECK-LABEL: named_func
+; CHECK: .byte  129  * PPA1 Flags 4
+; CHECK-NEXT: *   Bit 7: 1 = Name Length and Name
+define i64 @named_func(i64 %arg) {
+  %sum = add i64 1, %arg
+  ret i64 %sum
+}
+
+; CHECK-LABEL: __unnamed_1
+; CHECK: .byte  128  * PPA1 Flags 4
+; CHECK-NOT: *   Bit 7: 1 = Name Length and Name
+define void @""(ptr %p) {
+  call i64 (ptr) @fun1(ptr %p)
+  ret void
+}
+
+
 declare i64 @fun(i64 %arg0)
 declare i64 @fun1(ptr %ptr)
 declare i64 @fun2(i64 %n, ptr %arr0, ptr %arr1)
 declare i64 @fun3(ptr %ptr, i64 %n1, i64 %n2, i64 %n3)
 declare i64 @fun4(ptr %ptr0, ptr %ptr1, i64 %n1, i64 %n2, i64 %n3)