[AVR][NFC] Simplify AVRSubtarget

[jacquesguan]

Summary

The flags, initialization of the flags, and the getter methods for features defined in AVR.td can be generated by TableGen.

[benshi001]

It would be better to add [NFC] in the title, and remove the trailing dot.

llvm/lib/Target/AVR/AVRDevices.td

 //===---------------------------------------------------------------------===//
 // AVR Device Definitions
 //===---------------------------------------------------------------------===//
 
 // :TODO: Implement the skip errata, see `gcc/config/avr/avr-arch.h` for details
 // :TODO: We define all devices with SRAM to have all variants of LD/ST/LDD/STD.
 //        In reality, avr1 (no SRAM) has one variant each of `LD` and `ST`.
 //        avr2 (with SRAM) adds the rest of the variants.
 
 // A feature set aggregates features, grouping them. We don't want to create a
 // new member in AVRSubtarget (to store a value) for each set because we do not
 // care if the set is supported, only the subfeatures inside the set. We fix
 // this by simply setting the same dummy member for all feature sets, which is
 // then ignored.
 class FeatureSet<string name, string desc, list<SubtargetFeature> i>
-    : SubtargetFeature<name, "m_FeatureSetDummy", "true", desc, i>;
+    : SubtargetFeature<name, "HasFeatureSet"#NAME, "true", desc, i>;
 
 // A family of microcontrollers, defining a set of supported features.
 class Family<string name, list<SubtargetFeature> i>
     : FeatureSet<
           name, !strconcat("The device is a part of the ", name, " family"), i>;
 
 // The device has SRAM, and supports the bare minimum of
 // SRAM-relevant instructions.
 //
 // These are:
 // LD - all 9 variants
 // ST - all 9 variants
 // LDD - two variants for Y and Z
 // STD - two variants for Y and Z
 // `LDS Rd, K`
 // `STS k, Rr`
 // `PUSH`/`POP`
-def FeatureSRAM : SubtargetFeature<"sram", "m_hasSRAM", "true",
+def FeatureSRAM : SubtargetFeature<"sram", "HasSRAM", "true",
                                    "The device has random access memory">;
 
 // The device supports the `JMP k` and `CALL k` instructions.
-def FeatureJMPCALL : SubtargetFeature<"jmpcall", "m_hasJMPCALL", "true",
+def FeatureJMPCALL : SubtargetFeature<"jmpcall", "HasJMPCALL", "true",
                                       "The device supports the `JMP` and "
                                       "`CALL` instructions">;
 
 // The device supports the indirect branches `IJMP` and `ICALL`.
-def FeatureIJMPCALL : SubtargetFeature<"ijmpcall", "m_hasIJMPCALL", "true",
+def FeatureIJMPCALL : SubtargetFeature<"ijmpcall", "HasSRAMIJMPCALL", "true",
                                        "The device supports `IJMP`/`ICALL`"
                                        "instructions">;
 
 // The device supports the extended indirect branches `EIJMP` and `EICALL`.
-def FeatureEIJMPCALL : SubtargetFeature<"eijmpcall", "m_hasEIJMPCALL", "true",
+def FeatureEIJMPCALL : SubtargetFeature<"eijmpcall", "HasEIJMPCALL", "true",
                                         "The device supports the "
                                         "`EIJMP`/`EICALL` instructions">;
 
 // The device supports `ADDI Rd, K`, `SUBI Rd, K`.
-def FeatureADDSUBIW : SubtargetFeature<"addsubiw", "m_hasADDSUBIW", "true",
+def FeatureADDSUBIW : SubtargetFeature<"addsubiw", "HasADDSUBIW", "true",
                                        "Enable 16-bit register-immediate "
                                        "addition and subtraction instructions">;
 
 // The device has an 8-bit stack pointer (SP) register.
 def FeatureSmallStack
-    : SubtargetFeature<"smallstack", "m_hasSmallStack", "true",
+    : SubtargetFeature<"smallstack", "HasSmallStack", "true",
                        "The device has an 8-bit "
                        "stack pointer">;
 
 // The device supports the 16-bit GPR pair MOVW instruction.
-def FeatureMOVW : SubtargetFeature<"movw", "m_hasMOVW", "true",
+def FeatureMOVW : SubtargetFeature<"movw", "HasMOVW", "true",
                                    "The device supports the 16-bit MOVW "
                                    "instruction">;
 
 // The device supports the `LPM` instruction, with implied destination being r0.
-def FeatureLPM : SubtargetFeature<"lpm", "m_hasLPM", "true",
+def FeatureLPM : SubtargetFeature<"lpm", "HasLPM", "true",
                                   "The device supports the `LPM` instruction">;
 
 // The device supports the `LPM Rd, Z[+] instruction.
-def FeatureLPMX : SubtargetFeature<"lpmx", "m_hasLPMX", "true",
+def FeatureLPMX : SubtargetFeature<"lpmx", "HasLPMX", "true",
                                    "The device supports the `LPM Rd, Z[+]` "
                                    "instruction">;
 
 // The device supports the `ELPM` instruction.
-def FeatureELPM : SubtargetFeature<"elpm", "m_hasELPM", "true",
+def FeatureELPM : SubtargetFeature<"elpm", "HasELPM", "true",
                                    "The device supports the ELPM instruction">;
 
 // The device supports the `ELPM Rd, Z[+]` instructions.
-def FeatureELPMX : SubtargetFeature<"elpmx", "m_hasELPMX", "true",
+def FeatureELPMX : SubtargetFeature<"elpmx", "HasELPMX", "true",
                                     "The device supports the `ELPM Rd, Z[+]` "
                                     "instructions">;
 
 // The device supports the `SPM` instruction.
-def FeatureSPM : SubtargetFeature<"spm", "m_hasSPM", "true",
+def FeatureSPM : SubtargetFeature<"spm", "HasSPM", "true",
                                   "The device supports the `SPM` instruction">;
 
 // The device supports the `SPM Z+` instruction.
-def FeatureSPMX : SubtargetFeature<"spmx", "m_hasSPMX", "true",
+def FeatureSPMX : SubtargetFeature<"spmx", "HasSPMX", "true",
                                    "The device supports the `SPM Z+` "
                                    "instruction">;
 
 // The device supports the `DES k` instruction.
-def FeatureDES : SubtargetFeature<"des", "m_hasDES", "true",
+def FeatureDES : SubtargetFeature<"des", "HasDES", "true",
                                   "The device supports the `DES k` encryption "
                                   "instruction">;
 
 // The device supports the Read-Write-Modify instructions
 // XCH, LAS, LAC, and LAT.
-def FeatureRMW : SubtargetFeature<"rmw", "m_supportsRMW", "true",
+def FeatureRMW : SubtargetFeature<"rmw", "SupportsRMW", "true",
                                   "The device supports the read-write-modify "
                                   "instructions: XCH, LAS, LAC, LAT">;
 
 // The device supports the `[F]MUL[S][U]` family of instructions.
 def FeatureMultiplication
-    : SubtargetFeature<"mul", "m_supportsMultiplication", "true",
+    : SubtargetFeature<"mul", "SupportsMultiplication", "true",
                        "The device supports the "
                        "multiplication instructions">;
 
 // The device supports the `BREAK` instruction.
-def FeatureBREAK : SubtargetFeature<"break", "m_hasBREAK", "true",
+def FeatureBREAK : SubtargetFeature<"break", "HasBREAK", "true",
                                     "The device supports the `BREAK` debugging "
                                     "instruction">;
 
 // The device has instruction encodings specific to the Tiny core.
 def FeatureTinyEncoding
-    : SubtargetFeature<"tinyencoding", "m_hasTinyEncoding", "true",
+    : SubtargetFeature<"tinyencoding", "HasTinyEncoding", "true",
                        "The device has Tiny core specific "
                        "instruction encodings">;
 
 // When writing a 16-bit port or storing a 16-bit word, do the low byte first.
 def FeatureLowByteFirst
-    : SubtargetFeature<"lowbytefirst", "m_hasLowByteFirst", "true",
+    : SubtargetFeature<"lowbytefirst", "HasLowByteFirst", "true",
                        "Do the low byte first when writing a 16-bit port or "
                        "storing a 16-bit word">;
 
 // The device has CPU registers mapped in data address space
-def FeatureMMR : SubtargetFeature<"memmappedregs", "m_hasMemMappedGPR", "true",
+def FeatureMMR : SubtargetFeature<"memmappedregs", "HasMemMappedGPR", "true",
                                   "The device has CPU registers "
                                   "mapped in data address space">;
 
 class ELFArch<string name>
     : SubtargetFeature<"", "ELFArch", !strconcat("ELF::", name), "">;
 
 // ELF e_flags architecture values
 def ELFArchAVR1 : ELFArch<"EF_AVR_ARCH_AVR1">;

llvm/lib/Target/AVR/AVRSubtarget.h

public:
   /// Parses a subtarget feature string, setting appropriate options.
   /// \note Definition of function is auto generated by `tblgen`.
   void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
 
   AVRSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
                                                 const TargetMachine &TM);
 
   // Subtarget feature getters.
-  // See AVR.td for details.
-  bool hasSRAM() const { return m_hasSRAM; }
-  bool hasJMPCALL() const { return m_hasJMPCALL; }
-  bool hasIJMPCALL() const { return m_hasIJMPCALL; }
-  bool hasEIJMPCALL() const { return m_hasEIJMPCALL; }
-  bool hasADDSUBIW() const { return m_hasADDSUBIW; }
-  bool hasSmallStack() const { return m_hasSmallStack; }
-  bool hasMOVW() const { return m_hasMOVW; }
-  bool hasLPM() const { return m_hasLPM; }
-  bool hasLPMX() const { return m_hasLPMX; }
-  bool hasELPM() const { return m_hasELPM; }
-  bool hasELPMX() const { return m_hasELPMX; }
-  bool hasSPM() const { return m_hasSPM; }
-  bool hasSPMX() const { return m_hasSPMX; }
-  bool hasDES() const { return m_hasDES; }
-  bool supportsRMW() const { return m_supportsRMW; }
-  bool supportsMultiplication() const { return m_supportsMultiplication; }
-  bool hasBREAK() const { return m_hasBREAK; }
-  bool hasTinyEncoding() const { return m_hasTinyEncoding; }
-  bool hasMemMappedGPR() const { return m_hasMemMappedGPR; }
-  bool hasLowByteFirst() const { return m_hasLowByteFirst; }
+#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \
+  bool GETTER() const { return ATTRIBUTE; }
+#include "AVRGenSubtargetInfo.inc"
 
   uint8_t getIORegisterOffset() const { return hasMemMappedGPR() ? 0x20 : 0x0; }
 
   bool enableSubRegLiveness() const override { return true; }
 
   /// Gets the ELF architecture for the e_flags field
   /// of an ELF object file.
   unsigned getELFArch() const {
Register getZeroRegister() const {
     return hasTinyEncoding() ? AVR::R17 : AVR::R1;
   }
 
 private:
   /// The ELF e_flags architecture.
   unsigned ELFArch = 0;
 
   // Subtarget feature settings
-  // See AVR.td for details.
-  bool m_hasSRAM = false;
-  bool m_hasJMPCALL = false;
-  bool m_hasIJMPCALL = false;
-  bool m_hasEIJMPCALL = false;
-  bool m_hasADDSUBIW = false;
-  bool m_hasSmallStack = false;
-  bool m_hasMOVW = false;
-  bool m_hasLPM = false;
-  bool m_hasLPMX = false;
-  bool m_hasELPM = false;
-  bool m_hasELPMX = false;
-  bool m_hasSPM = false;
-  bool m_hasSPMX = false;
-  bool m_hasDES = false;
-  bool m_supportsRMW = false;
-  bool m_supportsMultiplication = false;
-  bool m_hasBREAK = false;
-  bool m_hasTinyEncoding = false;
-  bool m_hasLowByteFirst = false;
-  bool m_hasMemMappedGPR = false;
-
-  // Dummy member, used by FeatureSet's. We cannot have a SubtargetFeature with
-  // no variable, so we instead bind pseudo features to this variable.
-  bool m_FeatureSetDummy = false;
+#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER)                    \
+  bool ATTRIBUTE = DEFAULT;
+#include "AVRGenSubtargetInfo.inc"
 
   AVRInstrInfo InstrInfo;
   AVRFrameLowering FrameLowering;
   AVRTargetLowering TLInfo;
   AVRSelectionDAGInfo TSInfo;
 };
 
 } // end namespace llvm
 
 #endif // LLVM_AVR_SUBTARGET_H