[WebAssembly] Print an extra local decl when the user stack pointer is used

[jfb]

lgtm after updating the test.

test/CodeGen/WebAssembly/userstack.ll

10

Terminate with {{$}} here and below.

[sunfish]

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

187

This works, but it's a little odd that the WebAssemblyFunctionInfo has PhysRegs as a general-purpose thing, but we have a special case for SP here. Would be be feasible to iterate over PhysRegs here instead?

test/CodeGen/WebAssembly/userstack.ll

10

These CHECK lines would be good candidates for {{$}} at the end, to ensure that we have exactly the right number of locals.

[dschuff]

• Update tests for review

[dschuff]

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

187

well, IIUC it would be "iterate over phys regs except for ARGUMENTS and EXPR_STACK" which would leave us with SP and FP. so approximately the same level of weirdness either way?

[sunfish]

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

187

I mean iterate over MFI->PhysRegs and only look at elements that are not -1U. That way if we implement MFI->adjustsStack() or hasFP(MF) or whatever in WebAssemblyFrameInfo.cpp, we won't need to update this code too.

I think you can extend WebAssemblyAsmPrinter::getRegType to know about physregs using TRI->getMinimalPhysRegClass.

[dschuff]

• Iterate over phys regs instead

[dschuff]

• Remove now-unused include

[sunfish]

Looks good, thanks!

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

 
 } // end anonymous namespace
 
 //===----------------------------------------------------------------------===//
 // Helpers.
 //===----------------------------------------------------------------------===//
 
 MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const {
-  const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
+  const TargetRegisterClass *TRC =
+      TargetRegisterInfo::isVirtualRegister(RegNo) ?
+      MRI->getRegClass(RegNo) :
+      MRI->getTargetRegisterInfo()->getMinimalPhysRegClass(RegNo);
   for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
     if (TRC->hasType(T))
       return T;
   DEBUG(errs() << "Unknown type for register number: " << RegNo);
   llvm_unreachable("Unknown register type");
   return MVT::Other;
 }
 
for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
     if (WAReg < MFI->getParams().size())
       continue;
     // Don't declare stackified registers.
     if (int(WAReg) < 0)
       continue;
     Local.addOperand(MCOperand::createImm(getRegType(VReg).SimpleTy));
     AnyWARegs = true;
   }
+  auto &PhysRegs = MFI->getPhysRegs();
+  for (unsigned PReg = 0; PReg < PhysRegs.size(); ++PReg) {
+    if (PhysRegs[PReg] == -1U)
+      continue;
+    Local.addOperand(MCOperand::createImm(getRegType(PReg).SimpleTy));
+    AnyWARegs = true;
+  }
   if (AnyWARegs)
     EmitToStreamer(*OutStreamer, Local);
 
   AsmPrinter::EmitFunctionBodyStart();
 }
 
 void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');

lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h

void addWAReg(unsigned VReg, unsigned WAReg) {
     WARegs.push_back(WAReg);
   }
 
   void addPReg(unsigned PReg, unsigned WAReg) {
     assert(PReg < WebAssembly::NUM_TARGET_REGS);
     assert(WAReg < -1U);
     PhysRegs[PReg] = WAReg;
   }
+  const std::vector<unsigned> &getPhysRegs() const { return PhysRegs; }
 };
 
 } // end namespace llvm
 
 #endif

test/CodeGen/WebAssembly/userstack.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -fast-isel | FileCheck %s
 
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: alloca32:
+; Check that there is an extra local for the stack pointer.
+; CHECK: .local i32, i32, i32, i32{{$}}
 define void @alloca32() {
  ; CHECK: i32.const [[L1:.+]]=, __stack_pointer
  ; CHECK-NEXT: i32.load [[L1]]=, 0([[L1]])
  ; CHECK-NEXT: i32.const [[L2:.+]]=, 16
  ; CHECK-NEXT: i32.sub [[SP:.+]]=, [[L1]], [[L2]]
  %retval = alloca i32
  ; CHECK: i32.const $push[[L3:.+]]=, 0
  ; CHECK: i32.store {{.*}}=, 12([[SP]]), $pop[[L3]]
  store i32 0, i32* %retval
  ; CHECK: i32.const [[L4:.+]]=, 16
  ; CHECK-NEXT: i32.add [[SP]]=, [[SP]], [[L4]]
  ; CHECK-NEXT: i32.const [[L5:.+]]=, __stack_pointer
  ; CHECK-NEXT: i32.store [[SP]]=, 0([[L5]]), [[SP]]
  ret void
 }
 
 ; CHECK-LABEL: alloca3264:
+; CHECK: .local i32, i32, i32, i32{{$}}
 define void @alloca3264() {
  ; CHECK: i32.const [[L1:.+]]=, __stack_pointer
  ; CHECK-NEXT: i32.load [[L1]]=, 0([[L1]])
  ; CHECK-NEXT: i32.const [[L2:.+]]=, 16
  ; CHECK-NEXT: i32.sub [[SP:.+]]=, [[L1]], [[L2]]
  %r1 = alloca i32
  %r2 = alloca double
  ; CHECK: i32.const $push[[L3:.+]]=, 0
  ; CHECK: i32.store {{.*}}=, 12([[SP]]), $pop[[L3]]
  store i32 0, i32* %r1
  ; CHECK: i64.const $push[[L4:.+]]=, 0
  ; CHECK: i64.store {{.*}}=, 0([[SP]]), $pop[[L4]]
  store double 0.0, double* %r2
  ; CHECK: i32.const [[L4:.+]]=, 16
  ; CHECK-NEXT: i32.add [[SP]]=, [[SP]], [[L4]]
  ; CHECK-NEXT: i32.const [[L5:.+]]=, __stack_pointer
  ; CHECK-NEXT: i32.store [[SP]]=, 0([[L5]]), [[SP]]
  ret void
 }
 
+; CHECK-LABEL: allocarray:
+; CHECK: .local i32, i32, i32, i32, i32, i32{{$}}
 define void @allocarray() {
  ; CHECK: i32.const [[L1:.+]]=, __stack_pointer
  ; CHECK-NEXT: i32.load [[L1]]=, 0([[L1]])
  ; CHECK-NEXT: i32.const [[L2:.+]]=, 32
  ; CHECK-NEXT: i32.sub [[SP:.+]]=, [[L1]], [[L2]]
  %r = alloca [5 x i32]
  ; CHECK: i32.const $push[[L3:.+]]=, 1
  ; CHECK: i32.store {{.*}}=, 12([[SP]]), $pop[[L3]]