[InstCombine] Fold icmps comparing uadd_sat with a constant

[0xdc03]

Summary

This patch is a continuation of D154206. It introduces a fold for the
operation "uadd_sat(X, C) pred C2" where "C" and "C2" are constants. The
fold is:

uadd_sat(X, C) pred C2
=> (X >= ~C) || ((X + C) pred C2) -> when (UINT_MAX pred C2) is true
=> (X < ~C)  && ((X + C) pred C2) -> when (UINT_MAX pred C2) is false

These expressions can generally be folded into a simpler expression. As
they can sometimes emit more than one instruction, they are limited to
cases where the "uadd_sat" has only one user.

Proofs: https://alive2.llvm.org/ce/z/wWeirP

[0xdc03]

• Rebase on patch for tests: D154566

[0xdc03]

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3625

This expression can be simplified to:

LHSPred = (IntrinsicIsUAddSat XNOR SaturatingValueCheck) ? ICmpInst::ICMP_UGE : ICmpInst::ICMP_ULT;

i.e. (IntrinsicIsUAddSat == SaturatingValueCheck), however I feel that just looks ugly.

[nikic]

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3632

In the end, what we're computing here is the range of values where the add/sub doesn't (or does) overflow. Can we express this in terms of makeExactNoWrapRegion() instead? That would also make it easier to extend this to signed intrinsics in the future, where the overflow condition is more complex.

[0xdc03]

• Replace usage of makeExactICmpRegion with makeExactNoWrapRegion

[0xdc03]

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3632

Yup, this works quite well 😄

[0xdc03]

• Update to use SaturatingInst

[nikic]

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3587

Directly accept SaturingInst (moving the cast to the caller)?

3622

Now that makeExactNoWrapRegion is used, I think we can combine both cases to something like this:

// Let Y = add/sub_sat(X, C) pred C2
//  => Y = (no_overflow ? sat_val : (X binop C)) pred C2
//  => Y = no_overflow ? (sat_val pred C2) : ((X binop C) pred C2)
//
// When (sat_val pred C2) is true, then
//    Y = no_overflow ? true : ((X binop C) pred C2)
// => Y = no_overflow || ((X binop C) pred C2)
// else
//    Y = no_overflow ? false : ((X binop C) pred C2)
// => Y = !no_overflow && ((X binop C) pred C2)

This is true for all saturating intrinsics and matches the implementation more closely. Extension to the signed case at this point would only involve determining the right sat_val.

It would also be possible to replace the last line with:

// => Y = !(no_overflow || !((X - C) pred C2))

Which might make the implementation a bit simpler because you only have two optional inverts, and can always use exactUnionWith. Not sure whether this is better or not.

[0xdc03]

• Address reviewer comments
  • Generalize the formula
  • Redo the comments to be better
  • Make parameter a SaturatingInst

[0xdc03]

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3622

Okay, I have done this and cleaned up the formula, hopefully the code is better now.

[nikic]

LGTM

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3643

I feel like this comment is largely redundant with the one above...

3651

This variable is only used here -- check II->getBinaryOp() == Instruction::Add instead?

[0xdc03]

• Simplify comment
• Remove IntrinsicIsAddition

[0xdc03]

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

3643

Sure, that was mainly for me to understand what I had done.

llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

default:
     break;
   }
 
   // TODO: These folds could be refactored to be part of the above calls.
   return foldICmpBinOpEqualityWithConstant(Cmp, BO, C);
 }
 
 static Instruction *
-foldICmpUSubSatWithConstant(ICmpInst::Predicate Pred, IntrinsicInst *II,
-                            const APInt &C, InstCombiner::BuilderTy &Builder) {
+foldICmpUSubSatOrUAddSatWithConstant(ICmpInst::Predicate Pred,
+                                     SaturatingInst *II, const APInt &C,
+                                     InstCombiner::BuilderTy &Builder) {
   // This transform may end up producing more than one instruction for the
   // intrinsic, so limit it to one user of the intrinsic.
   if (!II->hasOneUse())
     return nullptr;
 
-  // Let Y = usub_sat(X, C) pred C2
-  //  => Y = (X < C ? 0 : (X - C)) pred C2
-  //  => Y = (X < C) ? (0 pred C2) : ((X - C) pred C2)
+  // Let Y        = [add/sub]_sat(X, C) pred C2
+  //     SatVal   = The saturating value for the operation
+  //     WillWrap = Whether or not the operation will underflow / overflow
+  // => Y = (WillWrap ? SatVal : (X binop C)) pred C2
+  // => Y = WillWrap ? (SatVal pred C2) : ((X binop C) pred C2)
   //
-  // When (0 pred C2) is true, then
-  //    Y = (X < C) ? true : ((X - C) pred C2)
-  // => Y = (X < C) || ((X - C) pred C2)
+  // When (SatVal pred C2) is true, then
+  //    Y = WillWrap ? true : ((X binop C) pred C2)
+  // => Y = WillWrap || ((X binop C) pred C2)
   // else
-  //    Y = (X < C) ? false : ((X - C) pred C2)
-  // => Y = !(X < C) && ((X - C) pred C2)
-  // => Y = (X >= C) && ((X - C) pred C2)
+  //    Y =  WillWrap ? false : ((X binop C) pred C2)
+  // => Y = !WillWrap ?  ((X binop C) pred C2) : false
+  // => Y = !WillWrap && ((X binop C) pred C2)
   Value *Op0 = II->getOperand(0);
   Value *Op1 = II->getOperand(1);
 
-  // Check (0 pred C2)
-  auto [NewPred, LogicalOp] =
-      ICmpInst::compare(APInt::getZero(C.getBitWidth()), C, Pred)
-          ? std::make_pair(ICmpInst::ICMP_ULT, Instruction::BinaryOps::Or)
-          : std::make_pair(ICmpInst::ICMP_UGE, Instruction::BinaryOps::And);
-
   const APInt *COp1;
-  // This transform only works when the usub_sat has an integral constant or
+  // This transform only works when the intrinsic has an integral constant or
   // splat vector as the second operand.
   if (!match(Op1, m_APInt(COp1)))
     return nullptr;
 
-  ConstantRange C1 = ConstantRange::makeExactICmpRegion(NewPred, *COp1);
-  // Convert '(X - C) pred C2' into 'X pred C2' shifted by C.
+  APInt SatVal;
+  bool IntrinsicIsAddition;
+  switch (II->getIntrinsicID()) {
+  default:
+    llvm_unreachable(
+        "This function only works with usub_sat and uadd_sat for now!");
+  case Intrinsic::uadd_sat:
+    SatVal = APInt::getAllOnes(C.getBitWidth());
+    IntrinsicIsAddition = true;
+    break;
+  case Intrinsic::usub_sat:
+    SatVal = APInt::getZero(C.getBitWidth());
+    IntrinsicIsAddition = false;
+    break;
+  }
+
+  // Check (SatVal pred C2)
+  bool SatValCheck = ICmpInst::compare(SatVal, C, Pred);
+
+  // To combine the two operands in the formula above into just one icmp, we
+  // need to combine the value ranges for the LHS and RHS into one range where
+  // the whole expression evaluates to true.
+  //
+  // When (SatVal pred C2) is false, we combine the two operands using an And.
+  // This means that we need values where both the LHS (operation *DOES NOT*
+  // wrap) and the RHS evaluates to true.
+  //
+  // When it is true, we combine the two operands using an Or. This means that
+  // we need values where either the LHS (operation *DOES* wrap) or the RHS
+  // evaluates to true. For the LHS, this means the exact inverse of the range
+  // of values of the above.
+  ConstantRange C1 = ConstantRange::makeExactNoWrapRegion(
+      II->getBinaryOp(), *COp1, II->getNoWrapKind());
+
+  if (SatValCheck)
+    C1 = C1.inverse();
+
   ConstantRange C2 = ConstantRange::makeExactICmpRegion(Pred, C);
+  if (IntrinsicIsAddition)
+    C2 = C2.sub(*COp1);
+  else
     C2 = C2.add(*COp1);
 
+  Instruction::BinaryOps CombiningOp =
+      SatValCheck ? Instruction::BinaryOps::Or : Instruction::BinaryOps::And;
+
   std::optional<ConstantRange> Combination;
-  if (LogicalOp == Instruction::BinaryOps::Or)
+  if (CombiningOp == Instruction::BinaryOps::Or)
     Combination = C1.exactUnionWith(C2);
-  else /* LogicalOp == Instruction::BinaryOps::And */
+  else /* CombiningOp == Instruction::BinaryOps::And */
     Combination = C1.exactIntersectWith(C2);
 
   if (!Combination)
     return nullptr;
 
   CmpInst::Predicate EquivPred;
   APInt EquivInt;
   APInt EquivOffset;
Instruction *InstCombinerImpl::foldICmpIntrinsicWithConstant(ICmpInst &Cmp,
                                                              IntrinsicInst *II,
                                                              const APInt &C) {
   ICmpInst::Predicate Pred = Cmp.getPredicate();
 
   // Handle folds that apply for any kind of icmp.
   switch (II->getIntrinsicID()) {
   default:
     break;
+  case Intrinsic::uadd_sat:
   case Intrinsic::usub_sat:
-    if (auto *Folded = foldICmpUSubSatWithConstant(Pred, II, C, Builder))
+    if (auto *Folded = foldICmpUSubSatOrUAddSatWithConstant(
+            Pred, cast<SaturatingInst>(II), C, Builder))
       return Folded;
     break;
   }
 
   if (Cmp.isEquality())
     return foldICmpEqIntrinsicWithConstant(Cmp, II, C);
 
   Type *Ty = II->getType();

llvm/test/Transforms/InstCombine/icmp-uadd-sat.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
 ; Tests for InstCombineCompares.cpp::foldICmpUSubSatOrUAddSatWithConstant
 ; - uadd_sat case
 
 ; ==============================================================================
 ; Basic tests with one user
 ; ==============================================================================
 define i1 @icmp_eq_basic(i8 %arg) {
 ; CHECK-LABEL: define i1 @icmp_eq_basic
 ; CHECK-SAME: (i8 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[ARG]], i8 2)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[ADD]], 5
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[ARG]], 3
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i8 @llvm.uadd.sat.i8(i8 %arg, i8 2)
   %cmp = icmp eq i8 %add, 5
   ret i1 %cmp
 }
 
 define i1 @icmp_ne_basic(i16 %arg) {
 ; CHECK-LABEL: define i1 @icmp_ne_basic
 ; CHECK-SAME: (i16 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG]], i16 8)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i16 [[ADD]], 9
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i16 [[ARG]], 1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i16 @llvm.uadd.sat.i16(i16 %arg, i16 8)
   %cmp = icmp ne i16 %add, 9
   ret i1 %cmp
 }
 
 define i1 @icmp_ule_basic(i32 %arg) {
 ; CHECK-LABEL: define i1 @icmp_ule_basic
 ; CHECK-SAME: (i32 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[ARG]], i32 2)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ARG]], 2
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i32 @llvm.uadd.sat.i32(i32 %arg, i32 2)
   %cmp = icmp ule i32 %add, 3
   ret i1 %cmp
 }
 
 define i1 @icmp_ult_basic(i64 %arg) {
 ; CHECK-LABEL: define i1 @icmp_ult_basic
 ; CHECK-SAME: (i64 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[ARG]], i64 5)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[ADD]], 20
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[ARG]], 15
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i64 @llvm.uadd.sat.i64(i64 %arg, i64 5)
   %cmp = icmp ult i64 %add, 20
   ret i1 %cmp
 }
 
 define i1 @icmp_uge_basic(i8 %arg) {
 ; CHECK-LABEL: define i1 @icmp_uge_basic
 ; CHECK-SAME: (i8 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[ARG]], i8 4)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[ADD]], 7
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[ARG]], 3
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i8 @llvm.uadd.sat.i8(i8 %arg, i8 4)
   %cmp = icmp uge i8 %add, 8
   ret i1 %cmp
 }
 
 define i1 @icmp_ugt_basic(i16 %arg) {
 ; CHECK-LABEL: define i1 @icmp_ugt_basic
 ; CHECK-SAME: (i16 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG]], i16 1)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i16 [[ADD]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i16 [[ARG]], 2
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i16 @llvm.uadd.sat.i16(i16 %arg, i16 1)
   %cmp = icmp ugt i16 %add, 3
   ret i1 %cmp
 }
 
 define i1 @icmp_sle_basic(i32 %arg) {
 ; CHECK-LABEL: define i1 @icmp_sle_basic
 ; CHECK-SAME: (i32 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[ARG]], i32 10)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[ADD]], 9
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[ARG]], 2147483637
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i32 @llvm.uadd.sat.i32(i32 %arg, i32 10)
   %cmp = icmp sle i32 %add, 8
   ret i1 %cmp
 }
 
 define i1 @icmp_slt_basic(i64 %arg) {
 ; CHECK-LABEL: define i1 @icmp_slt_basic
 ; CHECK-SAME: (i64 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[ARG]], i64 24)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[ADD]], 5
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[ARG]], 9223372036854775783
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i64 @llvm.uadd.sat.i64(i64 %arg, i64 24)
   %cmp = icmp slt i64 %add, 5
   ret i1 %cmp
 }
 
 define i1 @icmp_sge_basic(i8 %arg) {
 ; CHECK-LABEL: define i1 @icmp_sge_basic
 ; CHECK-SAME: (i8 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[ARG]], i8 1)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[ADD]], 3
+; CHECK-NEXT:    [[TMP1:%.*]] = add i8 [[ARG]], -3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i8 [[TMP1]], 124
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i8 @llvm.uadd.sat.i8(i8 %arg, i8 1)
   %cmp = icmp sge i8 %add, 4
   ret i1 %cmp
 }
 
 define i1 @icmp_sgt_basic(i16 %arg) {
 ; CHECK-LABEL: define i1 @icmp_sgt_basic
 ; CHECK-SAME: (i16 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[ARG]], i16 2)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i16 [[ADD]], 5
+; CHECK-NEXT:    [[TMP1:%.*]] = add i16 [[ARG]], -4
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i16 [[TMP1]], 32762
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %add = call i16 @llvm.uadd.sat.i16(i16 %arg, i16 2)
   %cmp = icmp sgt i16 %add, 5
   ret i1 %cmp
 }
 
 ; ==============================================================================

 }
 
 ; ==============================================================================
 ; Tests with vector types
 ; ==============================================================================
 define <2 x i1> @icmp_eq_vector_equal(<2 x i8> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_eq_vector_equal
 ; CHECK-SAME: (<2 x i8> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[ARG]], <2 x i8> <i8 2, i8 2>)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp eq <2 x i8> [[ADD]], <i8 5, i8 5>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq <2 x i8> [[ARG]], <i8 3, i8 3>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> %arg, <2 x i8> <i8 2, i8 2>)
   %cmp = icmp eq <2 x i8> %add, <i8 5, i8 5>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_eq_vector_unequal(<2 x i8> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_eq_vector_unequal
 ; CHECK-SAME: (<2 x i8> [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> [[ARG]], <2 x i8> <i8 1, i8 2>)
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq <2 x i8> [[ADD]], <i8 5, i8 6>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8> %arg, <2 x i8> <i8 1, i8 2>)
   %cmp = icmp eq <2 x i8> %add, <i8 5, i8 6>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_ne_vector_equal(<2 x i16> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_ne_vector_equal
 ; CHECK-SAME: (<2 x i16> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[ARG]], <2 x i16> <i16 3, i16 3>)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i16> [[ADD]], <i16 5, i16 5>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i16> [[ARG]], <i16 2, i16 2>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> %arg, <2 x i16> <i16 3, i16 3>)
   %cmp = icmp ne <2 x i16> %add, <i16 5, i16 5>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_ne_vector_unequal(<2 x i16> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_ne_vector_unequal
 ; CHECK-SAME: (<2 x i16> [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[ARG]], <2 x i16> <i16 3, i16 33>)
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ne <2 x i16> [[ADD]], <i16 7, i16 6>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> %arg, <2 x i16> <i16 3, i16 33>)
   %cmp = icmp ne <2 x i16> %add, <i16 7, i16 6>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_ule_vector_equal(<2 x i32> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_ule_vector_equal
 ; CHECK-SAME: (<2 x i32> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> [[ARG]], <2 x i32> <i32 3, i32 3>)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[ADD]], <i32 5, i32 5>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[ARG]], <i32 2, i32 2>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> %arg, <2 x i32> <i32 3, i32 3>)
   %cmp = icmp ult <2 x i32> %add, <i32 5, i32 5>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_ule_vector_unequal(<2 x i32> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_ule_vector_unequal
 ; CHECK-SAME: (<2 x i32> [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> [[ARG]], <2 x i32> <i32 3, i32 35>)
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[ADD]], <i32 5, i32 7>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> %arg, <2 x i32> <i32 3, i32 35>)
   %cmp = icmp ult <2 x i32> %add, <i32 5, i32 7>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_sgt_vector_equal(<2 x i64> %arg) {
 ; CHECK-LABEL: define <2 x i1> @icmp_sgt_vector_equal
 ; CHECK-SAME: (<2 x i64> [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ADD:%.*]] = call <2 x i64> @llvm.uadd.sat.v2i64(<2 x i64> [[ARG]], <2 x i64> <i64 409623, i64 409623>)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i64> [[ADD]], <i64 1234, i64 1234>
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i64> [[ARG]], <i64 9223372036854366185, i64 9223372036854366185>
 ; CHECK-NEXT:    ret <2 x i1> [[CMP]]
 ;
   %add = call <2 x i64> @llvm.uadd.sat.v2i64(<2 x i64> %arg, <2 x i64> <i64 409623, i64 409623>)
   %cmp = icmp sgt <2 x i64> %add, <i64 1234, i64 1234>
   ret <2 x i1> %cmp
 }
 
 define <2 x i1> @icmp_sgt_vector_unequal(<2 x i64> %arg) {

llvm/test/Transforms/InstCombine/icmp-usub-sat.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 
-; Tests for InstCombineCompares.cpp::foldICmpUSubSatWithConstant
+; Tests for InstCombineCompares.cpp::foldICmpUSubSatOrUAddSatWithConstant
+; - usub_sat case
 ; https://github.com/llvm/llvm-project/issues/58342
 
 ; ==============================================================================
 ; Basic tests with one user and positive arguments
 ; ==============================================================================
 define i1 @icmp_eq_basic_positive(i8 %arg) {
 ; CHECK-LABEL: define i1 @icmp_eq_basic_positive
 ; CHECK-SAME: (i8 [[ARG:%.*]]) {