[CSKY] Optimize multiplication with immediates

[benshi001]

Summary

Optimize "Rx * imm" for specific immediates to
([IXH32|IXW32|IXD32] (LSLI Rx, shift), Rx).

[benshi001]

ping 。。。

[benshi001]

ping ...

[benshi001]

closed by
https://reviews.llvm.org/rG57c6fe273f237cca8c045a8c02266117c4ff72fb
https://github.com/llvm/llvm-project/commit/57c6fe273f237cca8c045a8c02266117c4ff72fb

llvm/lib/Target/CSKY/CSKYISelLowering.cpp

if (auto *ConstNode = dyn_cast<ConstantSDNode>(C.getNode())) {
     if ((Imm + 1).isPowerOf2() || (Imm - 1).isPowerOf2() ||
         (1 - Imm).isPowerOf2())
       return true;
     // Only break MULT for sub targets without MULT32, since an extra
     // instruction will be generated against the above 3 cases. We leave it
     // unchanged on sub targets with MULT32, since not sure it is better.
     if (!Subtarget.hasE2() && (-1 - Imm).isPowerOf2())
       return true;
+    // Break (MULT x, imm) to ([IXH32|IXW32|IXD32] (LSLI32 x, i0), x) when
+    // imm=(1<<i0)+[2|4|8] and imm has to be composed via a MOVIH32/ORI32 pair.
+    if (Imm.ugt(0xffff) && ((Imm - 2).isPowerOf2() || (Imm - 4).isPowerOf2()) &&
+        Subtarget.hasE2())
+      return true;
+    if (Imm.ugt(0xffff) && (Imm - 8).isPowerOf2() && Subtarget.has2E3())
+       return true;
   }
 
   return false;
 }

llvm/test/CodeGen/CSKY/mul-imm.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 < %s -mtriple=csky | FileCheck %s
+; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
 
 ;; This file shows if a multiplication can be simplified to an addition/subtraction
 ;; of left shifts.
 
 define i32 @mul_i32_4097(i32 %x) {
 ; CHECK-LABEL: mul_i32_4097:
 ; CHECK:       # %bb.0: # %entry

 entry:
   %y = mul nsw i32 %x, -4095
   ret i32 %y
 }
 
 define i32 @mul_i32_131074(i32 %x) {
 ; CHECK-LABEL: mul_i32_131074:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    ori32 a1, a1, 2
-; CHECK-NEXT:    mult16 a0, a1
+; CHECK-NEXT:    lsli16 a1, a0, 17
+; CHECK-NEXT:    ixh32 a0, a1, a0
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: mul_i32_131074:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st16.w l0, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset l0, -4

 entry:
   %y = mul nsw i32 %x, 131074
   ret i32 %y
 }
 
 define i32 @mul_i32_131076(i32 %x) {
 ; CHECK-LABEL: mul_i32_131076:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    ori32 a1, a1, 4
-; CHECK-NEXT:    mult16 a0, a1
+; CHECK-NEXT:    lsli16 a1, a0, 17
+; CHECK-NEXT:    ixw32 a0, a1, a0
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: mul_i32_131076:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 0
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    movi16 a1, 0

 entry:
   %y = mul nsw i32 %x, 131076
   ret i32 %y
 }
 
 define i32 @mul_i32_131080(i32 %x) {
 ; CHECK-LABEL: mul_i32_131080:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    movih32 a1, 2
-; CHECK-NEXT:    ori32 a1, a1, 8
-; CHECK-NEXT:    mult16 a0, a1
+; CHECK-NEXT:    lsli16 a1, a0, 17
+; CHECK-NEXT:    ixd32 a0, a1, a0
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: mul_i32_131080:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 0
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    movi16 a1, 0

 define i64 @mul_i64_4097(i64 %x) {
 ; CHECK-LABEL: mul_i64_4097:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    subi16 sp, sp, 4
 ; CHECK-NEXT:    .cfi_def_cfa_offset 4
 ; CHECK-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; CHECK-NEXT:    .cfi_offset lr, -4
 ; CHECK-NEXT:    .cfi_def_cfa_offset 4
-; CHECK-NEXT:    lrw32 t0, [.LCPI15_0]
 ; CHECK-NEXT:    movi32 a2, 4097
 ; CHECK-NEXT:    movi16 a3, 0
-; CHECK-NEXT:    jsr16 t0
+; CHECK-NEXT:    jsri32 [.LCPI15_0]
 ; CHECK-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; CHECK-NEXT:    addi16 sp, sp, 4
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:    .p2align 1
 ; CHECK-NEXT:  # %bb.1:
 ; CHECK-NEXT:    .p2align 2, 0x0
 ; CHECK-NEXT:  .LCPI15_0:
 ; CHECK-NEXT:    .long __muldi3