[CSKY] Optimize constant materialization with BMASKI32

[benshi001]

Summary

For constant like 0b1, 0b11, 0b111, 0b1111, ..., they can be
materialized with BMASKI32 other than a MOVIH32/ORI32 pair.

llvm/lib/Target/CSKY/CSKYInstrInfo.td

 }
 
 def uimm_shift : Operand<i32>, ImmLeaf<i32, "return isUInt<2>(Imm);"> {
   let EncoderMethod = "getImmShiftOpValue";
   let ParserMatchClass = UImmAsmOperand<2>;
   let DecoderMethod = "decodeImmShiftOpValue";
 }
 
+// Optimize constant materialization with BMASKI32.
+def imm_bmask_XFORM : SDNodeXForm<imm, [{
+  uint32_t I = N->getZExtValue() + 1;
+  if (I == 0)
+    return CurDAG->getTargetConstant(32, SDLoc(N),
+                                     N->getValueType(0));
+  else
+    return CurDAG->getTargetConstant(llvm::Log2_32(I), SDLoc(N),
+                                     N->getValueType(0));
+}]>;
+def imm_bmask : PatLeaf<(imm), [{
+  uint32_t I = N->getZExtValue() + 1;
+  return (llvm::popcount(I) == 1 && I >= 0x20000) || I == 0;
+}]>;
+
 def CSKYSymbol : AsmOperandClass {
   let Name = "CSKYSymbol";
   let RenderMethod = "addImmOperands";
   let DiagnosticType = "InvalidCSKYSymbol";
   let ParserMethod = "parseCSKYSymbol";
 }
 
 def br_symbol : Operand<OtherVT> {

 
 defm : MOVTF32Pat1<setuge, setule, CMPHS32, MOVT32>;
 defm : MOVTF32Pat1<setult, setugt, CMPHS32, MOVF32>;
 defm : MOVTF32Pat1<setlt, setgt, CMPLT32, MOVT32>;
 defm : MOVTF32Pat1<setge, setle, CMPLT32, MOVF32>;
 }
 
 // Constant materialize patterns.
-let Predicates = [iHasE2] in
+let Predicates = [iHasE2] in {
   def : Pat<(i32 imm:$imm),
             (ORI32 (MOVIH32 (uimm32_hi16 imm:$imm)), (uimm32_lo16 imm:$imm))>;
+  def : Pat<(i32 imm_bmask:$imm),
+            (BMASKI32 (imm_bmask_XFORM imm_bmask:$imm))>;
+}
 
 // Other operations.
 let Predicates = [iHasE2] in {
   def : Pat<(rotl GPR:$rs1, GPR:$rs2),
             (ROTL32 GPR:$rs1, (ANDI32 GPR:$rs2, 0x1f))>;
   let Predicates = [iHas2E3] in {
     def : Pat<(bitreverse GPR:$rx), (BREV32 GPR:$rx)>;
     def : Pat<(bswap GPR:$rx), (REVB32 GPR:$rx)>;

llvm/test/CodeGen/CSKY/base-i.ll

 ; GENERIC-NEXT:    addu16 a0, a0, a2
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 entry:
   %add = add nsw i32 %x, 4096
   ret i32 %add
 }
 
+define i32 @addRI_0x1ffff(i32 %x) {
+; CHECK-LABEL: addRI_0x1ffff:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    bmaski32 a1, 17
+; CHECK-NEXT:    addu16 a0, a1
+; CHECK-NEXT:    rts16
+;
+; GENERIC-LABEL: addRI_0x1ffff:
+; GENERIC:       # %bb.0: # %entry
+; GENERIC-NEXT:    .cfi_def_cfa_offset 0
+; GENERIC-NEXT:    subi16 sp, sp, 4
+; GENERIC-NEXT:    .cfi_def_cfa_offset 4
+; GENERIC-NEXT:    movi16 a1, 0
+; GENERIC-NEXT:    lsli16 a1, a1, 24
+; GENERIC-NEXT:    movi16 a2, 1
+; GENERIC-NEXT:    lsli16 a2, a2, 16
+; GENERIC-NEXT:    or16 a2, a1
+; GENERIC-NEXT:    movi16 a1, 255
+; GENERIC-NEXT:    lsli16 a3, a1, 8
+; GENERIC-NEXT:    or16 a3, a2
+; GENERIC-NEXT:    or16 a3, a1
+; GENERIC-NEXT:    addu16 a0, a0, a3
+; GENERIC-NEXT:    addi16 sp, sp, 4
+; GENERIC-NEXT:    rts16
+entry:
+  %add = add nsw i32 %x, 131071
+  ret i32 %add
+}
+
 define i32 @addRI_X(i32 %x) {
 ; CHECK-LABEL: addRI_X:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movi32 a1, 4097
 ; CHECK-NEXT:    addu16 a0, a1
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: addRI_X:
entry:
   %sub = sub nsw i64 %y, %x
   ret i64 %sub
 }
 
 define i64 @SUB_LONG_I(i64 %x) {
 ; CHECK-LABEL: SUB_LONG_I:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    clrc32
-; CHECK-NEXT:    movih32 a2, 65535
-; CHECK-NEXT:    ori32 a2, a2, 65535
+; CHECK-NEXT:    bmaski32 a2, 32
 ; CHECK-NEXT:    addc16 a0, a2
 ; CHECK-NEXT:    addc16 a1, a2
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: SUB_LONG_I:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4

 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
 ; GENERIC-NEXT:    mov16 a2, a0
-; GENERIC-NEXT:    lrw32 a3, [.LCPI29_0]
+; GENERIC-NEXT:    lrw32 a3, [.LCPI30_0]
 ; GENERIC-NEXT:    mov16 a0, a1
 ; GENERIC-NEXT:    mov16 a1, a2
 ; GENERIC-NEXT:    jsr16 a3
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI29_0:
+; GENERIC-NEXT:  .LCPI30_0:
 ; GENERIC-NEXT:    .long __udivsi3
 entry:
   %udiv = udiv  i32 %y, %x
   ret i32 %udiv
 }
 
 define i32 @udivRI(i32 %x) {
 ; CHECK-LABEL: udivRI:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movi16 a1, 10
 ; CHECK-NEXT:    divu32 a0, a0, a1
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: udivRI:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
-; GENERIC-NEXT:    lrw32 a2, [.LCPI30_0]
+; GENERIC-NEXT:    lrw32 a2, [.LCPI31_0]
 ; GENERIC-NEXT:    movi16 a1, 10
 ; GENERIC-NEXT:    jsr16 a2
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI30_0:
+; GENERIC-NEXT:  .LCPI31_0:
 ; GENERIC-NEXT:    .long __udivsi3
 entry:
   %udiv = udiv  i32 %x, 10
   ret i32 %udiv
 }
 
 define i32 @udivRI_X(i32 %x) {
 ; CHECK-LABEL: udivRI_X:

 ; GENERIC-NEXT:    lsli16 a2, a1, 24
 ; GENERIC-NEXT:    lsli16 a1, a1, 16
 ; GENERIC-NEXT:    or16 a1, a2
 ; GENERIC-NEXT:    movi16 a2, 16
 ; GENERIC-NEXT:    lsli16 a2, a2, 8
 ; GENERIC-NEXT:    or16 a2, a1
 ; GENERIC-NEXT:    movi16 a1, 1
 ; GENERIC-NEXT:    or16 a1, a2
-; GENERIC-NEXT:    lrw32 a2, [.LCPI31_0]
+; GENERIC-NEXT:    lrw32 a2, [.LCPI32_0]
 ; GENERIC-NEXT:    jsr16 a2
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI31_0:
+; GENERIC-NEXT:  .LCPI32_0:
 ; GENERIC-NEXT:    .long __udivsi3
 entry:
   %udiv = udiv  i32 %x, 4097
   ret i32 %udiv
 }
 
 define i16 @UDIV_SHORT(i16 %x, i16 %y) {
 ; CHECK-LABEL: UDIV_SHORT:

 ; GENERIC-NEXT:    lsli16 l0, a1, 16
 ; GENERIC-NEXT:    or16 l0, a3
 ; GENERIC-NEXT:    movi16 a3, 255
 ; GENERIC-NEXT:    lsli16 a1, a3, 8
 ; GENERIC-NEXT:    or16 a1, l0
 ; GENERIC-NEXT:    or16 a1, a3
 ; GENERIC-NEXT:    and16 a2, a1
 ; GENERIC-NEXT:    and16 a1, a0
-; GENERIC-NEXT:    lrw32 a3, [.LCPI32_0]
+; GENERIC-NEXT:    lrw32 a3, [.LCPI33_0]
 ; GENERIC-NEXT:    mov16 a0, a2
 ; GENERIC-NEXT:    jsr16 a3
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    ld16.w l0, (sp, 4) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 8
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI32_0:
+; GENERIC-NEXT:  .LCPI33_0:
 ; GENERIC-NEXT:    .long __udivsi3
 entry:
   %udiv = udiv  i16 %y, %x
   ret i16 %udiv
 }
 
 define i16 @UDIV_SHORT_I(i16 %x) {
 ; CHECK-LABEL: UDIV_SHORT_I:

 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
 ; GENERIC-NEXT:    mov16 a2, a1
 ; GENERIC-NEXT:    movi16 a1, 255
 ; GENERIC-NEXT:    and16 a2, a1
 ; GENERIC-NEXT:    and16 a1, a0
-; GENERIC-NEXT:    lrw32 a3, [.LCPI34_0]
+; GENERIC-NEXT:    lrw32 a3, [.LCPI35_0]
 ; GENERIC-NEXT:    mov16 a0, a2
 ; GENERIC-NEXT:    jsr16 a3
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI34_0:
+; GENERIC-NEXT:  .LCPI35_0:
 ; GENERIC-NEXT:    .long __udivsi3
 entry:
   %udiv = udiv  i8 %y, %x
   ret i8 %udiv
 }
 
 define i8 @UDIV_CHAR_I(i8 %x) {
 ; CHECK-LABEL: UDIV_CHAR_I:

 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
 ; GENERIC-NEXT:    mov16 a2, a0
-; GENERIC-NEXT:    lrw32 a3, [.LCPI36_0]
+; GENERIC-NEXT:    lrw32 a3, [.LCPI37_0]
 ; GENERIC-NEXT:    mov16 a0, a1
 ; GENERIC-NEXT:    mov16 a1, a2
 ; GENERIC-NEXT:    jsr16 a3
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI36_0:
+; GENERIC-NEXT:  .LCPI37_0:
 ; GENERIC-NEXT:    .long __divsi3
 entry:
   %sdiv = sdiv  i32 %y, %x
   ret i32 %sdiv
 }
 
 define i32 @sdivRI(i32 %x) {
 ; CHECK-LABEL: sdivRI:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movi16 a1, 10
 ; CHECK-NEXT:    divs32 a0, a0, a1
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: sdivRI:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
-; GENERIC-NEXT:    lrw32 a2, [.LCPI37_0]
+; GENERIC-NEXT:    lrw32 a2, [.LCPI38_0]
 ; GENERIC-NEXT:    movi16 a1, 10
 ; GENERIC-NEXT:    jsr16 a2
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI37_0:
+; GENERIC-NEXT:  .LCPI38_0:
 ; GENERIC-NEXT:    .long __divsi3
 entry:
   %sdiv = sdiv  i32 %x, 10
   ret i32 %sdiv
 }
 
 define i32 @sdivRI_X(i32 %x) {
 ; CHECK-LABEL: sdivRI_X:

 ; GENERIC-NEXT:    lsli16 a2, a1, 24
 ; GENERIC-NEXT:    lsli16 a1, a1, 16
 ; GENERIC-NEXT:    or16 a1, a2
 ; GENERIC-NEXT:    movi16 a2, 16
 ; GENERIC-NEXT:    lsli16 a2, a2, 8
 ; GENERIC-NEXT:    or16 a2, a1
 ; GENERIC-NEXT:    movi16 a1, 1
 ; GENERIC-NEXT:    or16 a1, a2
-; GENERIC-NEXT:    lrw32 a2, [.LCPI38_0]
+; GENERIC-NEXT:    lrw32 a2, [.LCPI39_0]
 ; GENERIC-NEXT:    jsr16 a2
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI38_0:
+; GENERIC-NEXT:  .LCPI39_0:
 ; GENERIC-NEXT:    .long __divsi3
 entry:
   %sdiv = sdiv  i32 %x, 4097
   ret i32 %sdiv
 }
 
 define i16 @SDIV_SHORT(i16 %x, i16 %y) {
 ; CHECK-LABEL: SDIV_SHORT:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    sexth16 a0, a0
 ; CHECK-NEXT:    sexth16 a1, a1
 ; CHECK-NEXT:    divs32 a0, a1, a0
 ; CHECK-NEXT:    rts16
 ;
 ; GENERIC-LABEL: SDIV_SHORT:
 ; GENERIC:       # %bb.0: # %entry
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
 ; GENERIC-NEXT:    sexth16 a2, a1
 ; GENERIC-NEXT:    sexth16 a1, a0
-; GENERIC-NEXT:    lrw32 a3, [.LCPI39_0]
+; GENERIC-NEXT:    lrw32 a3, [.LCPI40_0]
 ; GENERIC-NEXT:    mov16 a0, a2
 ; GENERIC-NEXT:    jsr16 a3
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI39_0:
+; GENERIC-NEXT:  .LCPI40_0:
 ; GENERIC-NEXT:    .long __divsi3
 entry:
   %sdiv = sdiv  i16 %y, %x
   ret i16 %sdiv
 }
 
 define i16 @SDIV_SHORT_I(i16 %x) {
 ; CHECK-LABEL: SDIV_SHORT_I:

 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 4
 ; GENERIC-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
 ; GENERIC-NEXT:    .cfi_offset lr, -4
 ; GENERIC-NEXT:    subi16 sp, sp, 4
 ; GENERIC-NEXT:    .cfi_def_cfa_offset 8
 ; GENERIC-NEXT:    sextb16 a2, a1
 ; GENERIC-NEXT:    sextb16 a1, a0
-; GENERIC-NEXT:    lrw32 a3, [.LCPI41_0]
+; GENERIC-NEXT:    lrw32 a3, [.LCPI42_0]
 ; GENERIC-NEXT:    mov16 a0, a2
 ; GENERIC-NEXT:    jsr16 a3
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
 ; GENERIC-NEXT:    addi16 sp, sp, 4
 ; GENERIC-NEXT:    rts16
 ; GENERIC-NEXT:    .p2align 1
 ; GENERIC-NEXT:  # %bb.1:
 ; GENERIC-NEXT:    .p2align 2, 0x0
-; GENERIC-NEXT:  .LCPI41_0:
+; GENERIC-NEXT:  .LCPI42_0:
 ; GENERIC-NEXT:    .long __divsi3
 entry:
   %sdiv = sdiv  i8 %y, %x
   ret i8 %sdiv
 }
 
 define i8 @SDIV_CHAR_I(i8 %x) {
 ; CHECK-LABEL: SDIV_CHAR_I:

llvm/test/CodeGen/CSKY/switch.ll

 ; CHECK-NEXT:  # %bb.1: # %entry
 ; CHECK-NEXT:    lrw32 a1, [.LCPI0_0]
 ; CHECK-NEXT:    ldr32.w a0, (a1, a0 << 2)
 ; CHECK-NEXT:    jmp32 a0
 ; CHECK-NEXT:  .LBB0_2: # %onzero
 ; CHECK-NEXT:    movi16 a0, 0
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:  .LBB0_3: # %otherwise
-; CHECK-NEXT:    movih32 a0, 65535
-; CHECK-NEXT:    ori32 a0, a0, 65535
+; CHECK-NEXT:    bmaski32 a0, 32
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:  .LBB0_4: # %onone
 ; CHECK-NEXT:    movi16 a0, 1
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:  .LBB0_5: # %ontwo
 ; CHECK-NEXT:    movi16 a0, 2
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:  .LBB0_6: # %onfour
 ; CHECK-NEXT:    movi16 a0, 4
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:  .LBB0_7: # %onthree
 ; CHECK-NEXT:    movi16 a0, 3
 ; CHECK-NEXT:    rts16
 ; CHECK-NEXT:    .p2align 1
 ; CHECK-NEXT:  # %bb.8:
-; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:    .p2align 2, 0x0
 ; CHECK-NEXT:  .LCPI0_0:
 ; CHECK-NEXT:    .long .LJTI0_0
 ;
 ; CHECK-PIC-SMALL-LABEL: f:
 ; CHECK-PIC-SMALL:       # %bb.0: # %entry
 ; CHECK-PIC-SMALL-NEXT:    subi16 sp, sp, 4
 ; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 4
 ; CHECK-PIC-SMALL-NEXT:    st32.w rgb, (sp, 0) # 4-byte Folded Spill
 ; CHECK-PIC-SMALL-NEXT:    .cfi_offset rgb, -4
 ; CHECK-PIC-SMALL-NEXT:    .cfi_def_cfa_offset 4
 ; CHECK-PIC-SMALL-NEXT:    lrw32 rgb, [.LCPI0_0]
 ; CHECK-PIC-SMALL-NEXT:    movi16 a1, 4
 ; CHECK-PIC-SMALL-NEXT:    cmphs16 a1, a0
 ; CHECK-PIC-SMALL-NEXT:    bf32 .LBB0_3
 ; CHECK-PIC-SMALL-NEXT:  # %bb.1: # %entry
 ; CHECK-PIC-SMALL-NEXT:    lrw32 a1, [.LCPI0_1]
 ; CHECK-PIC-SMALL-NEXT:    addu32 a1, rgb, a1
 ; CHECK-PIC-SMALL-NEXT:    ldr32.w a0, (a1, a0 << 2)
 ; CHECK-PIC-SMALL-NEXT:    addu16 a0, a1
 ; CHECK-PIC-SMALL-NEXT:    jmp32 a0
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_2: # %onzero
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 0
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_3: # %otherwise
-; CHECK-PIC-SMALL-NEXT:    movih32 a0, 65535
-; CHECK-PIC-SMALL-NEXT:    ori32 a0, a0, 65535
+; CHECK-PIC-SMALL-NEXT:    bmaski32 a0, 32
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_4: # %onone
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 1
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_5: # %ontwo
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 2
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_6: # %onfour
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 4
 ; CHECK-PIC-SMALL-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_7: # %onthree
 ; CHECK-PIC-SMALL-NEXT:    movi16 a0, 3
 ; CHECK-PIC-SMALL-NEXT:  .LBB0_8: # %onone
 ; CHECK-PIC-SMALL-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
 ; CHECK-PIC-SMALL-NEXT:    addi16 sp, sp, 4
 ; CHECK-PIC-SMALL-NEXT:    rts16
 ; CHECK-PIC-SMALL-NEXT:    .p2align 1
 ; CHECK-PIC-SMALL-NEXT:  # %bb.9:
-; CHECK-PIC-SMALL-NEXT:    .p2align 2
+; CHECK-PIC-SMALL-NEXT:    .p2align 2, 0x0
 ; CHECK-PIC-SMALL-NEXT:  .LCPI0_0:
 ; CHECK-PIC-SMALL-NEXT:    .long _GLOBAL_OFFSET_TABLE_
 ; CHECK-PIC-SMALL-NEXT:  .LCPI0_1:
 ; CHECK-PIC-SMALL-NEXT:    .long .LJTI0_0@GOTOFF
 ;
 ; CHECK-PIC-LARGE-LABEL: f:
 ; CHECK-PIC-LARGE:       # %bb.0: # %entry
 ; CHECK-PIC-LARGE-NEXT:    subi16 sp, sp, 4

 ; CHECK-PIC-LARGE-NEXT:    addu32 a1, rgb, a1
 ; CHECK-PIC-LARGE-NEXT:    ldr32.w a0, (a1, a0 << 2)
 ; CHECK-PIC-LARGE-NEXT:    addu16 a0, a1
 ; CHECK-PIC-LARGE-NEXT:    jmp32 a0
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_2: # %onzero
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 0
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_3: # %otherwise
-; CHECK-PIC-LARGE-NEXT:    movih32 a0, 65535
-; CHECK-PIC-LARGE-NEXT:    ori32 a0, a0, 65535
+; CHECK-PIC-LARGE-NEXT:    bmaski32 a0, 32
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_4: # %onone
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 1
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_5: # %ontwo
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 2
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_6: # %onfour
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 4
 ; CHECK-PIC-LARGE-NEXT:    br32 .LBB0_8
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_7: # %onthree
 ; CHECK-PIC-LARGE-NEXT:    movi16 a0, 3
 ; CHECK-PIC-LARGE-NEXT:  .LBB0_8: # %onone
 ; CHECK-PIC-LARGE-NEXT:    ld32.w rgb, (sp, 0) # 4-byte Folded Reload
 ; CHECK-PIC-LARGE-NEXT:    addi16 sp, sp, 4
 ; CHECK-PIC-LARGE-NEXT:    rts16
 ; CHECK-PIC-LARGE-NEXT:    .p2align 1
 ; CHECK-PIC-LARGE-NEXT:  # %bb.9:
-; CHECK-PIC-LARGE-NEXT:    .p2align 2
+; CHECK-PIC-LARGE-NEXT:    .p2align 2, 0x0
 ; CHECK-PIC-LARGE-NEXT:  .LCPI0_0:
 ; CHECK-PIC-LARGE-NEXT:    .long _GLOBAL_OFFSET_TABLE_
 ; CHECK-PIC-LARGE-NEXT:  .LCPI0_1:
 ; CHECK-PIC-LARGE-NEXT:    .long .LJTI0_0@GOTOFF
 entry:
   switch i32 %val, label %otherwise [ i32 0, label %onzero
                                       i32 1, label %onone
                                       i32 3, label %onfour