This bumps the "large-interval-freq-threshold" limit in the register coalescer to 256. The limit was introduced in https://reviews.llvm.org/D59143 without much justify for the particular value "100", so I hope bumping it is ok.
This change is motivated by bad codegen for the popular crc32c algorithm; the code is often based/copied from this implementation: https://github.com/htot/crc32c/blob/master/crc32c/crc32intelc.cc which uses a duffs-device pattern with 128 switch-cases. There are examples in RocksDB (https://github.com/facebook/rocksdb/blob/main/util/crc32c.cc) and Folly (https://github.com/facebook/folly/blob/main/folly/hash/detail/Crc32cDetail.cpp) which are important use cases for us.