This is an archive of the discontinued LLVM Phabricator instance.

Differential D14997

[X86][FMA4] Prefer FMA4 to FMA
ClosedPublic

Authored by RKSimon on Nov 25 2015, 1:36 PM.

Details

Reviewers
spatel
craig.topper
Commits
rGdb26b3ddfaf3: [X86][FMA4] Prefer FMA4 to FMA
rL254339: [X86][FMA4] Prefer FMA4 to FMA
Summary

We currently output FMA instructions on targets which support both FMA4 + FMA (i.e. later Bulldozer CPUS bdver2/bdver3/bdver4).

This patch flips this so FMA4 is preferred; this is for several reasons:

1 - FMA4 is non-destructive reducing the need for mov instructions.
2 - Its more straighforward to commute and fold inputs (although the recent work on FMA has reduced this difference).
3 - All supported targets have FMA4 performance equal or better to FMA - Piledriver (bdver2) in particular has half the throughput when executing FMA instructions.

Its looks like no future AMD processor lines will support FMA4 after the Bulldozer series so we're not causing problems for later CPUs.

(Craig - it looks like it only took 3 years to make this change after your original patch at r162454!)

Diff Detail

Repository
rL LLVM

Event Timeline

RKSimon updated this revision to Diff 41177.Nov 25 2015, 1:36 PM
RKSimon retitled this revision from to [X86][FMA4] Prefer FMA4 to FMA.
RKSimon updated this object.
RKSimon added reviewers: craig.topper, spatel.
RKSimon set the repository for this revision to rL LLVM.
RKSimon added a subscriber: llvm-commits.
spatel accepted this revision.Nov 29 2015, 1:43 PM
spatel edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Nov 29 2015, 1:43 PM
Closed by commit rL254339: [X86][FMA4] Prefer FMA4 to FMA (authored by RKSimon). · Explain WhyNov 30 2015, 2:25 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
X86/
7 lines
test/
CodeGen/
X86/
2 lines
2 lines
2 lines

Diff 41436

llvm/trunk/lib/Target/X86/X86Subtarget.h

Show First 20 Lines • Show All 348 Lines • ▼ Show 20 Linespublic:
bool hasPOPCNT() const { return HasPOPCNT; } bool hasPOPCNT() const { return HasPOPCNT; }
bool hasAES() const { return HasAES; } bool hasAES() const { return HasAES; }
bool hasFXSR() const { return HasFXSR; } bool hasFXSR() const { return HasFXSR; }
bool hasXSAVE() const { return HasXSAVE; } bool hasXSAVE() const { return HasXSAVE; }
bool hasXSAVEOPT() const { return HasXSAVEOPT; } bool hasXSAVEOPT() const { return HasXSAVEOPT; }
bool hasXSAVEC() const { return HasXSAVEC; } bool hasXSAVEC() const { return HasXSAVEC; }
bool hasXSAVES() const { return HasXSAVES; } bool hasXSAVES() const { return HasXSAVES; }
bool hasPCLMUL() const { return HasPCLMUL; } bool hasPCLMUL() const { return HasPCLMUL; }
bool hasFMA() const { return HasFMA; } // Prefer FMA4 to FMA - its better for commutation/memory folding and
// FIXME: Favor FMA when both are enabled. Is this the right thing to do? // has equal or better performance on all supported targets.
bool hasFMA4() const { return HasFMA4 && !HasFMA; } bool hasFMA() const { return HasFMA && !HasFMA4; }
bool hasFMA4() const { return HasFMA4; }
bool hasXOP() const { return HasXOP; } bool hasXOP() const { return HasXOP; }
bool hasTBM() const { return HasTBM; } bool hasTBM() const { return HasTBM; }
bool hasMOVBE() const { return HasMOVBE; } bool hasMOVBE() const { return HasMOVBE; }
bool hasRDRAND() const { return HasRDRAND; } bool hasRDRAND() const { return HasRDRAND; }
bool hasF16C() const { return HasF16C; } bool hasF16C() const { return HasF16C; }
bool hasFSGSBase() const { return HasFSGSBase; } bool hasFSGSBase() const { return HasFSGSBase; }
bool hasLZCNT() const { return HasLZCNT; } bool hasLZCNT() const { return HasLZCNT; }
bool hasBMI() const { return HasBMI; } bool hasBMI() const { return HasBMI; }
▲ Show 20 Lines • Show All 169 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/fma-commute-x86.ll

; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-pc-win32 -mattr=+fma,+fma4 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-pc-win32 -mattr=+fma | FileCheck %s
; RUN: llc < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 -mattr=-fma4 | FileCheck %s ; RUN: llc < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 -mattr=-fma4 | FileCheck %s
attributes #0 = { nounwind } attributes #0 = { nounwind }
declare <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone declare <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
define <4 x float> @test_x86_fmadd_baa_ss(<4 x float> %a, <4 x float> %b) #0 { define <4 x float> @test_x86_fmadd_baa_ss(<4 x float> %a, <4 x float> %b) #0 {
; CHECK-LABEL: test_x86_fmadd_baa_ss: ; CHECK-LABEL: test_x86_fmadd_baa_ss:
; CHECK: # BB#0: ; CHECK: # BB#0:
▲ Show 20 Lines • Show All 751 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/fma_patterns.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA4
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=FMA4
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl -fp-contract=fast | FileCheck %s --check-prefix=ALL --check-prefix=AVX512
; ;
; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z) ; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z)
; ;
define float @test_f32_fmadd(float %a0, float %a1, float %a2) { define float @test_f32_fmadd(float %a0, float %a1, float %a2) {
▲ Show 20 Lines • Show All 1,101 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/X86/fma_patterns_wide.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma -fp-contract=fast | FileCheck %s --check-prefix=FMA ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma -fp-contract=fast | FileCheck %s --check-prefix=FMA
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma -fp-contract=fast | FileCheck %s --check-prefix=FMA ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+fma -fp-contract=fast | FileCheck %s --check-prefix=FMA4
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 -fp-contract=fast | FileCheck %s --check-prefix=FMA4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4 -fp-contract=fast | FileCheck %s --check-prefix=FMA4
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fp-contract=fast | FileCheck %s --check-prefix=AVX512 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fp-contract=fast | FileCheck %s --check-prefix=AVX512
; ;
; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z) ; Pattern: (fadd (fmul x, y), z) -> (fmadd x,y,z)
; ;
define <16 x float> @test_16f32_fmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) { define <16 x float> @test_16f32_fmadd(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
▲ Show 20 Lines • Show All 729 Lines • Show Last 20 Lines