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Differential D149424

[InstCombine] Add tests `(cmp eq/ne (umax/uadd.sat X, Y), 0)`; NFC
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Authored by goldstein.w.n on Apr 27 2023, 11:23 PM.

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Reviewers
nikic
spatel
Commits
rG585af9e39fc4: [InstCombine] Add tests `(cmp eq/ne (umax/uadd.sat X, Y), 0)`; NFC

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Event Timeline

goldstein.w.n created this revision.Apr 27 2023, 11:23 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 27 2023, 11:23 PM
Herald added a subscriber: StephenFan. · View Herald Transcript
goldstein.w.n requested review of this revision.Apr 27 2023, 11:23 PM
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goldstein.w.n added a child revision: D149425: [InstCombine] Don't fold `uadd.sat` to `or` if it increase instruction count.Apr 27 2023, 11:28 PM
nikic accepted this revision.Apr 28 2023, 12:28 AM

LGTM

This revision is now accepted and ready to land.Apr 28 2023, 12:28 AM
Harbormaster completed remote builds in B228744: Diff 517808.Apr 28 2023, 12:33 AM
This revision was landed with ongoing or failed builds.Apr 29 2023, 10:39 AM
Closed by commit rG585af9e39fc4: [InstCombine] Add tests `(cmp eq/ne (umax/uadd.sat X, Y), 0)`; NFC (authored by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG585af9e39fc4: [InstCombine] Add tests `(cmp eq/ne (umax/uadd.sat X, Y), 0)`; NFC.

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
76 lines

Diff 518194

llvm/test/Transforms/InstCombine/cmp-intrinsic.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
declare i16 @llvm.bswap.i16(i16) declare i16 @llvm.bswap.i16(i16)
declare i32 @llvm.bswap.i32(i32) declare i32 @llvm.bswap.i32(i32)
declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)
declare i32 @llvm.cttz.i32(i32, i1) declare i32 @llvm.cttz.i32(i32, i1)
declare i33 @llvm.cttz.i33(i33, i1) declare i33 @llvm.cttz.i33(i33, i1)
declare i32 @llvm.ctlz.i32(i32, i1) declare i32 @llvm.ctlz.i32(i32, i1)
declare i8 @llvm.umax.i8(i8, i8)
declare i8 @llvm.uadd.sat.i8(i8, i8)
declare i33 @llvm.ctlz.i33(i33, i1) declare i33 @llvm.ctlz.i33(i33, i1)
declare i8 @llvm.ctpop.i8(i8) declare i8 @llvm.ctpop.i8(i8)
declare i11 @llvm.ctpop.i11(i11) declare i11 @llvm.ctpop.i11(i11)
declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1) declare <2 x i32> @llvm.cttz.v2i32(<2 x i32>, i1)
declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1)
declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
declare i8 @llvm.bitreverse.i8(i8) declare i8 @llvm.bitreverse.i8(i8)
declare <2 x i8> @llvm.bitreverse.v2i8(<2 x i8>) declare <2 x i8> @llvm.bitreverse.v2i8(<2 x i8>)
declare void @use6(i6) declare void @use6(i6)
declare void @use8(i8)
define i1 @bswap_eq_i16(i16 %x) { define i1 @bswap_eq_i16(i16 %x) {
; CHECK-LABEL: @bswap_eq_i16( ; CHECK-LABEL: @bswap_eq_i16(
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[X:%.*]], 256 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[X:%.*]], 256
; CHECK-NEXT: ret i1 [[CMP]] ; CHECK-NEXT: ret i1 [[CMP]]
; ;
%bs = call i16 @llvm.bswap.i16(i16 %x) %bs = call i16 @llvm.bswap.i16(i16 %x)
%cmp = icmp eq i16 %bs, 1 %cmp = icmp eq i16 %bs, 1
▲ Show 20 Lines • Show All 754 Lines • ▼ Show 20 Lines
; CHECK-NEXT: [[Z:%.*]] = icmp ult i8 [[Y]], 22 ; CHECK-NEXT: [[Z:%.*]] = icmp ult i8 [[Y]], 22
; CHECK-NEXT: ret i1 [[Z]] ; CHECK-NEXT: ret i1 [[Z]]
; ;
%y = call i8 @llvm.bitreverse.i8(i8 %x) %y = call i8 @llvm.bitreverse.i8(i8 %x)
%z = icmp ult i8 %y, 22 %z = icmp ult i8 %y, 22
ret i1 %z ret i1 %z
} }
define <2 x i1> @bitreverse_vec_eq_2_2(<2 x i8> %x) { define <2 x i1> @bitreverse_vec_eq_2_2(<2 x i8> %x) {
; CHECK-LABEL: @bitreverse_vec_eq_2_2( ; CHECK-LABEL: @bitreverse_vec_eq_2_2(
; CHECK-NEXT: [[Z:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 64, i8 64> ; CHECK-NEXT: [[Z:%.*]] = icmp eq <2 x i8> [[X:%.*]], <i8 64, i8 64>
; CHECK-NEXT: ret <2 x i1> [[Z]] ; CHECK-NEXT: ret <2 x i1> [[Z]]
; ;
%y = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> %x) %y = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> %x)
%z = icmp eq <2 x i8> %y, <i8 2, i8 2> %z = icmp eq <2 x i8> %y, <i8 2, i8 2>
ret <2 x i1> %z ret <2 x i1> %z
} }
define <2 x i1> @bitreverse_vec_eq_1_2_todo_no_splat(<2 x i8> %x) { define <2 x i1> @bitreverse_vec_eq_1_2_todo_no_splat(<2 x i8> %x) {
; CHECK-LABEL: @bitreverse_vec_eq_1_2_todo_no_splat( ; CHECK-LABEL: @bitreverse_vec_eq_1_2_todo_no_splat(
; CHECK-NEXT: [[Y:%.*]] = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> [[X:%.*]]) ; CHECK-NEXT: [[Y:%.*]] = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[Z:%.*]] = icmp eq <2 x i8> [[Y]], <i8 1, i8 2> ; CHECK-NEXT: [[Z:%.*]] = icmp eq <2 x i8> [[Y]], <i8 1, i8 2>
; CHECK-NEXT: ret <2 x i1> [[Z]] ; CHECK-NEXT: ret <2 x i1> [[Z]]
; ;
%y = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> %x) %y = call <2 x i8> @llvm.bitreverse.v2i8(<2 x i8> %x)
%z = icmp eq <2 x i8> %y, <i8 1, i8 2> %z = icmp eq <2 x i8> %y, <i8 1, i8 2>
ret <2 x i1> %z ret <2 x i1> %z
} }
define i1 @umax_eq_zero(i8 %x, i8 %y) {
; CHECK-LABEL: @umax_eq_zero(
; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[M]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%m = call i8 @llvm.umax.i8(i8 %x, i8 %y)
%r = icmp eq i8 %m, 0
ret i1 %r
}
define i1 @umax_eq_1_fail(i8 %x, i8 %y) {
; CHECK-LABEL: @umax_eq_1_fail(
; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[M]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%m = call i8 @llvm.umax.i8(i8 %x, i8 %y)
%r = icmp eq i8 %m, 1
ret i1 %r
}
define i1 @umax_sle_zero_fail(i8 %x, i8 %y) {
; CHECK-LABEL: @umax_sle_zero_fail(
; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[M]], 1
; CHECK-NEXT: ret i1 [[R]]
;
%m = call i8 @llvm.umax.i8(i8 %x, i8 %y)
%r = icmp sle i8 %m, 0
ret i1 %r
}
define i1 @umax_ne_zero(i8 %x, i8 %y) {
; CHECK-LABEL: @umax_ne_zero(
; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[M]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%m = call i8 @llvm.umax.i8(i8 %x, i8 %y)
%r = icmp ne i8 %m, 0
ret i1 %r
}
define i1 @umax_ne_zero_fail_multiuse(i8 %x, i8 %y) {
; CHECK-LABEL: @umax_ne_zero_fail_multiuse(
; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
; CHECK-NEXT: call void @use8(i8 [[M]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[M]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%m = call i8 @llvm.umax.i8(i8 %x, i8 %y)
call void @use8(i8 %m)
%r = icmp ne i8 %m, 0
ret i1 %r
}
define i1 @uadd_sat_ne_zero_fail_multiuse(i8 %x, i8 %y) {
; CHECK-LABEL: @uadd_sat_ne_zero_fail_multiuse(
; CHECK-NEXT: [[M:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
; CHECK-NEXT: call void @use8(i8 [[M]])
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[X]], [[Y]]
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[R]]
;
%m = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %y)
call void @use8(i8 %m)
%r = icmp ne i8 %m, 0
ret i1 %r
}