[LoongArch] Optimize 32-bit addition with ALSL_W on LoongArch64

[benshi001]

Summary

Optimize 32-bit x+(y<<i) to (ALSL_W y, x, i) on LoongArch64,
in which i is in [1, 2, 3, 4].

[SixWeining]

LGTM. Thanks.

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

 /// Shifted addition
 let Predicates = [IsLA32] in {
 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
           (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
 } // Predicates = [IsLA32]
 let Predicates = [IsLA64] in {
 def : Pat<(add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
           (ALSL_D GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
+def : Pat<(sext_inreg (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)), i32),
+          (ALSL_W GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
 def : Pat<(loongarch_bstrpick (add GPR:$rk, (shl GPR:$rj, uimm2_plus1:$imm2)),
                               (i64 31), (i64 0)),
           (ALSL_WU GPR:$rj, GPR:$rk, uimm2_plus1:$imm2)>;
 } // Predicates = [IsLA64]
 
 /// Shift
 
 let Predicates = [IsLA32] in {

llvm/test/CodeGen/LoongArch/ir-instruction/mul.ll

 ; LA32-LABEL: mul_i32_4098:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    slli.w $a1, $a0, 12
 ; LA32-NEXT:    alsl.w $a0, $a0, $a1, 1
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_4098:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a1, $a0, 1
-; LA64-NEXT:    slli.d $a0, $a0, 12
-; LA64-NEXT:    add.w $a0, $a0, $a1
+; LA64-NEXT:    slli.d $a1, $a0, 12
+; LA64-NEXT:    alsl.w $a0, $a0, $a1, 1
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 4098
   ret i32 %b
 }
 
 define signext i32 @mul_i32_4100(i32 %a) {
 ; LA32-LABEL: mul_i32_4100:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    slli.w $a1, $a0, 12
 ; LA32-NEXT:    alsl.w $a0, $a0, $a1, 2
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_4100:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a1, $a0, 2
-; LA64-NEXT:    slli.d $a0, $a0, 12
-; LA64-NEXT:    add.w $a0, $a0, $a1
+; LA64-NEXT:    slli.d $a1, $a0, 12
+; LA64-NEXT:    alsl.w $a0, $a0, $a1, 2
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 4100
   ret i32 %b
 }
 
 define signext i32 @mul_i32_4104(i32 %a) {
 ; LA32-LABEL: mul_i32_4104:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    slli.w $a1, $a0, 12
 ; LA32-NEXT:    alsl.w $a0, $a0, $a1, 3
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_4104:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a1, $a0, 3
-; LA64-NEXT:    slli.d $a0, $a0, 12
-; LA64-NEXT:    add.w $a0, $a0, $a1
+; LA64-NEXT:    slli.d $a1, $a0, 12
+; LA64-NEXT:    alsl.w $a0, $a0, $a1, 3
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 4104
   ret i32 %b
 }
 
 define signext i32 @mul_i32_4112(i32 %a) {
 ; LA32-LABEL: mul_i32_4112:
 ; LA32:       # %bb.0:
 ; LA32-NEXT:    slli.w $a1, $a0, 12
 ; LA32-NEXT:    alsl.w $a0, $a0, $a1, 4
 ; LA32-NEXT:    ret
 ;
 ; LA64-LABEL: mul_i32_4112:
 ; LA64:       # %bb.0:
-; LA64-NEXT:    slli.d $a1, $a0, 4
-; LA64-NEXT:    slli.d $a0, $a0, 12
-; LA64-NEXT:    add.w $a0, $a0, $a1
+; LA64-NEXT:    slli.d $a1, $a0, 12
+; LA64-NEXT:    alsl.w $a0, $a0, $a1, 4
 ; LA64-NEXT:    ret
   %b = mul i32 %a, 4112
   ret i32 %b
 }
 
 define i64 @mul_i64_4098(i64 %a) {
 ; LA32-LABEL: mul_i64_4098:
 ; LA32:       # %bb.0: