[WebAssembly] Reverse the order of operands for br_if

[dschuff]

Summary

This is to match the new version in the spec

[sunfish]

It's true that the spec does currently have the operands in this order, so for now, this patch lgtm.

[dschuff]

Rebase against master

lib/Target/WebAssembly/WebAssemblyInstrControl.td

 //===- WebAssemblyInstrControl.td-WebAssembly control-flow ------*- tablegen -*-
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief WebAssembly control-flow code-gen constructs.
 ///
 //===----------------------------------------------------------------------===//
 
 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-def BR_IF : I<(outs), (ins bb_op:$dst, I32:$a),
+def BR_IF : I<(outs), (ins I32:$a, bb_op:$dst),
               [(brcond I32:$a, bb:$dst)],
-              "br_if\t$dst, $a">;
+               "br_if\t$a, $dst">;
 let isBarrier = 1 in {
 def BR   : I<(outs), (ins bb_op:$dst),
              [(br bb:$dst)],
              "br\t$dst">;
 } // isBarrier = 1
 } // isBranch = 1, isTerminator = 1, hasCtrlDep = 1
 
 // TODO: SelectionDAG's lowering insists on using a pointer as the index for

lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp

for (MachineInstr &MI : iterator_range<MachineBasicBlock::instr_iterator>(
            MBB.getFirstInstrTerminator(), MBB.instr_end())) {
     switch (MI.getOpcode()) {
     default:
       // Unhandled instruction; bail out.
       return true;
     case WebAssembly::BR_IF:
       if (HaveCond)
         return true;
-      Cond.push_back(MI.getOperand(1));
-      TBB = MI.getOperand(0).getMBB();
+      Cond.push_back(MI.getOperand(0));
+      TBB = MI.getOperand(1).getMBB();
       HaveCond = true;
       break;
     case WebAssembly::BR:
       if (!HaveCond)
         TBB = MI.getOperand(0).getMBB();
       else
         FBB = MI.getOperand(0).getMBB();
       break;
if (Cond.empty()) {
     if (!TBB)
       return 0;
 
     BuildMI(&MBB, DL, get(WebAssembly::BR)).addMBB(TBB);
     return 1;
   }
 
   BuildMI(&MBB, DL, get(WebAssembly::BR_IF))
-      .addMBB(TBB)
-      .addOperand(Cond[0]);
+      .addOperand(Cond[0])
+      .addMBB(TBB);
   if (!FBB)
     return 1;
 
   BuildMI(&MBB, DL, get(WebAssembly::BR)).addMBB(FBB);
   return 2;
 }
 
 bool WebAssemblyInstrInfo::ReverseBranchCondition(
     SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 1);
 
   // TODO: Add branch reversal here... And re-enable MachineBlockPlacementID
   // when we do.
 
   return true;
 }

test/CodeGen/WebAssembly/cfg-stackify.ll

back:
   call void @something()
   br label %header
 }
 
 ; Test that a simple loop is handled as expected.
 
 ; CHECK-LABEL: test2:
 ; CHECK: block BB2_2{{$}}
-; CHECK: br_if BB2_2, {{.*}}
+; CHECK: br_if {{.*}}, BB2_2{{$}}
 ; CHECK: BB2_1:
-; CHECK: br_if BB2_1, (get_local 10){{$}}
+; CHECK: br_if (get_local 10), BB2_1{{$}}
 ; CHECK: BB2_2:
 ; CHECK: return{{$}}
 define void @test2(double* nocapture %p, i32 %n) {
 entry:
   %cmp.4 = icmp sgt i32 %n, 0
   br i1 %cmp.4, label %for.body.preheader, label %for.end
 
 for.body.preheader:

 for.end:
   ret void
 }
 
 ; CHECK-LABEL: doublediamond:
 ; CHECK: block BB3_5{{$}}
 ; CHECK: block BB3_4{{$}}
 ; CHECK: block BB3_2{{$}}
-; CHECK: br_if BB3_2, (get_local 4){{$}}
+; CHECK: br_if (get_local 4), BB3_2{{$}}
 ; CHECK: br BB3_5{{$}}
 ; CHECK: BB3_2:
-; CHECK: br_if BB3_4, (get_local 6){{$}}
+; CHECK: br_if (get_local 6), BB3_4{{$}}
 ; CHECK: br BB3_5{{$}}
 ; CHECK: BB3_4:
 ; CHECK: BB3_5:
 ; CHECK: return (get_local 3){{$}}
 define i32 @doublediamond(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
ff:
   br label %exit
 exit:
   store volatile i32 5, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: triangle:
 ; CHECK: block BB4_2{{$}}
-; CHECK: br_if BB4_2, (get_local 3){{$}}
+; CHECK: br_if (get_local 3), BB4_2{{$}}
 ; CHECK: BB4_2:
 ; CHECK: return (get_local 2){{$}}
 define i32 @triangle(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %exit
 true:
   store volatile i32 1, i32* %p
   br label %exit
 exit:
   store volatile i32 2, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: diamond:
 ; CHECK: block BB5_3{{$}}
 ; CHECK: block BB5_2{{$}}
-; CHECK: br_if BB5_2, (get_local 3){{$}}
+; CHECK: br_if (get_local 3), BB5_2{{$}}
 ; CHECK: br BB5_3{{$}}
 ; CHECK: BB5_2:
 ; CHECK: BB5_3:
 ; CHECK: return (get_local 2){{$}}
 define i32 @diamond(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
loop:
   store volatile i32 1, i32* %p
   br label %loop
 }
 
 ; CHECK-LABEL: simple_loop:
 ; CHECK-NOT: br
 ; CHECK: BB8_1:
 ; CHECK: loop BB8_2{{$}}
-; CHECK: br_if BB8_1, (get_local 3){{$}}
+; CHECK: br_if (get_local 3), BB8_1{{$}}
 ; CHECK: return (get_local 2){{$}}
 define i32 @simple_loop(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br label %loop
 loop:
   store volatile i32 1, i32* %p
   br i1 %c, label %loop, label %exit
 exit:
   store volatile i32 2, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: doubletriangle:
 ; CHECK: block BB9_4{{$}}
 ; CHECK: block BB9_3{{$}}
-; CHECK: br_if BB9_4, (get_local 4){{$}}
-; CHECK: br_if BB9_3, (get_local 6){{$}}
+; CHECK: br_if (get_local 4), BB9_4{{$}}
+; CHECK: br_if (get_local 6), BB9_3{{$}}
 ; CHECK: BB9_3:
 ; CHECK: BB9_4:
 ; CHECK: return (get_local 3){{$}}
 define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p

 exit:
   store volatile i32 5, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: ifelse_earlyexits:
 ; CHECK: block BB10_4{{$}}
 ; CHECK: block BB10_2{{$}}
-; CHECK: br_if BB10_2, (get_local 4){{$}}
+; CHECK: br_if (get_local 4), BB10_2{{$}}
 ; CHECK: br BB10_4{{$}}
 ; CHECK: BB10_2:
-; CHECK: br_if BB10_4, (get_local 6){{$}}
+; CHECK: br_if (get_local 6), BB10_4{{$}}
 ; CHECK: BB10_4:
 ; CHECK: return (get_local 3){{$}}
 define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false