[WebAssembly] Support wasm select operator

[dschuff]

Summary

Add support for wasm's select operator, and lower LLVM's select DAG node
to it.

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• Align whitespace

[sunfish]

lgtm, with just one minor nit.

test/CodeGen/WebAssembly/select.ll

9 ↗

(On Diff #39092)

As a minor nit, we only use a single semicolon for CHECK comments in LLVM IR in the other tests.

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• Address nit

test/CodeGen/WebAssembly/select.ll

9 ↗

(On Diff #39092)

oops, too many .wast tests in my head.
Done.

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td

 def : Pat<(setge f64:$lhs, f64:$rhs), (GE_F64 f64:$lhs, f64:$rhs)>;
 
 /*
  * TODO(jfb): Add the following for 32-bit and 64-bit.
  *
  * f32.min: minimum (binary operator); if either operand is NaN, returns NaN
  * f32.max: maximum (binary operator); if either operand is NaN, returns NaN
  */
+
+def SELECT_F32 : I<(outs F32:$dst), (ins I32:$cond, F32:$lhs, F32:$rhs),
+               [(set F32:$dst, (select I32:$cond, F32:$lhs, F32:$rhs))]>;
+def SELECT_F64 : I<(outs F64:$dst), (ins I32:$cond, F64:$lhs, F64:$rhs),
+               [(set F64:$dst, (select I32:$cond, F64:$lhs, F64:$rhs))]>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td

 defm CTZ : UnaryInt<cttz>;
 defm POPCNT : UnaryInt<ctpop>;
 
 // Expand the "don't care" operations to supported operations.
 def : Pat<(ctlz_zero_undef I32:$src), (CLZ_I32 I32:$src)>;
 def : Pat<(ctlz_zero_undef I64:$src), (CLZ_I64 I64:$src)>;
 def : Pat<(cttz_zero_undef I32:$src), (CTZ_I32 I32:$src)>;
 def : Pat<(cttz_zero_undef I64:$src), (CTZ_I64 I64:$src)>;
+
+def SELECT_I32 : I<(outs I32:$dst), (ins I32:$cond, I32:$lhs, I32:$rhs),
+               [(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))]>;
+def SELECT_I64 : I<(outs I64:$dst), (ins I32:$cond, I64:$lhs, I64:$rhs),
+               [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))]>;

llvm/trunk/test/CodeGen/WebAssembly/select.ll

+; RUN: llc < %s -asm-verbose=false | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -fast-isel | FileCheck %s
+
+; Test that wasm select instruction is selected from LLVM select instruction.
+
+target datalayout = "e-p:32:32-i64:64-n32:64-S128"
+target triple = "wasm32-unknown-unknown"
+
+;; CHECK-LABEL: select_i32:
+;; CHECK: get_local 1
+;; CHECK: set_local [[LOCAL_B:[0-9]]]
+;; CHECK: get_local 0
+;; CHECK: set_local [[LOCAL_A:[0-9]]]
+;; CHECK: i32.eq (get_local 5), (get_local 6)
+;; CHECK: set_local 7, pop
+;; CHECK: i32.select (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
+define i32 @select_i32(i32 %a, i32 %b, i32 %cond) {
+ %cc = icmp eq i32 %cond, 0
+ %result = select i1 %cc, i32 %a, i32 %b
+ ret i32 %result
+}
+
+;; CHECK-LABEL: select_i64:
+;; CHECK: get_local 1
+;; CHECK: set_local [[LOCAL_B:[0-9]]]
+;; CHECK: get_local 0
+;; CHECK: set_local [[LOCAL_A:[0-9]]]
+;; CHECK: i32.eq (get_local 5), (get_local 6)
+;; CHECK: set_local 7, pop
+;; CHECK: i64.select (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
+define i64 @select_i64(i64 %a, i64 %b, i32 %cond) {
+ %cc = icmp eq i32 %cond, 0
+ %result = select i1 %cc, i64 %a, i64 %b
+ ret i64 %result
+}
+
+;; CHECK-LABEL: select_f32:
+;; CHECK: get_local 1
+;; CHECK: set_local [[LOCAL_B:[0-9]]]
+;; CHECK: get_local 0
+;; CHECK: set_local [[LOCAL_A:[0-9]]]
+;; CHECK: i32.eq (get_local 5), (get_local 6)
+;; CHECK: set_local 7, pop
+;; CHECK: f32.select (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
+define float @select_f32(float %a, float %b, i32 %cond) {
+ %cc = icmp eq i32 %cond, 0
+ %result = select i1 %cc, float %a, float %b
+ ret float %result
+}
+
+;; CHECK-LABEL: select_f64:
+;; CHECK: get_local 1
+;; CHECK: set_local [[LOCAL_B:[0-9]]]
+;; CHECK: get_local 0
+;; CHECK: set_local [[LOCAL_A:[0-9]]]
+;; CHECK: i32.eq (get_local 5), (get_local 6)
+;; CHECK: set_local 7, pop
+;; CHECK: f64.select (get_local 7), (get_local [[LOCAL_A]]), (get_local [[LOCAL_B]])
+define double @select_f64(double %a, double %b, i32 %cond) {
+ %cc = icmp eq i32 %cond, 0
+ %result = select i1 %cc, double %a, double %b
+ ret double %result
+}