[AVR] Fix inaccurate offsets in PC relative branch instructions

[benshi001]

Summary

In avr-gcc, the destination of rjmp label+offset is address
label+offset, while destination of rjmp .+offset is address_of_rjmp+offset+2.

Clang is in accordance with avr-gcc for rjmp label+offset, but
emits the destination of rjmp .+offset to address_of_rjmp+offset.

This patch fixes the above issue.

Fixes https://github.com/llvm/llvm-project/issues/60019

[benshi001]

Fixes https://github.com/llvm/llvm-project/issues/60019

[benshi001]

llvm/test/MC/AVR/relocations.s

9

relative jump to the next instruction.

12

relative jump to current instruction.

llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp

bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                           const MCFixup &Fixup,
                                           const MCValue &Target) {
   switch ((unsigned)Fixup.getKind()) {
   default:
     return Fixup.getKind() >= FirstLiteralRelocationKind;
   // Fixups which should always be recorded as relocations.
   case AVR::fixup_7_pcrel:
   case AVR::fixup_13_pcrel:
+    // Fix inaccurate PC relative offsets. These errors are introduced by
+    // instructions such as "rjmp .+off" or "breq .+off", which mean branch
+    // to address_of_current_instruction+off+2 in avr-gcc.
+    // TODO: Find a better way to fix, maybe by inheriting the virtual function
+    // 'bool MCAsmBackend::evaluateTargetFixup(...)'.
+    if (const auto *SymA = Target.getSymA())
+      if (SymA->getSymbol().getName().size() == 0) {
+        // Adjust the offset to offset+2, while other fields are not changed.
+        const auto *SymB = Target.getSymB();
+        const int64_t C = Target.getConstant() + 2;
+        const uint32_t RefKind = Target.getRefKind();
+        MCValue &MCV = const_cast<MCValue &>(Target);
+        MCV = MCValue::get(SymA, SymB, C, RefKind);
+      }
+    [[fallthrough]];
   case AVR::fixup_call:
     return true;
   }
 }
 
 MCAsmBackend *createAVRAsmBackend(const Target &T, const MCSubtargetInfo &STI,
                                   const MCRegisterInfo &MRI,
                                   const llvm::MCTargetOptions &TO) {
   return new AVRAsmBackend(STI.getTargetTriple().getOS());
 }
 
 } // end of namespace llvm

llvm/test/MC/AVR/relocations.s

 ; RUN: llvm-mc -filetype=obj -triple=avr %s -mattr=avr6 | llvm-objdump -r - | FileCheck %s
 
 ; CHECK: RELOCATION RECORDS FOR
 
+; CHECK:      R_AVR_13_PCREL .text+0x4
+rjmp .+2
+
+; CHECK-NEXT: R_AVR_13_PCREL .text+0x4
+rjmp .
+
+; CHECK-NEXT: R_AVR_13_PCREL .text+0x4
+rjmp .-2
+
+; CHECK-NEXT: R_AVR_7_PCREL .text+0xa
+breq .+2
+
+; CHECK-NEXT: R_AVR_7_PCREL .text+0xa
+breq .
+
+; CHECK-NEXT: R_AVR_7_PCREL .text+0xa
+breq .-2
+
 .global bar
 bar:
   jmp bar
 
 ; CHECK: R_AVR_LDI SYMBOL+0x3
 ldi r21, SYMBOL+3
 
 ; CHECK: R_AVR_6 SYMBOL+0x4