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Differential D142411

Fix warning in SnippetGeneratorTest.cpp
Needs ReviewPublic

Authored by philipp.tomsich on Jan 23 2023, 3:24 PM.

Details

Reviewers
lebedev.ri
Summary

Fixes the following warning:

SnippetGeneratorTest.cpp:187:10: warning: suggest explicit braces to avoid ambiguous ‘else’ [-Wdangling-else]

Diff Detail

Event Timeline

philipp.tomsich created this revision.Jan 23 2023, 3:24 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 23 2023, 3:24 PM
philipp.tomsich requested review of this revision.Jan 23 2023, 3:24 PM
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Harbormaster completed remote builds in B209482: Diff 491523.Jan 23 2023, 4:32 PM
philipp.tomsich added a reviewer: lebedev.ri.Jan 30 2023, 10:53 AM
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Revision Contents

PathSize
llvm/
unittests/
tools/
llvm-exegesis/
X86/
3 lines

Diff 491523

llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

Show First 20 Lines • Show All 178 Lines • ▼ Show 20 LinesTEST_F(X86SerialSnippetGeneratorTest,
ASSERT_THAT(CodeTemplates, SizeIs(Gt(0U))) << "Templates are available"; ASSERT_THAT(CodeTemplates, SizeIs(Gt(0U))) << "Templates are available";
for (const auto &CT : CodeTemplates) { for (const auto &CT : CodeTemplates) {
EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_EXPLICIT_REGS); EXPECT_THAT(CT.Execution, ExecutionMode::SERIAL_VIA_EXPLICIT_REGS);
ASSERT_THAT(CT.Instructions, SizeIs(1)); ASSERT_THAT(CT.Instructions, SizeIs(1));
const InstructionTemplate &IT = CT.Instructions[0]; const InstructionTemplate &IT = CT.Instructions[0];
EXPECT_THAT(IT.getOpcode(), Opcode); EXPECT_THAT(IT.getOpcode(), Opcode);
ASSERT_THAT(IT.getVariableValues(), SizeIs(3)); ASSERT_THAT(IT.getVariableValues(), SizeIs(3));
for (const auto &Var : IT.getVariableValues()) { for (const auto &Var : IT.getVariableValues()) {
if (Var.isReg()) if (Var.isReg()) {
EXPECT_FALSE(ForbiddenRegisters[Var.getReg()]); EXPECT_FALSE(ForbiddenRegisters[Var.getReg()]);
} }
} }
} }
}
TEST_F(X86SerialSnippetGeneratorTest, DependencyThroughOtherOpcode) { TEST_F(X86SerialSnippetGeneratorTest, DependencyThroughOtherOpcode) {
// - CMP64rr // - CMP64rr
// - Op0 Explicit Use RegClass(GR64) // - Op0 Explicit Use RegClass(GR64)
// - Op1 Explicit Use RegClass(GR64) // - Op1 Explicit Use RegClass(GR64)
// - Op2 Implicit Def Reg(EFLAGS) // - Op2 Implicit Def Reg(EFLAGS)
// - Var0 [Op0] // - Var0 [Op0]
// - Var1 [Op1] // - Var1 [Op1]
▲ Show 20 Lines • Show All 353 Lines • Show Last 20 Lines