Recognize that ARM1176JZ[F]-S support TrustZone

[tyomitch]

Summary

ARMv6KZ cores were set up incorrectly in ARM.td; also, the SMI mnemonic
(the old name for SMC, as defined in ARMv6KZ) wasn't supported.

[rengolin]

LGTM. Thanks!

llvm/trunk/lib/Target/ARM/ARM.td

 def : Processor<"cortex-m0plus",    ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
                                                        FeatureDB, FeatureMClass]>;
 def : Processor<"cortex-m1",        ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
                                                        FeatureDB, FeatureMClass]>;
 def : Processor<"sc000",            ARMV6Itineraries, [HasV6MOps, FeatureNoARM,
                                                        FeatureDB, FeatureMClass]>;
 
 // V6K Processors.
-def : Processor<"arm1176jz-s",      ARMV6Itineraries, [HasV6KOps]>;
+def : Processor<"arm1176jz-s",      ARMV6Itineraries, [HasV6KOps,
+                                                       FeatureTrustZone]>;
 def : Processor<"arm1176jzf-s",     ARMV6Itineraries, [HasV6KOps, FeatureVFP2,
+                                                       FeatureTrustZone,
                                                        FeatureHasSlowFPVMLx]>;
 def : Processor<"mpcorenovfp",      ARMV6Itineraries, [HasV6KOps]>;
 def : Processor<"mpcore",           ARMV6Itineraries, [HasV6KOps, FeatureVFP2,
                                                        FeatureHasSlowFPVMLx]>;
 
 // V6T2 Processors.
 def : Processor<"arm1156t2-s",      ARMV6Itineraries, [HasV6T2Ops, FeatureDSP]>;
 def : Processor<"arm1156t2f-s",     ARMV6Itineraries, [HasV6T2Ops, FeatureVFP2,

llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

 
 // Secure Monitor Call is a system instruction.
 def SMC : ABI<0b0001, (outs), (ins imm0_15:$opt), NoItinerary, "smc", "\t$opt",
               []>, Requires<[IsARM, HasTrustZone]> {
   bits<4> opt;
   let Inst{23-4} = 0b01100000000000000111;
   let Inst{3-0} = opt;
 }
+def : MnemonicAlias<"smi", "smc">;
 
 // Supervisor Call (Software Interrupt)
 let isCall = 1, Uses = [SP] in {
 def SVC : ABI<0b1111, (outs), (ins imm24b:$svc), IIC_Br, "svc", "\t$svc", []>,
           Sched<[WriteBr]> {
   bits<24> svc;
   let Inst{23-0} = svc;
 }

llvm/trunk/test/MC/ARM/arm-thumb-trustzone.s

 @ RUN: not llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ
 @ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ
+@ RUN: not llvm-mc -triple=thumbv6kz -mcpu=arm1176jzf-s -show-encoding < %s | FileCheck %s -check-prefix=NOTZ
 
   .syntax unified
   .globl _func
 
 @ Check that the assembler processes SMC instructions when TrustZone support is 
 @ active and that it rejects them when this feature is not enabled
 
 _func:

llvm/trunk/test/MC/ARM/arm-trustzone.s

 @ RUN: not llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ
 @ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ
+@ RUN: llvm-mc -triple=armv6kz -mcpu=arm1176jz-s -show-encoding < %s | FileCheck %s -check-prefix=TZ
 
   .syntax unified
   .globl _func
 
 @ Check that the assembler processes SMC instructions when TrustZone support is 
 @ active and that it rejects them when this feature is not enabled
 
 _func:
 @ CHECK: _func
 
 
 @------------------------------------------------------------------------------
 @ SMC
 @------------------------------------------------------------------------------
-        smc #0xf
+        smi #0xf                        @ SMI is old (ARMv6KZ) name for SMC
         smceq #0
 
 @ NOTZ-NOT: smc   #15
 @ NOTZ-NOT: smceq #0
 @ TZ: smc  #15                     @ encoding: [0x7f,0x00,0x60,0xe1]
 @ TZ: smceq  #0                      @ encoding: [0x70,0x00,0x60,0x01]