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Differential D140473

[AVR][MC] Fix illegal operand forms.
ClosedPublic

Authored by benshi001 on Dec 21 2022, 4:25 AM.

Details

Reviewers
aykevl
dylanmckay
Commits
rGc41d425030df: [AVR][MC] Fix illegal operand forms.
Summary
These operands are illegal and rejected by avr-gcc.
    subi    r24, -lo8(symobl+offset)
    sbci    r25, -hi8(symobl+offset)

And their correct form should be
    subi    r24, lo8(-(symobl+offset))
    sbci    r25, hi8(-(symobl+offset))

Diff Detail

Event Timeline

benshi001 created this revision.Dec 21 2022, 4:25 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 21 2022, 4:25 AM
Herald added subscribers: Jim, hiraditya. · View Herald Transcript
benshi001 requested review of this revision.Dec 21 2022, 4:25 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 21 2022, 4:26 AM
Herald added subscribers: llvm-commits, jacquesguan. · View Herald Transcript
Harbormaster completed remote builds in B204356: Diff 484528.Dec 21 2022, 5:15 AM
benshi001 added a comment.Dec 21 2022, 5:15 PM

THis patch fixes the bug https://github.com/llvm/llvm-project/issues/59577

aykevl accepted this revision.Dec 22 2022, 7:29 AM

LGTM

This revision is now accepted and ready to land.Dec 22 2022, 7:29 AM
This revision was landed with ongoing or failed builds.Dec 22 2022, 5:48 PM
Closed by commit rGc41d425030df: [AVR][MC] Fix illegal operand forms. (authored by benshi001). · Explain Why
This revision was automatically updated to reflect the committed changes.
benshi001 added a commit: rGc41d425030df: [AVR][MC] Fix illegal operand forms..

Revision Contents

PathSize
llvm/
lib/
Target/
AVR/
AsmParser/
33 lines
MCTargetDesc/
8 lines
test/
CodeGen/
AVR/
72 lines
16 lines
MC/
AVR/
101 lines
32 lines

Diff 485005

llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp

Show First 20 Lines • Show All 442 Lines • ▼ Show 20 Lines
} }
bool AVRAsmParser::tryParseRelocExpression(OperandVector &Operands) { bool AVRAsmParser::tryParseRelocExpression(OperandVector &Operands) {
bool isNegated = false; bool isNegated = false;
AVRMCExpr::VariantKind ModifierKind = AVRMCExpr::VK_AVR_None; AVRMCExpr::VariantKind ModifierKind = AVRMCExpr::VK_AVR_None;
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
// Check for sign // Reject the form in which sign comes first. This behaviour is
AsmToken tokens[2]; // in accordance with avr-gcc.
size_t ReadCount = Parser.getLexer().peekTokens(tokens);
if (ReadCount == 2) {
if ((tokens[0].getKind() == AsmToken::Identifier &&
tokens[1].getKind() == AsmToken::LParen) ||
(tokens[0].getKind() == AsmToken::LParen &&
tokens[1].getKind() == AsmToken::Minus)) {
AsmToken::TokenKind CurTok = Parser.getLexer().getKind(); AsmToken::TokenKind CurTok = Parser.getLexer().getKind();
if (CurTok == AsmToken::Minus || tokens[1].getKind() == AsmToken::Minus) {
isNegated = true;
} else {
assert(CurTok == AsmToken::Plus);
isNegated = false;
}
// Eat the sign
if (CurTok == AsmToken::Minus || CurTok == AsmToken::Plus) if (CurTok == AsmToken::Minus || CurTok == AsmToken::Plus)
Parser.Lex(); return true;
}
} // Check for sign.
AsmToken tokens[2];
if (Parser.getLexer().peekTokens(tokens) == 2)
if (tokens[0].getKind() == AsmToken::LParen &&
tokens[1].getKind() == AsmToken::Minus)
isNegated = true;
// Check if we have a target specific modifier (lo8, hi8, &c) // Check if we have a target specific modifier (lo8, hi8, &c)
if (Parser.getTok().getKind() != AsmToken::Identifier || if (CurTok != AsmToken::Identifier ||
Parser.getLexer().peekTok().getKind() != AsmToken::LParen) { Parser.getLexer().peekTok().getKind() != AsmToken::LParen) {
// Not a reloc expr // Not a reloc expr
return true; return true;
} }
StringRef ModifierName = Parser.getTok().getString(); StringRef ModifierName = Parser.getTok().getString();
ModifierKind = AVRMCExpr::getKindByName(ModifierName); ModifierKind = AVRMCExpr::getKindByName(ModifierName);
if (ModifierKind != AVRMCExpr::VK_AVR_None) { if (ModifierKind != AVRMCExpr::VK_AVR_None) {
▲ Show 20 Lines • Show All 289 Lines • Show Last 20 Lines

llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp

Show All 36 Lines
const AVRMCExpr *AVRMCExpr::create(VariantKind Kind, const MCExpr *Expr, const AVRMCExpr *AVRMCExpr::create(VariantKind Kind, const MCExpr *Expr,
bool Negated, MCContext &Ctx) { bool Negated, MCContext &Ctx) {
return new (Ctx) AVRMCExpr(Kind, Expr, Negated); return new (Ctx) AVRMCExpr(Kind, Expr, Negated);
} }
void AVRMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const { void AVRMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
assert(Kind != VK_AVR_None); assert(Kind != VK_AVR_None);
if (isNegated())
OS << '-';
OS << getName() << '('; OS << getName() << '(';
if (isNegated())
OS << '-' << '(';
getSubExpr()->print(OS, MAI); getSubExpr()->print(OS, MAI);
if (isNegated())
OS << ')';
OS << ')'; OS << ')';
} }
bool AVRMCExpr::evaluateAsConstant(int64_t &Result) const { bool AVRMCExpr::evaluateAsConstant(int64_t &Result) const {
MCValue Value; MCValue Value;
bool isRelocatable = bool isRelocatable =
getSubExpr()->evaluateAsRelocatable(Value, nullptr, nullptr); getSubExpr()->evaluateAsRelocatable(Value, nullptr, nullptr);
▲ Show 20 Lines • Show All 163 Lines • Show Last 20 Lines

llvm/test/CodeGen/AVR/elpm.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=avr --mcpu=atmega2560 -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=avr --mcpu=atmega2560 -verify-machineinstrs | FileCheck %s
@arr0 = addrspace(1) constant [4 x i16] [i16 123, i16 24, i16 56, i16 37], align 1 @arr0 = addrspace(1) constant [4 x i16] [i16 123, i16 24, i16 56, i16 37], align 1
@arr1 = addrspace(2) constant [4 x i16] [i16 123, i16 34, i16 46, i16 27], align 1 @arr1 = addrspace(2) constant [4 x i16] [i16 123, i16 34, i16 46, i16 27], align 1
@arr2 = addrspace(3) constant [4 x i16] [i16 123, i16 23, i16 45, i16 17], align 1 @arr2 = addrspace(3) constant [4 x i16] [i16 123, i16 23, i16 45, i16 17], align 1
define i16 @foo0(i16 %a, i16 %b) { define i16 @foo0(i16 %a, i16 %b) {
; CHECK-LABEL: foo0: ; CHECK-LABEL: foo0:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: lsl r22 ; CHECK-NEXT: lsl r22
; CHECK-NEXT: rol r23 ; CHECK-NEXT: rol r23
; CHECK-NEXT: subi r22, -lo8(arr0) ; CHECK-NEXT: subi r22, lo8(-(arr0))
; CHECK-NEXT: sbci r23, -hi8(arr0) ; CHECK-NEXT: sbci r23, hi8(-(arr0))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: lpm r18, Z+ ; CHECK-NEXT: lpm r18, Z+
; CHECK-NEXT: lpm r19, Z ; CHECK-NEXT: lpm r19, Z
; CHECK-NEXT: lsl r24 ; CHECK-NEXT: lsl r24
; CHECK-NEXT: rol r25 ; CHECK-NEXT: rol r25
; CHECK-NEXT: subi r24, -lo8(arr0) ; CHECK-NEXT: subi r24, lo8(-(arr0))
; CHECK-NEXT: sbci r25, -hi8(arr0) ; CHECK-NEXT: sbci r25, hi8(-(arr0))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: lpm r24, Z+ ; CHECK-NEXT: lpm r24, Z+
; CHECK-NEXT: lpm r25, Z ; CHECK-NEXT: lpm r25, Z
; CHECK-NEXT: sub r24, r18 ; CHECK-NEXT: sub r24, r18
; CHECK-NEXT: sbc r25, r19 ; CHECK-NEXT: sbc r25, r19
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %a
%0 = load i16, i16 addrspace(1)* %arrayidx, align 1 %0 = load i16, i16 addrspace(1)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %b
%1 = load i16, i16 addrspace(1)* %arrayidx1, align 1 %1 = load i16, i16 addrspace(1)* %arrayidx1, align 1
%sub = sub nsw i16 %0, %1 %sub = sub nsw i16 %0, %1
ret i16 %sub ret i16 %sub
} }
define i16 @foo1(i16 %a, i16 %b) { define i16 @foo1(i16 %a, i16 %b) {
; CHECK-LABEL: foo1: ; CHECK-LABEL: foo1:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: lsl r22 ; CHECK-NEXT: lsl r22
; CHECK-NEXT: rol r23 ; CHECK-NEXT: rol r23
; CHECK-NEXT: subi r22, -lo8(arr1) ; CHECK-NEXT: subi r22, lo8(-(arr1))
; CHECK-NEXT: sbci r23, -hi8(arr1) ; CHECK-NEXT: sbci r23, hi8(-(arr1))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: ldi r18, 1 ; CHECK-NEXT: ldi r18, 1
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r20, Z+ ; CHECK-NEXT: elpm r20, Z+
; CHECK-NEXT: elpm r21, Z ; CHECK-NEXT: elpm r21, Z
; CHECK-NEXT: lsl r24 ; CHECK-NEXT: lsl r24
; CHECK-NEXT: rol r25 ; CHECK-NEXT: rol r25
; CHECK-NEXT: subi r24, -lo8(arr0) ; CHECK-NEXT: subi r24, lo8(-(arr0))
; CHECK-NEXT: sbci r25, -hi8(arr0) ; CHECK-NEXT: sbci r25, hi8(-(arr0))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: lpm r24, Z+ ; CHECK-NEXT: lpm r24, Z+
; CHECK-NEXT: lpm r25, Z ; CHECK-NEXT: lpm r25, Z
; CHECK-NEXT: sub r24, r20 ; CHECK-NEXT: sub r24, r20
; CHECK-NEXT: sbc r25, r21 ; CHECK-NEXT: sbc r25, r21
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %a
%0 = load i16, i16 addrspace(1)* %arrayidx, align 1 %0 = load i16, i16 addrspace(1)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(2)* @arr1, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(2)* @arr1, i16 0, i16 %b
%1 = load i16, i16 addrspace(2)* %arrayidx1, align 1 %1 = load i16, i16 addrspace(2)* %arrayidx1, align 1
%sub = sub nsw i16 %0, %1 %sub = sub nsw i16 %0, %1
ret i16 %sub ret i16 %sub
} }
define i16 @foo2(i16 %a, i16 %b) { define i16 @foo2(i16 %a, i16 %b) {
; CHECK-LABEL: foo2: ; CHECK-LABEL: foo2:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: lsl r24 ; CHECK-NEXT: lsl r24
; CHECK-NEXT: rol r25 ; CHECK-NEXT: rol r25
; CHECK-NEXT: subi r24, -lo8(arr2) ; CHECK-NEXT: subi r24, lo8(-(arr2))
; CHECK-NEXT: sbci r25, -hi8(arr2) ; CHECK-NEXT: sbci r25, hi8(-(arr2))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: ldi r18, 2 ; CHECK-NEXT: ldi r18, 2
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r24, Z+ ; CHECK-NEXT: elpm r24, Z+
; CHECK-NEXT: elpm r25, Z ; CHECK-NEXT: elpm r25, Z
; CHECK-NEXT: lsl r22 ; CHECK-NEXT: lsl r22
; CHECK-NEXT: rol r23 ; CHECK-NEXT: rol r23
; CHECK-NEXT: subi r22, -lo8(arr0) ; CHECK-NEXT: subi r22, lo8(-(arr0))
; CHECK-NEXT: sbci r23, -hi8(arr0) ; CHECK-NEXT: sbci r23, hi8(-(arr0))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: lpm r18, Z+ ; CHECK-NEXT: lpm r18, Z+
; CHECK-NEXT: lpm r19, Z ; CHECK-NEXT: lpm r19, Z
; CHECK-NEXT: sub r24, r18 ; CHECK-NEXT: sub r24, r18
; CHECK-NEXT: sbc r25, r19 ; CHECK-NEXT: sbc r25, r19
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(3)* @arr2, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(3)* @arr2, i16 0, i16 %a
%0 = load i16, i16 addrspace(3)* %arrayidx, align 1 %0 = load i16, i16 addrspace(3)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %b
%1 = load i16, i16 addrspace(1)* %arrayidx1, align 1 %1 = load i16, i16 addrspace(1)* %arrayidx1, align 1
%sub = sub nsw i16 %0, %1 %sub = sub nsw i16 %0, %1
ret i16 %sub ret i16 %sub
} }
define i16 @foo3(i16 %a, i16 %b) { define i16 @foo3(i16 %a, i16 %b) {
; CHECK-LABEL: foo3: ; CHECK-LABEL: foo3:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: lsl r22 ; CHECK-NEXT: lsl r22
; CHECK-NEXT: rol r23 ; CHECK-NEXT: rol r23
; CHECK-NEXT: subi r22, -lo8(arr1) ; CHECK-NEXT: subi r22, lo8(-(arr1))
; CHECK-NEXT: sbci r23, -hi8(arr1) ; CHECK-NEXT: sbci r23, hi8(-(arr1))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: ldi r18, 1 ; CHECK-NEXT: ldi r18, 1
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r20, Z+ ; CHECK-NEXT: elpm r20, Z+
; CHECK-NEXT: elpm r21, Z ; CHECK-NEXT: elpm r21, Z
; CHECK-NEXT: lsl r24 ; CHECK-NEXT: lsl r24
; CHECK-NEXT: rol r25 ; CHECK-NEXT: rol r25
; CHECK-NEXT: subi r24, -lo8(arr2) ; CHECK-NEXT: subi r24, lo8(-(arr2))
; CHECK-NEXT: sbci r25, -hi8(arr2) ; CHECK-NEXT: sbci r25, hi8(-(arr2))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: ldi r18, 2 ; CHECK-NEXT: ldi r18, 2
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r24, Z+ ; CHECK-NEXT: elpm r24, Z+
; CHECK-NEXT: elpm r25, Z ; CHECK-NEXT: elpm r25, Z
; CHECK-NEXT: sub r24, r20 ; CHECK-NEXT: sub r24, r20
; CHECK-NEXT: sbc r25, r21 ; CHECK-NEXT: sbc r25, r21
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(3)* @arr2, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(3)* @arr2, i16 0, i16 %a
%0 = load i16, i16 addrspace(3)* %arrayidx, align 1 %0 = load i16, i16 addrspace(3)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(2)* @arr1, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(2)* @arr1, i16 0, i16 %b
%1 = load i16, i16 addrspace(2)* %arrayidx1, align 1 %1 = load i16, i16 addrspace(2)* %arrayidx1, align 1
%sub = sub nsw i16 %0, %1 %sub = sub nsw i16 %0, %1
ret i16 %sub ret i16 %sub
} }
@arrb1 = addrspace(1) constant [4 x i8] c"{\188%", align 1 @arrb1 = addrspace(1) constant [4 x i8] c"{\188%", align 1
@arrb3 = addrspace(3) constant [4 x i8] c"{\22.\1B", align 1 @arrb3 = addrspace(3) constant [4 x i8] c"{\22.\1B", align 1
@arrb5 = addrspace(5) constant [4 x i8] c"{\17-\11", align 1 @arrb5 = addrspace(5) constant [4 x i8] c"{\17-\11", align 1
define signext i8 @foob0(i16 %a, i16 %b) { define signext i8 @foob0(i16 %a, i16 %b) {
; CHECK-LABEL: foob0: ; CHECK-LABEL: foob0:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: subi r22, -lo8(arrb1) ; CHECK-NEXT: subi r22, lo8(-(arrb1))
; CHECK-NEXT: sbci r23, -hi8(arrb1) ; CHECK-NEXT: sbci r23, hi8(-(arrb1))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: lpm r18, Z ; CHECK-NEXT: lpm r18, Z
; CHECK-NEXT: subi r24, -lo8(arrb1) ; CHECK-NEXT: subi r24, lo8(-(arrb1))
; CHECK-NEXT: sbci r25, -hi8(arrb1) ; CHECK-NEXT: sbci r25, hi8(-(arrb1))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: lpm r24, Z ; CHECK-NEXT: lpm r24, Z
; CHECK-NEXT: sub r24, r18 ; CHECK-NEXT: sub r24, r18
; CHECK-NEXT: mov r25, r24 ; CHECK-NEXT: mov r25, r24
; CHECK-NEXT: lsl r25 ; CHECK-NEXT: lsl r25
; CHECK-NEXT: sbc r25, r25 ; CHECK-NEXT: sbc r25, r25
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %a
%0 = load i8, i8 addrspace(1)* %arrayidx, align 1 %0 = load i8, i8 addrspace(1)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %b
%1 = load i8, i8 addrspace(1)* %arrayidx1, align 1 %1 = load i8, i8 addrspace(1)* %arrayidx1, align 1
%sub = sub i8 %0, %1 %sub = sub i8 %0, %1
ret i8 %sub ret i8 %sub
} }
define signext i8 @foob1(i16 %a, i16 %b) { define signext i8 @foob1(i16 %a, i16 %b) {
; CHECK-LABEL: foob1: ; CHECK-LABEL: foob1:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: subi r22, -lo8(arrb3) ; CHECK-NEXT: subi r22, lo8(-(arrb3))
; CHECK-NEXT: sbci r23, -hi8(arrb3) ; CHECK-NEXT: sbci r23, hi8(-(arrb3))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: ldi r18, 2 ; CHECK-NEXT: ldi r18, 2
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r18, Z ; CHECK-NEXT: elpm r18, Z
; CHECK-NEXT: subi r24, -lo8(arrb1) ; CHECK-NEXT: subi r24, lo8(-(arrb1))
; CHECK-NEXT: sbci r25, -hi8(arrb1) ; CHECK-NEXT: sbci r25, hi8(-(arrb1))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: lpm r24, Z ; CHECK-NEXT: lpm r24, Z
; CHECK-NEXT: sub r24, r18 ; CHECK-NEXT: sub r24, r18
; CHECK-NEXT: mov r25, r24 ; CHECK-NEXT: mov r25, r24
; CHECK-NEXT: lsl r25 ; CHECK-NEXT: lsl r25
; CHECK-NEXT: sbc r25, r25 ; CHECK-NEXT: sbc r25, r25
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %a
%0 = load i8, i8 addrspace(1)* %arrayidx, align 1 %0 = load i8, i8 addrspace(1)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %b
%1 = load i8, i8 addrspace(3)* %arrayidx1, align 1 %1 = load i8, i8 addrspace(3)* %arrayidx1, align 1
%sub = sub i8 %0, %1 %sub = sub i8 %0, %1
ret i8 %sub ret i8 %sub
} }
define signext i8 @foob2(i16 %a, i16 %b) { define signext i8 @foob2(i16 %a, i16 %b) {
; CHECK-LABEL: foob2: ; CHECK-LABEL: foob2:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: subi r24, -lo8(arrb5) ; CHECK-NEXT: subi r24, lo8(-(arrb5))
; CHECK-NEXT: sbci r25, -hi8(arrb5) ; CHECK-NEXT: sbci r25, hi8(-(arrb5))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: ldi r24, 4 ; CHECK-NEXT: ldi r24, 4
; CHECK-NEXT: out 59, r24 ; CHECK-NEXT: out 59, r24
; CHECK-NEXT: elpm r24, Z ; CHECK-NEXT: elpm r24, Z
; CHECK-NEXT: subi r22, -lo8(arrb1) ; CHECK-NEXT: subi r22, lo8(-(arrb1))
; CHECK-NEXT: sbci r23, -hi8(arrb1) ; CHECK-NEXT: sbci r23, hi8(-(arrb1))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: lpm r25, Z ; CHECK-NEXT: lpm r25, Z
; CHECK-NEXT: sub r24, r25 ; CHECK-NEXT: sub r24, r25
; CHECK-NEXT: mov r25, r24 ; CHECK-NEXT: mov r25, r24
; CHECK-NEXT: lsl r25 ; CHECK-NEXT: lsl r25
; CHECK-NEXT: sbc r25, r25 ; CHECK-NEXT: sbc r25, r25
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(5)* @arrb5, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(5)* @arrb5, i16 0, i16 %a
%0 = load i8, i8 addrspace(5)* %arrayidx, align 1 %0 = load i8, i8 addrspace(5)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arrb1, i16 0, i16 %b
%1 = load i8, i8 addrspace(1)* %arrayidx1, align 1 %1 = load i8, i8 addrspace(1)* %arrayidx1, align 1
%sub = sub i8 %0, %1 %sub = sub i8 %0, %1
ret i8 %sub ret i8 %sub
} }
define signext i8 @foob3(i16 %a, i16 %b) { define signext i8 @foob3(i16 %a, i16 %b) {
; CHECK-LABEL: foob3: ; CHECK-LABEL: foob3:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: subi r22, -lo8(arrb5) ; CHECK-NEXT: subi r22, lo8(-(arrb5))
; CHECK-NEXT: sbci r23, -hi8(arrb5) ; CHECK-NEXT: sbci r23, hi8(-(arrb5))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: ldi r18, 4 ; CHECK-NEXT: ldi r18, 4
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r18, Z ; CHECK-NEXT: elpm r18, Z
; CHECK-NEXT: subi r24, -lo8(arrb3) ; CHECK-NEXT: subi r24, lo8(-(arrb3))
; CHECK-NEXT: sbci r25, -hi8(arrb3) ; CHECK-NEXT: sbci r25, hi8(-(arrb3))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: ldi r24, 2 ; CHECK-NEXT: ldi r24, 2
; CHECK-NEXT: out 59, r24 ; CHECK-NEXT: out 59, r24
; CHECK-NEXT: elpm r24, Z ; CHECK-NEXT: elpm r24, Z
; CHECK-NEXT: sub r24, r18 ; CHECK-NEXT: sub r24, r18
; CHECK-NEXT: mov r25, r24 ; CHECK-NEXT: mov r25, r24
; CHECK-NEXT: lsl r25 ; CHECK-NEXT: lsl r25
; CHECK-NEXT: sbc r25, r25 ; CHECK-NEXT: sbc r25, r25
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %a
%0 = load i8, i8 addrspace(3)* %arrayidx, align 1 %0 = load i8, i8 addrspace(3)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(5)* @arrb5, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(5)* @arrb5, i16 0, i16 %b
%1 = load i8, i8 addrspace(5)* %arrayidx1, align 1 %1 = load i8, i8 addrspace(5)* %arrayidx1, align 1
%sub = sub i8 %0, %1 %sub = sub i8 %0, %1
ret i8 %sub ret i8 %sub
} }
define signext i8 @foob4(i16 %a, i16 %b) { define signext i8 @foob4(i16 %a, i16 %b) {
; CHECK-LABEL: foob4: ; CHECK-LABEL: foob4:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: subi r22, -lo8(arrb3) ; CHECK-NEXT: subi r22, lo8(-(arrb3))
; CHECK-NEXT: sbci r23, -hi8(arrb3) ; CHECK-NEXT: sbci r23, hi8(-(arrb3))
; CHECK-NEXT: movw r30, r22 ; CHECK-NEXT: movw r30, r22
; CHECK-NEXT: ldi r18, 2 ; CHECK-NEXT: ldi r18, 2
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r19, Z ; CHECK-NEXT: elpm r19, Z
; CHECK-NEXT: subi r24, -lo8(arrb3) ; CHECK-NEXT: subi r24, lo8(-(arrb3))
; CHECK-NEXT: sbci r25, -hi8(arrb3) ; CHECK-NEXT: sbci r25, hi8(-(arrb3))
; CHECK-NEXT: movw r30, r24 ; CHECK-NEXT: movw r30, r24
; CHECK-NEXT: out 59, r18 ; CHECK-NEXT: out 59, r18
; CHECK-NEXT: elpm r24, Z ; CHECK-NEXT: elpm r24, Z
; CHECK-NEXT: sub r24, r19 ; CHECK-NEXT: sub r24, r19
; CHECK-NEXT: mov r25, r24 ; CHECK-NEXT: mov r25, r24
; CHECK-NEXT: lsl r25 ; CHECK-NEXT: lsl r25
; CHECK-NEXT: sbc r25, r25 ; CHECK-NEXT: sbc r25, r25
; CHECK-NEXT: ret ; CHECK-NEXT: ret
entry: entry:
%arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %a %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %a
%0 = load i8, i8 addrspace(3)* %arrayidx, align 1 %0 = load i8, i8 addrspace(3)* %arrayidx, align 1
%arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %b %arrayidx1 = getelementptr inbounds [4 x i8], [4 x i8] addrspace(3)* @arrb3, i16 0, i16 %b
%1 = load i8, i8 addrspace(3)* %arrayidx1, align 1 %1 = load i8, i8 addrspace(3)* %arrayidx1, align 1
%sub = sub i8 %0, %1 %sub = sub i8 %0, %1
ret i8 %sub ret i8 %sub
} }

llvm/test/CodeGen/AVR/lpmx.ll

Show All 20 Lines
; CHECK-O0-NEXT: out 63, r0 ; CHECK-O0-NEXT: out 63, r0
; CHECK-O0-NEXT: out 61, r28 ; CHECK-O0-NEXT: out 61, r28
; CHECK-O0-NEXT: std Y+1, r24 ; CHECK-O0-NEXT: std Y+1, r24
; CHECK-O0-NEXT: std Y+2, r25 ; CHECK-O0-NEXT: std Y+2, r25
; CHECK-O0-NEXT: ldd r30, Y+1 ; CHECK-O0-NEXT: ldd r30, Y+1
; CHECK-O0-NEXT: ldd r31, Y+2 ; CHECK-O0-NEXT: ldd r31, Y+2
; CHECK-O0-NEXT: lsl r30 ; CHECK-O0-NEXT: lsl r30
; CHECK-O0-NEXT: rol r31 ; CHECK-O0-NEXT: rol r31
; CHECK-O0-NEXT: subi r30, -lo8(arr0) ; CHECK-O0-NEXT: subi r30, lo8(-(arr0))
; CHECK-O0-NEXT: sbci r31, -hi8(arr0) ; CHECK-O0-NEXT: sbci r31, hi8(-(arr0))
; CHECK-O0-NEXT: lpm r24, Z+ ; CHECK-O0-NEXT: lpm r24, Z+
; CHECK-O0-NEXT: lpm r25, Z ; CHECK-O0-NEXT: lpm r25, Z
; CHECK-O0-NEXT: adiw r28, 2 ; CHECK-O0-NEXT: adiw r28, 2
; CHECK-O0-NEXT: in r0, 63 ; CHECK-O0-NEXT: in r0, 63
; CHECK-O0-NEXT: cli ; CHECK-O0-NEXT: cli
; CHECK-O0-NEXT: out 62, r29 ; CHECK-O0-NEXT: out 62, r29
; CHECK-O0-NEXT: out 63, r0 ; CHECK-O0-NEXT: out 63, r0
; CHECK-O0-NEXT: out 61, r28 ; CHECK-O0-NEXT: out 61, r28
Show All 12 Lines
; CHECK-O3-NEXT: cli ; CHECK-O3-NEXT: cli
; CHECK-O3-NEXT: out 62, r29 ; CHECK-O3-NEXT: out 62, r29
; CHECK-O3-NEXT: out 63, r0 ; CHECK-O3-NEXT: out 63, r0
; CHECK-O3-NEXT: out 61, r28 ; CHECK-O3-NEXT: out 61, r28
; CHECK-O3-NEXT: std Y+1, r24 ; CHECK-O3-NEXT: std Y+1, r24
; CHECK-O3-NEXT: std Y+2, r25 ; CHECK-O3-NEXT: std Y+2, r25
; CHECK-O3-NEXT: lsl r24 ; CHECK-O3-NEXT: lsl r24
; CHECK-O3-NEXT: rol r25 ; CHECK-O3-NEXT: rol r25
; CHECK-O3-NEXT: subi r24, -lo8(arr0) ; CHECK-O3-NEXT: subi r24, lo8(-(arr0))
; CHECK-O3-NEXT: sbci r25, -hi8(arr0) ; CHECK-O3-NEXT: sbci r25, hi8(-(arr0))
; CHECK-O3-NEXT: movw r30, r24 ; CHECK-O3-NEXT: movw r30, r24
; CHECK-O3-NEXT: lpm r24, Z+ ; CHECK-O3-NEXT: lpm r24, Z+
; CHECK-O3-NEXT: lpm r25, Z ; CHECK-O3-NEXT: lpm r25, Z
; CHECK-O3-NEXT: adiw r28, 2 ; CHECK-O3-NEXT: adiw r28, 2
; CHECK-O3-NEXT: in r0, 63 ; CHECK-O3-NEXT: in r0, 63
; CHECK-O3-NEXT: cli ; CHECK-O3-NEXT: cli
; CHECK-O3-NEXT: out 62, r29 ; CHECK-O3-NEXT: out 62, r29
; CHECK-O3-NEXT: out 63, r0 ; CHECK-O3-NEXT: out 63, r0
Show All 22 Lines
; CHECK-O0-NEXT: cli ; CHECK-O0-NEXT: cli
; CHECK-O0-NEXT: out 62, r29 ; CHECK-O0-NEXT: out 62, r29
; CHECK-O0-NEXT: out 63, r0 ; CHECK-O0-NEXT: out 63, r0
; CHECK-O0-NEXT: out 61, r28 ; CHECK-O0-NEXT: out 61, r28
; CHECK-O0-NEXT: std Y+1, r24 ; CHECK-O0-NEXT: std Y+1, r24
; CHECK-O0-NEXT: std Y+2, r25 ; CHECK-O0-NEXT: std Y+2, r25
; CHECK-O0-NEXT: ldd r30, Y+1 ; CHECK-O0-NEXT: ldd r30, Y+1
; CHECK-O0-NEXT: ldd r31, Y+2 ; CHECK-O0-NEXT: ldd r31, Y+2
; CHECK-O0-NEXT: subi r30, -lo8(arr1) ; CHECK-O0-NEXT: subi r30, lo8(-(arr1))
; CHECK-O0-NEXT: sbci r31, -hi8(arr1) ; CHECK-O0-NEXT: sbci r31, hi8(-(arr1))
; CHECK-O0-NEXT: lpm r24, Z ; CHECK-O0-NEXT: lpm r24, Z
; CHECK-O0-NEXT: adiw r28, 2 ; CHECK-O0-NEXT: adiw r28, 2
; CHECK-O0-NEXT: in r0, 63 ; CHECK-O0-NEXT: in r0, 63
; CHECK-O0-NEXT: cli ; CHECK-O0-NEXT: cli
; CHECK-O0-NEXT: out 62, r29 ; CHECK-O0-NEXT: out 62, r29
; CHECK-O0-NEXT: out 63, r0 ; CHECK-O0-NEXT: out 63, r0
; CHECK-O0-NEXT: out 61, r28 ; CHECK-O0-NEXT: out 61, r28
; CHECK-O0-NEXT: pop r29 ; CHECK-O0-NEXT: pop r29
Show All 9 Lines
; CHECK-O3-NEXT: sbiw r28, 2 ; CHECK-O3-NEXT: sbiw r28, 2
; CHECK-O3-NEXT: in r0, 63 ; CHECK-O3-NEXT: in r0, 63
; CHECK-O3-NEXT: cli ; CHECK-O3-NEXT: cli
; CHECK-O3-NEXT: out 62, r29 ; CHECK-O3-NEXT: out 62, r29
; CHECK-O3-NEXT: out 63, r0 ; CHECK-O3-NEXT: out 63, r0
; CHECK-O3-NEXT: out 61, r28 ; CHECK-O3-NEXT: out 61, r28
; CHECK-O3-NEXT: std Y+1, r24 ; CHECK-O3-NEXT: std Y+1, r24
; CHECK-O3-NEXT: std Y+2, r25 ; CHECK-O3-NEXT: std Y+2, r25
; CHECK-O3-NEXT: subi r24, -lo8(arr1) ; CHECK-O3-NEXT: subi r24, lo8(-(arr1))
; CHECK-O3-NEXT: sbci r25, -hi8(arr1) ; CHECK-O3-NEXT: sbci r25, hi8(-(arr1))
; CHECK-O3-NEXT: movw r30, r24 ; CHECK-O3-NEXT: movw r30, r24
; CHECK-O3-NEXT: lpm r24, Z ; CHECK-O3-NEXT: lpm r24, Z
; CHECK-O3-NEXT: adiw r28, 2 ; CHECK-O3-NEXT: adiw r28, 2
; CHECK-O3-NEXT: in r0, 63 ; CHECK-O3-NEXT: in r0, 63
; CHECK-O3-NEXT: cli ; CHECK-O3-NEXT: cli
; CHECK-O3-NEXT: out 62, r29 ; CHECK-O3-NEXT: out 62, r29
; CHECK-O3-NEXT: out 63, r0 ; CHECK-O3-NEXT: out 63, r0
; CHECK-O3-NEXT: out 61, r28 ; CHECK-O3-NEXT: out 61, r28
Show All 11 Lines

llvm/test/MC/AVR/modifiers.s

Show All 36 Lines
; CHECK: ldi r24, lo8(2069) ; encoding: [0x85,0xe1] ; CHECK: ldi r24, lo8(2069) ; encoding: [0x85,0xe1]
; CHECK: ldi r24, lo8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, lo8(foo) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: lo8(foo), kind: fixup_lo8_ldi ; CHECK: ; fixup A - offset: 0, value: lo8(foo), kind: fixup_lo8_ldi
; CHECK: ldi r24, lo8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, lo8(bar+5) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: lo8(bar+5), kind: fixup_lo8_ldi ; CHECK: ; fixup A - offset: 0, value: lo8(bar+5), kind: fixup_lo8_ldi
lo8_neg: lo8_neg:
ldi r24, -lo8(123456) ldi r24, lo8(-(123456))
ldi r24, -lo8(foo) ldi r24, lo8(-(foo))
; CHECK: ldi r24, -lo8(123456) ; encoding: [0x80,0xec] ; CHECK: ldi r24, lo8(-(123456)) ; encoding: [0x80,0xec]
; CHECK: ldi r24, -lo8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, lo8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -lo8(foo), kind: fixup_lo8_ldi_neg ; CHECK: ; fixup A - offset: 0, value: lo8(-(foo)), kind: fixup_lo8_ldi_neg
hi8: hi8:
ldi r24, hi8(0x0815) ldi r24, hi8(0x0815)
ldi r24, hi8(foo) ldi r24, hi8(foo)
ldi r24, hi8(bar + 5) ldi r24, hi8(bar + 5)
; CHECK: ldi r24, hi8(2069) ; encoding: [0x88,0xe0] ; CHECK: ldi r24, hi8(2069) ; encoding: [0x88,0xe0]
; CHECK: ldi r24, hi8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hi8(foo) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hi8(foo), kind: fixup_hi8_ldi ; CHECK: ; fixup A - offset: 0, value: hi8(foo), kind: fixup_hi8_ldi
; CHECK: ldi r24, hi8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hi8(bar+5) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hi8(bar+5), kind: fixup_hi8_ldi ; CHECK: ; fixup A - offset: 0, value: hi8(bar+5), kind: fixup_hi8_ldi
hi8_neg: hi8_neg:
ldi r24, -hi8(123456) ldi r24, hi8(-(123456))
ldi r24, -hi8(foo) ldi r24, hi8(-(foo))
; CHECK: ldi r24, -hi8(123456) ; encoding: [0x8d,0xe1] ; CHECK: ldi r24, hi8(-(123456)) ; encoding: [0x8d,0xe1]
; CHECK: ldi r24, -hi8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hi8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -hi8(foo), kind: fixup_hi8_ldi_neg ; CHECK: ; fixup A - offset: 0, value: hi8(-(foo)), kind: fixup_hi8_ldi_neg
hh8: hh8:
ldi r24, hh8(0x0815) ldi r24, hh8(0x0815)
ldi r24, hh8(foo) ldi r24, hh8(foo)
ldi r24, hh8(bar + 5) ldi r24, hh8(bar + 5)
; CHECK: ldi r24, hh8(2069) ; encoding: [0x80,0xe0] ; CHECK: ldi r24, hh8(2069) ; encoding: [0x80,0xe0]
; CHECK: ldi r24, hh8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hh8(foo) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hh8(foo), kind: fixup_hh8_ldi ; CHECK: ; fixup A - offset: 0, value: hh8(foo), kind: fixup_hh8_ldi
; CHECK: ldi r24, hh8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hh8(bar+5) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hh8(bar+5), kind: fixup_hh8_ldi ; CHECK: ; fixup A - offset: 0, value: hh8(bar+5), kind: fixup_hh8_ldi
hh8_neg: hh8_neg:
ldi r24, -hh8(123456) ldi r24, hh8(-(123456))
ldi r24, -hh8(foo) ldi r24, hh8(-(foo))
; CHECK: ldi r24, -hh8(123456) ; encoding: [0x8e,0xef] ; CHECK: ldi r24, hh8(-(123456)) ; encoding: [0x8e,0xef]
; CHECK: ldi r24, -hh8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hh8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -hh8(foo), kind: fixup_hh8_ldi_neg ; CHECK: ; fixup A - offset: 0, value: hh8(-(foo)), kind: fixup_hh8_ldi_neg
hlo8: ; synonym with hh8() above, hence the... odd results hlo8: ; synonym with hh8() above, hence the... odd results
ldi r24, hlo8(0x0815) ldi r24, hlo8(0x0815)
ldi r24, hlo8(foo) ldi r24, hlo8(foo)
ldi r24, hlo8(bar + 5) ldi r24, hlo8(bar + 5)
; CHECK: ldi r24, hh8(2069) ; encoding: [0x80,0xe0] ; CHECK: ldi r24, hh8(2069) ; encoding: [0x80,0xe0]
; CHECK: ldi r24, hh8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hh8(foo) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hh8(foo), kind: fixup_hh8_ldi ; CHECK: ; fixup A - offset: 0, value: hh8(foo), kind: fixup_hh8_ldi
; CHECK: ldi r24, hh8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hh8(bar+5) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hh8(bar+5), kind: fixup_hh8_ldi ; CHECK: ; fixup A - offset: 0, value: hh8(bar+5), kind: fixup_hh8_ldi
hlo8_neg: hlo8_neg:
ldi r24, -hlo8(123456) ldi r24, hlo8(-(123456))
ldi r24, -hlo8(foo) ldi r24, hlo8(-(foo))
; CHECK: ldi r24, -hh8(123456) ; encoding: [0x8e,0xef] ; CHECK: ldi r24, hh8(-(123456)) ; encoding: [0x8e,0xef]
; CHECK: ldi r24, -hh8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hh8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -hh8(foo), kind: fixup_hh8_ldi_neg ; CHECK: ; fixup A - offset: 0, value: hh8(-(foo)), kind: fixup_hh8_ldi_neg
hhi8: hhi8:
ldi r24, hhi8(0x0815) ldi r24, hhi8(0x0815)
ldi r24, hhi8(foo) ldi r24, hhi8(foo)
ldi r24, hhi8(bar + 5) ldi r24, hhi8(bar + 5)
; CHECK: ldi r24, hhi8(2069) ; encoding: [0x80,0xe0] ; CHECK: ldi r24, hhi8(2069) ; encoding: [0x80,0xe0]
; CHECK: ldi r24, hhi8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hhi8(foo) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hhi8(foo), kind: fixup_ms8_ldi ; CHECK: ; fixup A - offset: 0, value: hhi8(foo), kind: fixup_ms8_ldi
; CHECK: ldi r24, hhi8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hhi8(bar+5) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: hhi8(bar+5), kind: fixup_ms8_ldi ; CHECK: ; fixup A - offset: 0, value: hhi8(bar+5), kind: fixup_ms8_ldi
hhi8_neg: hhi8_neg:
ldi r24, -hhi8(123456) ldi r24, hhi8(-(123456))
ldi r24, -hhi8(foo) ldi r24, hhi8(-(foo))
; CHECK: ldi r24, -hhi8(123456) ; encoding: [0x8f,0xef] ; CHECK: ldi r24, hhi8(-(123456)) ; encoding: [0x8f,0xef]
; CHECK: ldi r24, -hhi8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, hhi8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -hhi8(foo), kind: fixup_ms8_ldi_neg ; CHECK: ; fixup A - offset: 0, value: hhi8(-(foo)), kind: fixup_ms8_ldi_neg
pm_lo8: pm_lo8:
ldi r24, pm_lo8(0x0815) ldi r24, pm_lo8(0x0815)
ldi r24, pm_lo8(foo) ldi r24, pm_lo8(foo)
ldi r24, pm_lo8(bar + 5) ldi r24, pm_lo8(bar + 5)
; CHECK: ldi r24, pm_lo8(2069) ; encoding: [0x8a,0xe0] ; CHECK: ldi r24, pm_lo8(2069) ; encoding: [0x8a,0xe0]
; CHECK: ldi r24, pm_lo8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_lo8(foo) ; encoding: [0x80'A',0xe0]
Show All 20 Lines
; CHECK: ldi r24, pm_hh8(2069) ; encoding: [0x80,0xe0] ; CHECK: ldi r24, pm_hh8(2069) ; encoding: [0x80,0xe0]
; CHECK: ldi r24, pm_hh8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_hh8(foo) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: pm_hh8(foo), kind: fixup_hh8_ldi_pm ; CHECK: ; fixup A - offset: 0, value: pm_hh8(foo), kind: fixup_hh8_ldi_pm
; CHECK: ldi r24, pm_hh8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_hh8(bar+5) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: pm_hh8(bar+5), kind: fixup_hh8_ldi_pm ; CHECK: ; fixup A - offset: 0, value: pm_hh8(bar+5), kind: fixup_hh8_ldi_pm
pm_lo8_neg: pm_lo8_neg:
ldi r24, -pm_lo8(0x0815) ldi r24, pm_lo8(-(0x0815))
ldi r24, -pm_lo8(foo) ldi r24, pm_lo8(-(foo))
ldi r24, -pm_lo8(bar + 5) ldi r24, pm_lo8(-(bar + 5))
; CHECK: ldi r24, -pm_lo8(2069) ; encoding: [0x85,0xef] ; CHECK: ldi r24, pm_lo8(-(2069)) ; encoding: [0x85,0xef]
; CHECK: ldi r24, -pm_lo8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_lo8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -pm_lo8(foo), kind: fixup_lo8_ldi_pm_neg ; CHECK: ; fixup A - offset: 0, value: pm_lo8(-(foo)), kind: fixup_lo8_ldi_pm_neg
; CHECK: ldi r24, -pm_lo8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_lo8(-(bar+5)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -pm_lo8(bar+5), kind: fixup_lo8_ldi_pm_neg ; CHECK: ; fixup A - offset: 0, value: pm_lo8(-(bar+5)), kind: fixup_lo8_ldi_pm_neg
pm_hi8_neg: pm_hi8_neg:
ldi r24, -pm_hi8(0x0815) ldi r24, pm_hi8(-(0x0815))
ldi r24, -pm_hi8(foo) ldi r24, pm_hi8(-(foo))
ldi r24, -pm_hi8(bar + 5) ldi r24, pm_hi8(-(bar + 5))
; CHECK: ldi r24, -pm_hi8(2069) ; encoding: [0x8b,0xef] ; CHECK: ldi r24, pm_hi8(-(2069)) ; encoding: [0x8b,0xef]
; CHECK: ldi r24, -pm_hi8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_hi8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -pm_hi8(foo), kind: fixup_hi8_ldi_pm_neg ; CHECK: ; fixup A - offset: 0, value: pm_hi8(-(foo)), kind: fixup_hi8_ldi_pm_neg
; CHECK: ldi r24, -pm_hi8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_hi8(-(bar+5)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -pm_hi8(bar+5), kind: fixup_hi8_ldi_pm_neg ; CHECK: ; fixup A - offset: 0, value: pm_hi8(-(bar+5)), kind: fixup_hi8_ldi_pm_neg
pm_hh8_neg: pm_hh8_neg:
ldi r24, -pm_hh8(0x0815) ldi r24, pm_hh8(-(0x0815))
ldi r24, -pm_hh8(foo) ldi r24, pm_hh8(-(foo))
ldi r24, -pm_hh8(bar + 5) ldi r24, pm_hh8(-(bar + 5))
; CHECK: ldi r24, -pm_hh8(2069) ; encoding: [0x8f,0xef] ; CHECK: ldi r24, pm_hh8(-(2069)) ; encoding: [0x8f,0xef]
; CHECK: ldi r24, -pm_hh8(foo) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_hh8(-(foo)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -pm_hh8(foo), kind: fixup_hh8_ldi_pm_neg ; CHECK: ; fixup A - offset: 0, value: pm_hh8(-(foo)), kind: fixup_hh8_ldi_pm_neg
; CHECK: ldi r24, -pm_hh8(bar+5) ; encoding: [0x80'A',0xe0] ; CHECK: ldi r24, pm_hh8(-(bar+5)) ; encoding: [0x80'A',0xe0]
; CHECK: ; fixup A - offset: 0, value: -pm_hh8(bar+5), kind: fixup_hh8_ldi_pm_neg ; CHECK: ; fixup A - offset: 0, value: pm_hh8(-(bar+5)), kind: fixup_hh8_ldi_pm_neg

llvm/test/MC/AVR/relocations.s

Show All 29 Lines
; CHECK-NEXT: R_AVR_13_PCREL foo-0xa ; CHECK-NEXT: R_AVR_13_PCREL foo-0xa
rjmp foo-10 rjmp foo-10
; CHECK-NEXT: R_AVR_7_PCREL foo+0x2 ; CHECK-NEXT: R_AVR_7_PCREL foo+0x2
brcs foo+2 brcs foo+2
; CHECK-NEXT: R_AVR_LO8_LDI bar+0x3 ; CHECK-NEXT: R_AVR_LO8_LDI bar+0x3
; CHECK-NEXT: R_AVR_LO8_LDI abc ; CHECK-NEXT: R_AVR_LO8_LDI abc
; CHECK-NEXT: R_AVR_LO8_LDI abc
ldi r24, lo8(bar+3) ldi r24, lo8(bar+3)
ldi r16, +lo8(abc)
ldi r16, lo8(+(abc)) ldi r16, lo8(+(abc))
; CHECK-NEXT: R_AVR_HI8_LDI abc ; CHECK-NEXT: R_AVR_HI8_LDI abc
; CHECK-NEXT: R_AVR_HI8_LDI abc ; CHECK-NEXT: R_AVR_HI8_LDI abc
; CHECK-NEXT: R_AVR_HI8_LDI abc
ldi r30, hi8(abc) ldi r30, hi8(abc)
ldi r16, +hi8(abc)
ldi r16, hi8(+(abc)) ldi r16, hi8(+(abc))
; CHECK-NEXT: R_AVR_LO8_LDI_NEG abc ; CHECK-NEXT: R_AVR_LO8_LDI_NEG abc
; CHECK-NEXT: R_AVR_LO8_LDI_NEG abc
ldi r16, -lo8(abc)
ldi r16, lo8(-(abc)) ldi r16, lo8(-(abc))
; CHECK-NEXT: R_AVR_HI8_LDI_NEG abc ; CHECK-NEXT: R_AVR_HI8_LDI_NEG abc
; CHECK-NEXT: R_AVR_HI8_LDI_NEG abc
ldi r16, -hi8(abc)
ldi r16, hi8(-(abc)) ldi r16, hi8(-(abc))
; CHECK-NEXT: R_AVR_HH8_LDI foo ; CHECK-NEXT: R_AVR_HH8_LDI foo
; CHECK-NEXT: R_AVR_HH8_LDI foo ; CHECK-NEXT: R_AVR_HH8_LDI foo
; CHECK-NEXT: R_AVR_HH8_LDI foo
ldi r16, hh8(foo) ldi r16, hh8(foo)
ldi r16, +hh8(foo)
ldi r16, hh8(+(foo)) ldi r16, hh8(+(foo))
; CHECK-NEXT: R_AVR_HH8_LDI_NEG foo ; CHECK-NEXT: R_AVR_HH8_LDI_NEG foo
; CHECK-NEXT: R_AVR_HH8_LDI_NEG foo
ldi r16, -hh8(foo)
ldi r16, hh8(-(foo)) ldi r16, hh8(-(foo))
; CHECK-NEXT: R_AVR_HH8_LDI foo ; CHECK-NEXT: R_AVR_HH8_LDI foo
; CHECK-NEXT: R_AVR_HH8_LDI foo ; CHECK-NEXT: R_AVR_HH8_LDI foo
; CHECK-NEXT: R_AVR_HH8_LDI foo
ldi r24, hlo8(foo) ldi r24, hlo8(foo)
ldi r24, +hlo8(foo)
ldi r24, hlo8(+(foo)) ldi r24, hlo8(+(foo))
; CHECK-NEXT: R_AVR_HH8_LDI_NEG foo ; CHECK-NEXT: R_AVR_HH8_LDI_NEG foo
; CHECK-NEXT: R_AVR_HH8_LDI_NEG foo
ldi r24, -hlo8(foo)
ldi r24, hlo8(-(foo)) ldi r24, hlo8(-(foo))
; CHECK-NEXT: R_AVR_MS8_LDI bar ; CHECK-NEXT: R_AVR_MS8_LDI bar
; CHECK-NEXT: R_AVR_MS8_LDI bar ; CHECK-NEXT: R_AVR_MS8_LDI bar
; CHECK-NEXT: R_AVR_MS8_LDI bar
ldi r24, hhi8(bar) ldi r24, hhi8(bar)
ldi r24, +hhi8(bar)
ldi r24, hhi8(+(bar)) ldi r24, hhi8(+(bar))
; CHECK-NEXT: R_AVR_MS8_LDI_NEG bar ; CHECK-NEXT: R_AVR_MS8_LDI_NEG bar
; CHECK-NEXT: R_AVR_MS8_LDI_NEG bar
ldi r24, -hhi8(bar)
ldi r24, hhi8(-(bar)) ldi r24, hhi8(-(bar))
; CHECK-NEXT: R_AVR_LO8_LDI_PM foo ; CHECK-NEXT: R_AVR_LO8_LDI_PM foo
; CHECK-NEXT: R_AVR_LO8_LDI_PM foo ; CHECK-NEXT: R_AVR_LO8_LDI_PM foo
; CHECK-NEXT: R_AVR_LO8_LDI_PM foo
ldi r17, pm_lo8(foo) ldi r17, pm_lo8(foo)
ldi r25, +pm_lo8(foo)
ldi r25, pm_lo8(+(foo)) ldi r25, pm_lo8(+(foo))
; CHECK-NEXT: R_AVR_HI8_LDI_PM bar ; CHECK-NEXT: R_AVR_HI8_LDI_PM bar
; CHECK-NEXT: R_AVR_HI8_LDI_PM foo ; CHECK-NEXT: R_AVR_HI8_LDI_PM foo
; CHECK-NEXT: R_AVR_HI8_LDI_PM foo
ldi r22, pm_hi8(bar) ldi r22, pm_hi8(bar)
ldi r25, +pm_hi8(foo)
ldi r25, pm_hi8(+(foo)) ldi r25, pm_hi8(+(foo))
; CHECK-NEXT: R_AVR_HH8_LDI_PM baz ; CHECK-NEXT: R_AVR_HH8_LDI_PM baz
; CHECK-NEXT: R_AVR_HH8_LDI_PM foo ; CHECK-NEXT: R_AVR_HH8_LDI_PM foo
; CHECK-NEXT: R_AVR_HH8_LDI_PM foo
ldi r25, pm_hh8(baz) ldi r25, pm_hh8(baz)
ldi r25, +pm_hh8(foo)
ldi r25, pm_hh8(+(foo)) ldi r25, pm_hh8(+(foo))
; CHECK-NEXT: R_AVR_LO8_LDI_PM_NEG foo ; CHECK-NEXT: R_AVR_LO8_LDI_PM_NEG foo
; CHECK-NEXT: R_AVR_LO8_LDI_PM_NEG foo
ldi r25, -pm_lo8(foo)
ldi r25, pm_lo8(-(foo)) ldi r25, pm_lo8(-(foo))
; CHECK-NEXT: R_AVR_HI8_LDI_PM_NEG foo ; CHECK-NEXT: R_AVR_HI8_LDI_PM_NEG foo
; CHECK-NEXT: R_AVR_HI8_LDI_PM_NEG foo
ldi r25, -pm_hi8(foo)
ldi r25, pm_hi8(-(foo)) ldi r25, pm_hi8(-(foo))
; CHECK-NEXT: R_AVR_HH8_LDI_PM_NEG foo ; CHECK-NEXT: R_AVR_HH8_LDI_PM_NEG foo
; CHECK-NEXT: R_AVR_HH8_LDI_PM_NEG foo
ldi r25, -pm_hh8(foo)
ldi r25, pm_hh8(-(foo)) ldi r25, pm_hh8(-(foo))
; CHECK-NEXT: R_AVR_LO8_LDI_GS foo ; CHECK-NEXT: R_AVR_LO8_LDI_GS foo
ldi r17, lo8(gs(foo)) ldi r17, lo8(gs(foo))
; CHECK-NEXT: R_AVR_HI8_LDI_GS foo ; CHECK-NEXT: R_AVR_HI8_LDI_GS foo
ldi r18, hi8(gs(foo)) ldi r18, hi8(gs(foo))
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