WebAssembly: update syntax

[jfb]

Summary

Follow the same syntax as for the spec repo. Both have evolved slightly independently and need to converge again.

[jfb]

This is still a work in progress, I'm still playing with a few options and figure uploading something is helpful.

[sunfish]

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

252

Instead of collecting locals as we go and emitting them at the end, it'd be nice to declare them up front.

We can get the set of registers to declare up front by iterating through the vregs (using MRI->getNumVirtRegs(), TargetRegisterInfo::index2VirtReg(i)), use MRI->use_empty(Reg) to test whether a register is actually ever live, and use MRI->getRegClass(Reg) to get the type.

[jfb]

• Print .local at the start of the function.

[jfb]

• Use parens for get_local. Kinda hacky, but it makes the end-to-end thing happy. We can figure out what it should look like with wasmate later.

[jfb]

• Remove @ from tests.

[jfb]

• Don't print an extra line if there are no locals. Fix call.ll to follow the new syntax.

[jfb]

• Auto-upgrade returns: find ./test/CodeGen/WebAssembly/ -name '*.ll' | xargs -n1 sed -i 's/return \([0-9]\)/return (get_local \1)/g'
• s/: \([0-9]\)/: get_local \1/g
• Fix the other tests.

lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp

 using namespace llvm;
 
 #define DEBUG_TYPE "asm-printer"
 
 namespace {
 
 class WebAssemblyAsmPrinter final : public AsmPrinter {
   const WebAssemblyInstrInfo *TII;
+  const MachineRegisterInfo *MRI;
   unsigned NumArgs;
 
 public:
   WebAssemblyAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
-      : AsmPrinter(TM, std::move(Streamer)), TII(nullptr) {}
+      : AsmPrinter(TM, std::move(Streamer)), TII(nullptr), MRI(nullptr) {}
 
 private:
   const char *getPassName() const override {
     return "WebAssembly Assembly Printer";
   }
 
   //===------------------------------------------------------------------===//
   // MachineFunctionPass Implementation.
   //===------------------------------------------------------------------===//
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AsmPrinter::getAnalysisUsage(AU);
   }
 
   bool runOnMachineFunction(MachineFunction &MF) override {
     const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>();
     TII = Subtarget.getInstrInfo();
+    MRI = &MF.getRegInfo();
     NumArgs = MF.getInfo<WebAssemblyFunctionInfo>()->getNumArguments();
     return AsmPrinter::runOnMachineFunction(MF);
   }
 
   //===------------------------------------------------------------------===//
   // AsmPrinter Implementation.
   //===------------------------------------------------------------------===//
 
   void EmitJumpTableInfo() override;
   void EmitConstantPool() override;
   void EmitFunctionBodyStart() override;
 
   void EmitInstruction(const MachineInstr *MI) override;
 
+  std::string getRegTypeName(unsigned RegNo) const;
   static std::string toString(const APFloat &APF);
   const char *toString(Type *Ty) const;
-  std::string regToString(unsigned RegNo);
-  std::string argToString(unsigned ArgNo);
+  std::string regToString(const MachineOperand &MO);
+  std::string argToString(const MachineOperand &MO);
 };
 
 } // end anonymous namespace
 
 //===----------------------------------------------------------------------===//
 // Helpers.
 //===----------------------------------------------------------------------===//
 
-// Untyped, lower-case version of the opcode's name matching the names
-// WebAssembly opcodes are expected to have. The tablegen names are uppercase
-// and suffixed with their type (after an underscore).
-static SmallString<32> OpcodeName(const WebAssemblyInstrInfo *TII,
-                                  const MachineInstr *MI) {
+// Operand type (if any), followed by the lower-case version of the opcode's
+// name matching the names WebAssembly opcodes are expected to have. The
+// tablegen names are uppercase and suffixed with their type (after an
+// underscore).
+static std::string OpcodeName(const WebAssemblyInstrInfo *TII,
   std::string N(StringRef(TII->getName(MI->getOpcode())).lower());
-  std::string::size_type End = N.rfind('_');
-  End = std::string::npos == End ? N.length() : End;
-  return SmallString<32>(&N[0], &N[End]);
+  std::string::size_type Len = N.length();
+  std::string::size_type Under = N.rfind('_');
+  bool HasType = std::string::npos != Under;
+  std::string::size_type NameEnd = HasType ? Under : Len;
+  std::string Name(&N[0], &N[NameEnd]);
+  return HasType ? (std::string(&N[NameEnd + 1], &N[Len]) + '.' + Name) : Name;
 }
 
 static std::string toSymbol(StringRef S) { return ("$" + S).str(); }
 
+std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
+  const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
+  for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
+    if (TRC->hasType(T))
+      return EVT(T).getEVTString();
+  DEBUG(errs() << "Unknown type for register number: " << RegNo);
+  llvm_unreachable("Unknown register type");
+  return "?";
+}
+
 std::string WebAssemblyAsmPrinter::toString(const APFloat &FP) {
   static const size_t BufBytes = 128;
   char buf[BufBytes];
   if (FP.isNaN())
     assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
             FP.bitwiseIsEqual(
                 APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
            "convertToHexString handles neither SNaN nor NaN payloads");
   // Use C99's hexadecimal floating-point representation.
   auto Written = FP.convertToHexString(
       buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
   (void)Written;
   assert(Written != 0);
   assert(Written < BufBytes);
   return buf;
 }
 
-std::string WebAssemblyAsmPrinter::regToString(unsigned RegNo) {
+std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
+  unsigned RegNo = MO.getReg();
   if (TargetRegisterInfo::isPhysicalRegister(RegNo))
     return WebAssemblyInstPrinter::getRegisterName(RegNo);
 
   // WebAssembly arguments and local variables are in the same index space, and
   // there are no explicit varargs, so we just add the number of arguments to
   // the virtual register number to get the local variable number.
-  return '@' + utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs);
+  return utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs);
 }
 
-std::string WebAssemblyAsmPrinter::argToString(unsigned ArgNo) {
+std::string WebAssemblyAsmPrinter::argToString(const MachineOperand &MO) {
+  unsigned ArgNo = MO.getImm();
   // Same as above, but we don't need to add NumArgs here.
-  return '@' + utostr(ArgNo);
+  return utostr(ArgNo);
 }
 
 const char *WebAssemblyAsmPrinter::toString(Type *Ty) const {
   switch (Ty->getTypeID()) {
   default:
     break;
   // Treat all pointers as the underlying integer into linear memory.
   case Type::PointerTyID:

 
 void WebAssemblyAsmPrinter::EmitJumpTableInfo() {
   // Nothing to do; jump tables are incorporated into the instruction stream.
 }
 
 void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
   const Function *F = MF->getFunction();
   Type *Rt = F->getReturnType();
-
-  if (!Rt->isVoidTy() || !F->arg_empty()) {
-    SmallString<128> Str;
-    raw_svector_ostream OS(Str);
-    bool First = true;
+
+  if (!Rt->isVoidTy() || !F->arg_empty()) {
     for (const Argument &A : F->args()) {
-      OS << (First ? "" : "\n") << "\t"
-                                   ".param "
-         << toString(A.getType());
+      OS << (First ? "" : "\n") << "\t.param " << toString(A.getType());
       First = false;
     }
     if (!Rt->isVoidTy()) {
-      OS << (First ? "" : "\n") << "\t"
-                                   ".result "
-         << toString(Rt);
+      OS << (First ? "" : "\n") << "\t.result " << toString(Rt);
       First = false;
     }
-    OutStreamer->EmitRawText(OS.str());
   }
 
+  bool FirstVReg = true;
+  for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
+    unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
+    if (!MRI->use_empty(VReg)) {
+      if (FirstVReg) {
+        OS << (First ? "" : "\n") << "\t.local ";
+        First = false;
+      }
+      OS << (FirstVReg ? "" : ", ") << getRegTypeName(VReg);
+      FirstVReg = false;
+    }
+  }
+
+  OutStreamer->EmitRawText(OS.str());
   AsmPrinter::EmitFunctionBodyStart();
 }
 
 void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
   SmallString<128> Str;
   raw_svector_ostream OS(Str);
 
   unsigned NumDefs = MI->getDesc().getNumDefs();
   assert(NumDefs <= 1 &&
          "Instructions with multiple result values not implemented");
 
   OS << '\t';
 
   switch (MI->getOpcode()) {
   case TargetOpcode::COPY:
-    OS << regToString(MI->getOperand(1).getReg());
+    OS << "get_local " << regToString(MI->getOperand(1));
     break;
   case WebAssembly::GLOBAL:
     // TODO: wasm64
     OS << "i32.const " << toSymbol(MI->getOperand(1).getGlobal()->getName());
     break;
   case WebAssembly::ARGUMENT_I32:
   case WebAssembly::ARGUMENT_I64:
   case WebAssembly::ARGUMENT_F32:
   case WebAssembly::ARGUMENT_F64:
-    OS << argToString(MI->getOperand(1).getImm());
+    OS << "get_local " << argToString(MI->getOperand(1));
     break;
   case WebAssembly::Immediate_I32:
     OS << "i32.const " << MI->getOperand(1).getImm();
     break;
   case WebAssembly::Immediate_I64:
     OS << "i64.const " << MI->getOperand(1).getImm();
     break;
   case WebAssembly::Immediate_F32:
for (const MachineOperand &MO : MI->uses()) {
       if (NeedComma)
         OS << ',';
       NeedComma = true;
       OS << ' ';
       switch (MO.getType()) {
       default:
         llvm_unreachable("unexpected machine operand type");
       case MachineOperand::MO_Register:
-        OS << regToString(MO.getReg());
+        OS << "(get_local " << regToString(MO) << ')';
         break;
       case MachineOperand::MO_Immediate:
         OS << MO.getImm();
         break;
       case MachineOperand::MO_FPImmediate:
         OS << toString(MO.getFPImm()->getValueAPF());
         break;
       case MachineOperand::MO_GlobalAddress:
         OS << toSymbol(MO.getGlobal()->getName());
         break;
       case MachineOperand::MO_MachineBasicBlock:
         OS << toSymbol(MO.getMBB()->getSymbol()->getName());
         break;
       }
     }
     break;
   }
   }
 
   OutStreamer->EmitRawText(OS.str());
 
   if (NumDefs != 0) {
     SmallString<128> Str;
     raw_svector_ostream OS(Str);
-    OS << "\t" "set_local "
-       << regToString(MI->getOperand(0).getReg()) << ", "
-          "pop";
+    const MachineOperand &Operand = MI->getOperand(0);
+    OS << "\tset_local " << regToString(Operand) << ", pop";
     OutStreamer->EmitRawText(OS.str());
   }
 }
 
 // Force static initialization.
 extern "C" void LLVMInitializeWebAssemblyAsmPrinter() {
   RegisterAsmPrinter<WebAssemblyAsmPrinter> X(TheWebAssemblyTarget32);
   RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(TheWebAssemblyTarget64);
 }

test/CodeGen/WebAssembly/call.ll

 declare i64 @i64_nullary()
 declare float @float_nullary()
 declare double @double_nullary()
 declare void @void_nullary()
 
 ; CHECK-LABEL: call_i32_nullary:
 ; CHECK-NEXT: .result i32
 ; CHECK-NEXT: call $i32_nullary
-; CHECK-NEXT: set_local @0, pop
-; CHECK-NEXT: return @0
+; CHECK-NEXT: set_local 0, pop
+; CHECK-NEXT: return 0
 define i32 @call_i32_nullary() {
   %r = call i32 @i32_nullary()
   ret i32 %r
 }
 
 ; CHECK-LABEL: call_i64_nullary:
 ; CHECK-NEXT: .result i64
 ; CHECK-NEXT: call $i64_nullary
-; CHECK-NEXT: set_local @0, pop
-; CHECK-NEXT: return @0
+; CHECK-NEXT: set_local 0, pop
+; CHECK-NEXT: return 0
 define i64 @call_i64_nullary() {
   %r = call i64 @i64_nullary()
   ret i64 %r
 }
 
 ; CHECK-LABEL: call_float_nullary:
 ; CHECK-NEXT: .result f32
 ; CHECK-NEXT: call $float_nullary
-; CHECK-NEXT: set_local @0, pop
-; CHECK-NEXT: return @0
+; CHECK-NEXT: set_local 0, pop
+; CHECK-NEXT: return 0
 define float @call_float_nullary() {
   %r = call float @float_nullary()
   ret float %r
 }
 
 ; CHECK-LABEL: call_double_nullary:
 ; CHECK-NEXT: .result f64
 ; CHECK-NEXT: call $double_nullary
-; CHECK-NEXT: set_local @0, pop
-; CHECK-NEXT: return @0
+; CHECK-NEXT: set_local 0, pop
+; CHECK-NEXT: return 0
 define double @call_double_nullary() {
   %r = call double @double_nullary()
   ret double %r
 }
 
 ; CHECK-LABEL: call_void_nullary:
 ; CHECK-NEXT: call $void_nullary
 ; CHECK-NEXT: return
 define void @call_void_nullary() {
   call void @void_nullary()
   ret void
 }
 
 ; CHECK-LABEL: call_i32_unary:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @0
-; CHECK-NEXT: set_local @1, pop
-; CHECK-NEXT: call $i32_unary, @1
-; CHECK-NEXT: set_local @2, pop
-; CHECK-NEXT: return @2
+; CHECK-NEXT: 0
+; CHECK-NEXT: set_local 1, pop
+; CHECK-NEXT: call $i32_unary, 1
+; CHECK-NEXT: set_local 2, pop
+; CHECK-NEXT: return 2
 define i32 @call_i32_unary(i32 %a) {
   %r = call i32 @i32_unary(i32 %a)
   ret i32 %r
 }
 
 ; CHECK-LABEL: call_i32_binary:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @1
-; CHECK-NEXT: set_local @2, pop
-; CHECK-NEXT: @0
-; CHECK-NEXT: set_local @3, pop
-; CHECK-NEXT: call $i32_binary, @3, @2
-; CHECK-NEXT: set_local @4, pop
-; CHECK-NEXT: return @4
+; CHECK-NEXT: 1
+; CHECK-NEXT: set_local 2, pop
+; CHECK-NEXT: 0
+; CHECK-NEXT: set_local 3, pop
+; CHECK-NEXT: call $i32_binary, 3, 2
+; CHECK-NEXT: set_local 4, pop
+; CHECK-NEXT: return 4
 define i32 @call_i32_binary(i32 %a, i32 %b) {
   %r = call i32 @i32_binary(i32 %a, i32 %b)
   ret i32 %r
 }
 
 ; CHECK-LABEL: call_indirect_void:
 ; CHECK-NEXT: .param i32
-; CHECK-NEXT: @0
-; CHECK-NEXT: set_local @1, pop
-; CHECK-NEXT: call_indirect @1
+; CHECK-NEXT: 0
+; CHECK-NEXT: set_local 1, pop
+; CHECK-NEXT: call_indirect 1
 ; CHECK-NEXT: return
 define void @call_indirect_void(void ()* %callee) {
   call void %callee()
   ret void
 }
 
 ; CHECK-LABEL: call_indirect_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @0
-; CHECK-NEXT: set_local @1, pop
-; CHECK-NEXT: call_indirect @1
-; CHECK-NEXT: set_local @2, pop
-; CHECK-NEXT: return @2
+; CHECK-NEXT: 0
+; CHECK-NEXT: set_local 1, pop
+; CHECK-NEXT: call_indirect 1
+; CHECK-NEXT: set_local 2, pop
+; CHECK-NEXT: return 2
 define i32 @call_indirect_i32(i32 ()* %callee) {
   %t = call i32 %callee()
   ret i32 %t
 }
 
 ; CHECK-LABEL: tail_call_void_nullary:
 ; CHECK-NEXT: call $void_nullary
 ; CHECK-NEXT: return{{$}}

test/CodeGen/WebAssembly/cfg-stackify.ll

 }
 
 ; Test that a simple loop is handled as expected.
 
 ; CHECK-LABEL: test2:
 ; CHECK: block $BB2_2{{$}}
 ; CHECK: brif $BB2_2, {{.*}}
 ; CHECK: BB2_1:
-; CHECK: brif $BB2_1, @16{{$}}
+; CHECK: brif $BB2_1, 16{{$}}
 ; CHECK: BB2_2:
 ; CHECK: return{{$}}
 define void @test2(double* nocapture %p, i32 %n) {
 entry:
   %cmp.4 = icmp sgt i32 %n, 0
   br i1 %cmp.4, label %for.body.preheader, label %for.end
 
 for.body.preheader:

 for.end:
   ret void
 }
 
 ; CHECK-LABEL: doublediamond:
 ; CHECK: block $BB3_5{{$}}
 ; CHECK: block $BB3_4{{$}}
 ; CHECK: block $BB3_2{{$}}
-; CHECK: brif $BB3_2, @7{{$}}
+; CHECK: brif $BB3_2, 7{{$}}
 ; CHECK: br $BB3_5{{$}}
 ; CHECK: BB3_2:
-; CHECK: brif $BB3_4, @10{{$}}
+; CHECK: brif $BB3_4, 10{{$}}
 ; CHECK: br $BB3_5{{$}}
 ; CHECK: BB3_4:
 ; CHECK: BB3_5:
-; CHECK: return @6{{$}}
+; CHECK: return 6{{$}}
 define i32 @doublediamond(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false
 true:
   store volatile i32 1, i32* %p
ff:
   br label %exit
 exit:
   store volatile i32 5, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: triangle:
 ; CHECK: block $BB4_2{{$}}
-; CHECK: brif $BB4_2, @5{{$}}
+; CHECK: brif $BB4_2, 5{{$}}
 ; CHECK: BB4_2:
-; CHECK: return @4{{$}}
+; CHECK: return 4{{$}}
 define i32 @triangle(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %exit
 true:
   store volatile i32 1, i32* %p
   br label %exit
 exit:
   store volatile i32 2, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: diamond:
 ; CHECK: block $BB5_3{{$}}
 ; CHECK: block $BB5_2{{$}}
-; CHECK: brif $BB5_2, @5{{$}}
+; CHECK: brif $BB5_2, 5{{$}}
 ; CHECK: br $BB5_3{{$}}
 ; CHECK: BB5_2:
 ; CHECK: BB5_3:
-; CHECK: return @4{{$}}
+; CHECK: return 4{{$}}
 define i32 @diamond(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false
 true:
   store volatile i32 1, i32* %p
   br label %exit
 false:
   store volatile i32 2, i32* %p
   br label %exit
 exit:
   store volatile i32 3, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: single_block:
 ; CHECK-NOT: br
-; CHECK: return @2{{$}}
+; CHECK: return 2{{$}}
 define i32 @single_block(i32* %p) {
 entry:
   store volatile i32 0, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: minimal_loop:
 ; CHECK-NOT: br
 ; CHECK: BB7_1:
-; CHECK: store_i32 @1, @3{{$}}
+; CHECK: store_i32 1, 3{{$}}
 ; CHECK: br $BB7_1{{$}}
 define i32 @minimal_loop(i32* %p) {
 entry:
   store volatile i32 0, i32* %p
   br label %loop
 loop:
   store volatile i32 1, i32* %p
   br label %loop
 }
 
 ; CHECK-LABEL: simple_loop:
 ; CHECK-NOT: br
 ; CHECK: BB8_1:
 ; CHECK: loop $BB8_2{{$}}
-; CHECK: brif $BB8_1, @6{{$}}
-; CHECK: return @4{{$}}
+; CHECK: brif $BB8_1, 6{{$}}
+; CHECK: return 4{{$}}
 define i32 @simple_loop(i32* %p, i32 %a) {
 entry:
   %c = icmp eq i32 %a, 0
   store volatile i32 0, i32* %p
   br label %loop
 loop:
   store volatile i32 1, i32* %p
   br i1 %c, label %loop, label %exit
 exit:
   store volatile i32 2, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: doubletriangle:
 ; CHECK: block $BB9_4{{$}}
 ; CHECK: block $BB9_3{{$}}
-; CHECK: brif $BB9_4, @7{{$}}
-; CHECK: brif $BB9_3, @10{{$}}
+; CHECK: brif $BB9_4, 7{{$}}
+; CHECK: brif $BB9_3, 10{{$}}
 ; CHECK: BB9_3:
 ; CHECK: BB9_4:
-; CHECK: return @6{{$}}
+; CHECK: return 6{{$}}
 define i32 @doubletriangle(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %exit
 true:
   store volatile i32 2, i32* %p
   br i1 %d, label %tt, label %tf
 tt:
   store volatile i32 3, i32* %p
   br label %tf
 tf:
   store volatile i32 4, i32* %p
   br label %exit
 exit:
   store volatile i32 5, i32* %p
   ret i32 0
 }
 
 ; CHECK-LABEL: ifelse_earlyexits:
 ; CHECK: block $BB10_4{{$}}
 ; CHECK: block $BB10_2{{$}}
-; CHECK: brif $BB10_2, @7{{$}}
+; CHECK: brif $BB10_2, 7{{$}}
 ; CHECK: br $BB10_4{{$}}
 ; CHECK: BB10_2:
-; CHECK: brif $BB10_4, @10{{$}}
+; CHECK: brif $BB10_4, 10{{$}}
 ; CHECK: BB10_4:
-; CHECK: return @6{{$}}
+; CHECK: return 6{{$}}
 define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) {
 entry:
   %c = icmp eq i32 %a, 0
   %d = icmp eq i32 %b, 0
   store volatile i32 0, i32* %p
   br i1 %c, label %true, label %false
 true:
   store volatile i32 1, i32* %p

test/CodeGen/WebAssembly/comparisons_f32.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 32-bit floating-point comparison operations assemble as
 ; expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f32:
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @3{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: eq @2, @2{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: and @5, @4{{$}}
-; CHECK-NEXT: set_local @6, pop{{$}}
-; CHECK-NEXT: return @6{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 3{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: eq 2, 2{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: and 5, 4{{$}}
+; CHECK-NEXT: set_local 6, pop{{$}}
+; CHECK-NEXT: return 6{{$}}
 define i32 @ord_f32(float %x, float %y) {
   %a = fcmp ord float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uno_f32:
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: ne @3, @3{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: ne @2, @2{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: ior @5, @4{{$}}
-; CHECK-NEXT: set_local @6, pop{{$}}
-; CHECK-NEXT: return @6{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: ne 3, 3{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: ne 2, 2{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: ior 5, 4{{$}}
+; CHECK-NEXT: set_local 6, pop{{$}}
+; CHECK-NEXT: return 6{{$}}
 define i32 @uno_f32(float %x, float %y) {
   %a = fcmp uno float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: oeq_f32:
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @oeq_f32(float %x, float %y) {
   %a = fcmp oeq float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: une_f32:
-; CHECK: ne @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ne 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @une_f32(float %x, float %y) {
   %a = fcmp une float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: olt_f32:
-; CHECK: lt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: lt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @olt_f32(float %x, float %y) {
   %a = fcmp olt float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ole_f32:
-; CHECK: le @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: le 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ole_f32(float %x, float %y) {
   %a = fcmp ole float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ogt_f32:
-; CHECK: gt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: gt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ogt_f32(float %x, float %y) {
   %a = fcmp ogt float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: oge_f32:
-; CHECK: ge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @oge_f32(float %x, float %y) {
   %a = fcmp oge float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f32:
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: ne @2, @2{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: ne @3, @3{{$}}
-; CHECK-NEXT: set_local @6, pop{{$}}
-; CHECK-NEXT: ior @6, @5{{$}}
-; CHECK-NEXT: set_local @7, pop{{$}}
-; CHECK-NEXT: ior @4, @7{{$}}
-; CHECK-NEXT: set_local @8, pop{{$}}
-; CHECK-NEXT: return @8{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: ne 2, 2{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: ne 3, 3{{$}}
+; CHECK-NEXT: set_local 6, pop{{$}}
+; CHECK-NEXT: ior 6, 5{{$}}
+; CHECK-NEXT: set_local 7, pop{{$}}
+; CHECK-NEXT: ior 4, 7{{$}}
+; CHECK-NEXT: set_local 8, pop{{$}}
+; CHECK-NEXT: return 8{{$}}
 define i32 @ueq_f32(float %x, float %y) {
   %a = fcmp ueq float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: one_f32:
-; CHECK: ne @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ne 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @one_f32(float %x, float %y) {
   %a = fcmp one float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ult_f32:
-; CHECK: lt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: lt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ult_f32(float %x, float %y) {
   %a = fcmp ult float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ule_f32:
-; CHECK: le @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: le 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ule_f32(float %x, float %y) {
   %a = fcmp ule float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ugt_f32:
-; CHECK: gt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: gt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ugt_f32(float %x, float %y) {
   %a = fcmp ugt float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uge_f32:
-; CHECK: ge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @uge_f32(float %x, float %y) {
   %a = fcmp uge float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }

test/CodeGen/WebAssembly/comparisons_f64.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 64-bit floating-point comparison operations assemble as
 ; expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f64:
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @3{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: eq @2, @2{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: and @5, @4{{$}}
-; CHECK-NEXT: set_local @6, pop{{$}}
-; CHECK-NEXT: return @6{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 3{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: eq 2, 2{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: and 5, 4{{$}}
+; CHECK-NEXT: set_local 6, pop{{$}}
+; CHECK-NEXT: return 6{{$}}
 define i32 @ord_f64(double %x, double %y) {
   %a = fcmp ord double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uno_f64:
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: ne @3, @3{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: ne @2, @2{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: ior @5, @4{{$}}
-; CHECK-NEXT: set_local @6, pop{{$}}
-; CHECK-NEXT: return @6{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: ne 3, 3{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: ne 2, 2{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: ior 5, 4{{$}}
+; CHECK-NEXT: set_local 6, pop{{$}}
+; CHECK-NEXT: return 6{{$}}
 define i32 @uno_f64(double %x, double %y) {
   %a = fcmp uno double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: oeq_f64:
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @oeq_f64(double %x, double %y) {
   %a = fcmp oeq double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: une_f64:
-; CHECK: ne @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ne 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @une_f64(double %x, double %y) {
   %a = fcmp une double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: olt_f64:
-; CHECK: lt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: lt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @olt_f64(double %x, double %y) {
   %a = fcmp olt double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ole_f64:
-; CHECK: le @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: le 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ole_f64(double %x, double %y) {
   %a = fcmp ole double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ogt_f64:
-; CHECK: gt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: gt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ogt_f64(double %x, double %y) {
   %a = fcmp ogt double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: oge_f64:
-; CHECK: ge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @oge_f64(double %x, double %y) {
   %a = fcmp oge double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f64:
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: ne @2, @2{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: ne @3, @3{{$}}
-; CHECK-NEXT: set_local @6, pop{{$}}
-; CHECK-NEXT: ior @6, @5{{$}}
-; CHECK-NEXT: set_local @7, pop{{$}}
-; CHECK-NEXT: ior @4, @7{{$}}
-; CHECK-NEXT: set_local @8, pop{{$}}
-; CHECK-NEXT: return @8{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: ne 2, 2{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: ne 3, 3{{$}}
+; CHECK-NEXT: set_local 6, pop{{$}}
+; CHECK-NEXT: ior 6, 5{{$}}
+; CHECK-NEXT: set_local 7, pop{{$}}
+; CHECK-NEXT: ior 4, 7{{$}}
+; CHECK-NEXT: set_local 8, pop{{$}}
+; CHECK-NEXT: return 8{{$}}
 define i32 @ueq_f64(double %x, double %y) {
   %a = fcmp ueq double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: one_f64:
-; CHECK: ne @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ne 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @one_f64(double %x, double %y) {
   %a = fcmp one double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ult_f64:
-; CHECK: lt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: lt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ult_f64(double %x, double %y) {
   %a = fcmp ult double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ule_f64:
-; CHECK: le @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: le 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ule_f64(double %x, double %y) {
   %a = fcmp ule double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ugt_f64:
-; CHECK: gt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: gt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ugt_f64(double %x, double %y) {
   %a = fcmp ugt double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uge_f64:
-; CHECK: ge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @uge_f64(double %x, double %y) {
   %a = fcmp uge double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }

test/CodeGen/WebAssembly/comparisons_i32.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 32-bit integer comparison operations assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @eq_i32(i32 %x, i32 %y) {
   %a = icmp eq i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ne_i32:
-; CHECK: ne @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ne 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ne_i32(i32 %x, i32 %y) {
   %a = icmp ne i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: slt_i32:
-; CHECK: slt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: slt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @slt_i32(i32 %x, i32 %y) {
   %a = icmp slt i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: sle_i32:
-; CHECK: sle @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sle 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @sle_i32(i32 %x, i32 %y) {
   %a = icmp sle i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ult_i32:
-; CHECK: ult @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ult 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ult_i32(i32 %x, i32 %y) {
   %a = icmp ult i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ule_i32:
-; CHECK: ule @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ule 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ule_i32(i32 %x, i32 %y) {
   %a = icmp ule i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: sgt_i32:
-; CHECK: sgt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sgt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @sgt_i32(i32 %x, i32 %y) {
   %a = icmp sgt i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: sge_i32:
-; CHECK: sge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @sge_i32(i32 %x, i32 %y) {
   %a = icmp sge i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ugt_i32:
-; CHECK: ugt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ugt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ugt_i32(i32 %x, i32 %y) {
   %a = icmp ugt i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uge_i32:
-; CHECK: uge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: uge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @uge_i32(i32 %x, i32 %y) {
   %a = icmp uge i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }

test/CodeGen/WebAssembly/comparisons_i64.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 64-bit integer comparison operations assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: eq @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: eq 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @eq_i64(i64 %x, i64 %y) {
   %a = icmp eq i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ne_i64:
-; CHECK: ne @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ne 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ne_i64(i64 %x, i64 %y) {
   %a = icmp ne i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: slt_i64:
-; CHECK: slt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: slt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @slt_i64(i64 %x, i64 %y) {
   %a = icmp slt i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: sle_i64:
-; CHECK: sle @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sle 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @sle_i64(i64 %x, i64 %y) {
   %a = icmp sle i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ult_i64:
-; CHECK: ult @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ult 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ult_i64(i64 %x, i64 %y) {
   %a = icmp ult i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ule_i64:
-; CHECK: ule @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ule 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ule_i64(i64 %x, i64 %y) {
   %a = icmp ule i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: sgt_i64:
-; CHECK: sgt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sgt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @sgt_i64(i64 %x, i64 %y) {
   %a = icmp sgt i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: sge_i64:
-; CHECK: sge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @sge_i64(i64 %x, i64 %y) {
   %a = icmp sge i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ugt_i64:
-; CHECK: ugt @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: ugt 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @ugt_i64(i64 %x, i64 %y) {
   %a = icmp ugt i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uge_i64:
-; CHECK: uge @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: uge 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define i32 @uge_i64(i64 %x, i64 %y) {
   %a = icmp uge i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }

test/CodeGen/WebAssembly/conv.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic conversion operations assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_wrap_i64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i32_wrap @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i32_wrap 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @i32_wrap_i64(i64 %x) {
   %a = trunc i64 %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_extend_s_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result i64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i64_extend_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i64_extend_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @i64_extend_s_i32(i32 %x) {
   %a = sext i32 %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_extend_u_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result i64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i64_extend_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i64_extend_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @i64_extend_u_i32(i32 %x) {
   %a = zext i32 %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i32_trunc_s_f32:
 ; CHECK-NEXT: .param f32
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i32_trunc_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i32_trunc_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @i32_trunc_s_f32(float %x) {
   %a = fptosi float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f32:
 ; CHECK-NEXT: .param f32
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i32_trunc_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i32_trunc_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @i32_trunc_u_f32(float %x) {
   %a = fptoui float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_s_f64:
 ; CHECK-NEXT: .param f64
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i32_trunc_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i32_trunc_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @i32_trunc_s_f64(double %x) {
   %a = fptosi double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f64:
 ; CHECK-NEXT: .param f64
 ; CHECK-NEXT: .result i32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i32_trunc_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i32_trunc_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @i32_trunc_u_f64(double %x) {
   %a = fptoui double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f32:
 ; CHECK-NEXT: .param f32
 ; CHECK-NEXT: .result i64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i64_trunc_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i64_trunc_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @i64_trunc_s_f32(float %x) {
   %a = fptosi float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f32:
 ; CHECK-NEXT: .param f32
 ; CHECK-NEXT: .result i64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i64_trunc_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i64_trunc_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @i64_trunc_u_f32(float %x) {
   %a = fptoui float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f64:
 ; CHECK-NEXT: .param f64
 ; CHECK-NEXT: .result i64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i64_trunc_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i64_trunc_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @i64_trunc_s_f64(double %x) {
   %a = fptosi double %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f64:
 ; CHECK-NEXT: .param f64
 ; CHECK-NEXT: .result i64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: i64_trunc_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: i64_trunc_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @i64_trunc_u_f64(double %x) {
   %a = fptoui double %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: f32_convert_s_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result f32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f32_convert_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f32_convert_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define float @f32_convert_s_i32(i32 %x) {
   %a = sitofp i32 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f32_convert_u_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result f32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f32_convert_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f32_convert_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define float @f32_convert_u_i32(i32 %x) {
   %a = uitofp i32 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f64_convert_s_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result f64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f64_convert_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f64_convert_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define double @f64_convert_s_i32(i32 %x) {
   %a = sitofp i32 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f64_convert_u_i32:
 ; CHECK-NEXT: .param i32
 ; CHECK-NEXT: .result f64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f64_convert_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f64_convert_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define double @f64_convert_u_i32(i32 %x) {
   %a = uitofp i32 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f32_convert_s_i64:
 ; CHECK-NEXT: .param i64
 ; CHECK-NEXT: .result f32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f32_convert_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f32_convert_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define float @f32_convert_s_i64(i64 %x) {
   %a = sitofp i64 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f32_convert_u_i64:
 ; CHECK-NEXT: .param i64
 ; CHECK-NEXT: .result f32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f32_convert_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f32_convert_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define float @f32_convert_u_i64(i64 %x) {
   %a = uitofp i64 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f64_convert_s_i64:
 ; CHECK-NEXT: .param i64
 ; CHECK-NEXT: .result f64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f64_convert_s @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f64_convert_s 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define double @f64_convert_s_i64(i64 %x) {
   %a = sitofp i64 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f64_convert_u_i64:
 ; CHECK-NEXT: .param i64
 ; CHECK-NEXT: .result f64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f64_convert_u @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f64_convert_u 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define double @f64_convert_u_i64(i64 %x) {
   %a = uitofp i64 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f64_promote_f32:
 ; CHECK-NEXT: .param f32
 ; CHECK-NEXT: .result f64
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f64_promote @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f64_promote 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define double @f64_promote_f32(float %x) {
   %a = fpext float %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f32_demote_f64:
 ; CHECK-NEXT: .param f64
 ; CHECK-NEXT: .result f32
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: f32_demote @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: f32_demote 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define float @f32_demote_f64(double %x) {
   %a = fptrunc double %x to float
   ret float %a
 }

test/CodeGen/WebAssembly/f32.ll

 declare float @llvm.trunc.f32(float)
 declare float @llvm.nearbyint.f32(float)
 declare float @llvm.rint.f32(float)
 
 ; CHECK-LABEL: fadd32:
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .result f32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: add @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: add 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define float @fadd32(float %x, float %y) {
   %a = fadd float %x, %y
   ret float %a
 }
 
 ; CHECK-LABEL: fsub32:
-; CHECK: sub @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sub 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define float @fsub32(float %x, float %y) {
   %a = fsub float %x, %y
   ret float %a
 }
 
 ; CHECK-LABEL: fmul32:
-; CHECK: mul @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: mul 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define float @fmul32(float %x, float %y) {
   %a = fmul float %x, %y
   ret float %a
 }
 
 ; CHECK-LABEL: fdiv32:
-; CHECK: div @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: div 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define float @fdiv32(float %x, float %y) {
   %a = fdiv float %x, %y
   ret float %a
 }
 
 ; CHECK-LABEL: fabs32:
-; CHECK: abs @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: abs 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @fabs32(float %x) {
   %a = call float @llvm.fabs.f32(float %x)
   ret float %a
 }
 
 ; CHECK-LABEL: fneg32:
-; CHECK: neg @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: neg 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @fneg32(float %x) {
   %a = fsub float -0., %x
   ret float %a
 }
 
 ; CHECK-LABEL: copysign32:
-; CHECK: copysign @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: copysign 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define float @copysign32(float %x, float %y) {
   %a = call float @llvm.copysign.f32(float %x, float %y)
   ret float %a
 }
 
 ; CHECK-LABEL: sqrt32:
-; CHECK: sqrt @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: sqrt 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @sqrt32(float %x) {
   %a = call float @llvm.sqrt.f32(float %x)
   ret float %a
 }
 
 ; CHECK-LABEL: ceil32:
-; CHECK: ceil @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: ceil 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @ceil32(float %x) {
   %a = call float @llvm.ceil.f32(float %x)
   ret float %a
 }
 
 ; CHECK-LABEL: floor32:
-; CHECK: floor @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: floor 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @floor32(float %x) {
   %a = call float @llvm.floor.f32(float %x)
   ret float %a
 }
 
 ; CHECK-LABEL: trunc32:
-; CHECK: trunc @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: trunc 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @trunc32(float %x) {
   %a = call float @llvm.trunc.f32(float %x)
   ret float %a
 }
 
 ; CHECK-LABEL: nearest32:
-; CHECK: nearest @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: nearest 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @nearest32(float %x) {
   %a = call float @llvm.nearbyint.f32(float %x)
   ret float %a
 }
 
 ; CHECK-LABEL: nearest32_via_rint:
-; CHECK: nearest @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: nearest 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define float @nearest32_via_rint(float %x) {
   %a = call float @llvm.rint.f32(float %x)
   ret float %a
 }

test/CodeGen/WebAssembly/f64.ll

 declare double @llvm.trunc.f64(double)
 declare double @llvm.nearbyint.f64(double)
 declare double @llvm.rint.f64(double)
 
 ; CHECK-LABEL: fadd64:
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .param f64{{$}}
 ; CHECK-NEXT: .result f64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: add @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: add 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define double @fadd64(double %x, double %y) {
   %a = fadd double %x, %y
   ret double %a
 }
 
 ; CHECK-LABEL: fsub64:
-; CHECK: sub @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: sub 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define double @fsub64(double %x, double %y) {
   %a = fsub double %x, %y
   ret double %a
 }
 
 ; CHECK-LABEL: fmul64:
-; CHECK: mul @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: mul 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define double @fmul64(double %x, double %y) {
   %a = fmul double %x, %y
   ret double %a
 }
 
 ; CHECK-LABEL: fdiv64:
-; CHECK: div @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: div 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define double @fdiv64(double %x, double %y) {
   %a = fdiv double %x, %y
   ret double %a
 }
 
 ; CHECK-LABEL: fabs64:
-; CHECK: abs @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: abs 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @fabs64(double %x) {
   %a = call double @llvm.fabs.f64(double %x)
   ret double %a
 }
 
 ; CHECK-LABEL: fneg64:
-; CHECK: neg @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: neg 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @fneg64(double %x) {
   %a = fsub double -0., %x
   ret double %a
 }
 
 ; CHECK-LABEL: copysign64:
-; CHECK: copysign @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
+; CHECK: copysign 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
 define double @copysign64(double %x, double %y) {
   %a = call double @llvm.copysign.f64(double %x, double %y)
   ret double %a
 }
 
 ; CHECK-LABEL: sqrt64:
-; CHECK: sqrt @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: sqrt 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @sqrt64(double %x) {
   %a = call double @llvm.sqrt.f64(double %x)
   ret double %a
 }
 
 ; CHECK-LABEL: ceil64:
-; CHECK: ceil @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: ceil 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @ceil64(double %x) {
   %a = call double @llvm.ceil.f64(double %x)
   ret double %a
 }
 
 ; CHECK-LABEL: floor64:
-; CHECK: floor @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: floor 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @floor64(double %x) {
   %a = call double @llvm.floor.f64(double %x)
   ret double %a
 }
 
 ; CHECK-LABEL: trunc64:
-; CHECK: trunc @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: trunc 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @trunc64(double %x) {
   %a = call double @llvm.trunc.f64(double %x)
   ret double %a
 }
 
 ; CHECK-LABEL: nearest64:
-; CHECK: nearest @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: nearest 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @nearest64(double %x) {
   %a = call double @llvm.nearbyint.f64(double %x)
   ret double %a
 }
 
 ; CHECK-LABEL: nearest64_via_rint:
-; CHECK: nearest @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: nearest 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define double @nearest64_via_rint(double %x) {
   %a = call double @llvm.rint.f64(double %x)
   ret double %a
 }

test/CodeGen/WebAssembly/func.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic functions assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: f0:
 ; CHECK: return{{$}}
 ; CHECK: .size f0,
 define void @f0() {
   ret void
 }
 
 ; CHECK-LABEL: f1:
 ; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .local i32{{$}}
 ; CHECK-NEXT: i32.const 0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: i32.return get_local 0{{$}}
 ; CHECK: .size f1,
 define i32 @f1() {
   ret i32 0
 }
 
 ; CHECK-LABEL: f2:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
+; CHECK-NEXT: .local i32{{$}}
 ; CHECK-NEXT: i32.const 0{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: i32.return get_local 2{{$}}
 ; CHECK: .size f2,
 define i32 @f2(i32 %p1, float %p2) {
   ret i32 0
 }
 
 ; CHECK-LABEL: f3:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: return{{$}}
+; CHECK-NOT: .local
+; CHECK-NEXT: void.return{{$}}
 ; CHECK: .size f3,
 define void @f3(i32 %p1, float %p2) {
   ret void
 }

test/CodeGen/WebAssembly/i32.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 32-bit integer operations assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @llvm.ctlz.i32(i32, i1)
 declare i32 @llvm.cttz.i32(i32, i1)
 declare i32 @llvm.ctpop.i32(i32)
 
 ; CHECK-LABEL: add32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: add @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: add 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @add32(i32 %x, i32 %y) {
   %a = add i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: sub32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: sub @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: sub 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @sub32(i32 %x, i32 %y) {
   %a = sub i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: mul32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: mul @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: mul 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @mul32(i32 %x, i32 %y) {
   %a = mul i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: sdiv32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: sdiv @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: sdiv 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @sdiv32(i32 %x, i32 %y) {
   %a = sdiv i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: udiv32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: udiv @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: udiv 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @udiv32(i32 %x, i32 %y) {
   %a = udiv i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: srem32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: srem @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: srem 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @srem32(i32 %x, i32 %y) {
   %a = srem i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: urem32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: urem @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: urem 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @urem32(i32 %x, i32 %y) {
   %a = urem i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: and32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: and @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: and 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @and32(i32 %x, i32 %y) {
   %a = and i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: ior32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: ior @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: ior 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @ior32(i32 %x, i32 %y) {
   %a = or i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: xor32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: xor @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: xor 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @xor32(i32 %x, i32 %y) {
   %a = xor i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: shl32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shl @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shl 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @shl32(i32 %x, i32 %y) {
   %a = shl i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: shr32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shr_u @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shr_u 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @shr32(i32 %x, i32 %y) {
   %a = lshr i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: sar32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shr_s @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shr_s 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i32 @sar32(i32 %x, i32 %y) {
   %a = ashr i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: clz32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: clz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: clz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @clz32(i32 %x) {
   %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
   ret i32 %a
 }
 
 ; CHECK-LABEL: clz32_zero_undef:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: clz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: clz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @clz32_zero_undef(i32 %x) {
   %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
   ret i32 %a
 }
 
 ; CHECK-LABEL: ctz32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: ctz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: ctz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @ctz32(i32 %x) {
   %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
   ret i32 %a
 }
 
 ; CHECK-LABEL: ctz32_zero_undef:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: ctz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: ctz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @ctz32_zero_undef(i32 %x) {
   %a = call i32 @llvm.cttz.i32(i32 %x, i1 true)
   ret i32 %a
 }
 
 ; CHECK-LABEL: popcnt32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: popcnt @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: popcnt 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @popcnt32(i32 %x) {
   %a = call i32 @llvm.ctpop.i32(i32 %x)
   ret i32 %a
 }

test/CodeGen/WebAssembly/i64.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 64-bit integer operations assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i64 @llvm.ctlz.i64(i64, i1)
 declare i64 @llvm.cttz.i64(i64, i1)
 declare i64 @llvm.ctpop.i64(i64)
 
 ; CHECK-LABEL: add64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: add @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: add 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @add64(i64 %x, i64 %y) {
   %a = add i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: sub64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: sub @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: sub 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @sub64(i64 %x, i64 %y) {
   %a = sub i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: mul64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: mul @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: mul 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @mul64(i64 %x, i64 %y) {
   %a = mul i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: sdiv64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: sdiv @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: sdiv 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @sdiv64(i64 %x, i64 %y) {
   %a = sdiv i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: udiv64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: udiv @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: udiv 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @udiv64(i64 %x, i64 %y) {
   %a = udiv i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: srem64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: srem @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: srem 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @srem64(i64 %x, i64 %y) {
   %a = srem i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: urem64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: urem @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: urem 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @urem64(i64 %x, i64 %y) {
   %a = urem i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: and64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: and @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: and 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @and64(i64 %x, i64 %y) {
   %a = and i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: ior64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: ior @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: ior 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @ior64(i64 %x, i64 %y) {
   %a = or i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: xor64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: xor @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: xor 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @xor64(i64 %x, i64 %y) {
   %a = xor i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: shl64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shl @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shl 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @shl64(i64 %x, i64 %y) {
   %a = shl i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: shr64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shr_u @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shr_u 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @shr64(i64 %x, i64 %y) {
   %a = lshr i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: sar64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shr_s @3, @2{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: return @4{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shr_s 3, 2{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: return 4{{$}}
 define i64 @sar64(i64 %x, i64 %y) {
   %a = ashr i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: clz64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: clz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: clz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @clz64(i64 %x) {
   %a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
   ret i64 %a
 }
 
 ; CHECK-LABEL: clz64_zero_undef:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: clz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: clz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @clz64_zero_undef(i64 %x) {
   %a = call i64 @llvm.ctlz.i64(i64 %x, i1 true)
   ret i64 %a
 }
 
 ; CHECK-LABEL: ctz64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: ctz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: ctz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @ctz64(i64 %x) {
   %a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
   ret i64 %a
 }
 
 ; CHECK-LABEL: ctz64_zero_undef:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: ctz @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: ctz 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @ctz64_zero_undef(i64 %x) {
   %a = call i64 @llvm.cttz.i64(i64 %x, i1 true)
   ret i64 %a
 }
 
 ; CHECK-LABEL: popcnt64:
 ; CHECK-NEXT: .param i64{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: popcnt @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: popcnt 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @popcnt64(i64 %x) {
   %a = call i64 @llvm.ctpop.i64(i64 %x)
   ret i64 %a
 }

test/CodeGen/WebAssembly/immediates.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic immediates assemble as expected.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: zero_i32:
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.const 0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i32 @zero_i32() {
   ret i32 0
 }
 
 ; CHECK-LABEL: one_i32:
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.const 1{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i32 @one_i32() {
   ret i32 1
 }
 
 ; CHECK-LABEL: max_i32:
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.const 2147483647{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i32 @max_i32() {
   ret i32 2147483647
 }
 
 ; CHECK-LABEL: min_i32:
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: i32.const -2147483648{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i32 @min_i32() {
   ret i32 -2147483648
 }
 
 ; CHECK-LABEL: zero_i64:
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.const 0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i64 @zero_i64() {
   ret i64 0
 }
 
 ; CHECK-LABEL: one_i64:
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.const 1{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i64 @one_i64() {
   ret i64 1
 }
 
 ; CHECK-LABEL: max_i64:
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.const 9223372036854775807{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i64 @max_i64() {
   ret i64 9223372036854775807
 }
 
 ; CHECK-LABEL: min_i64:
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: i64.const -9223372036854775808{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i64 @min_i64() {
   ret i64 -9223372036854775808
 }
 
 ; CHECK-LABEL: negzero_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const -0x0p0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @negzero_f32() {
   ret float -0.0
 }
 
 ; CHECK-LABEL: zero_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const 0x0p0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @zero_f32() {
   ret float 0.0
 }
 
 ; CHECK-LABEL: one_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const 0x1p0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @one_f32() {
   ret float 1.0
 }
 
 ; CHECK-LABEL: two_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const 0x1p1{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @two_f32() {
   ret float 2.0
 }
 
 ; CHECK-LABEL: nan_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const nan
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @nan_f32() {
   ret float 0x7FF8000000000000
 }
 
 ; CHECK-LABEL: negnan_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const -nan
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @negnan_f32() {
   ret float 0xFFF8000000000000
 }
 
 ; CHECK-LABEL: inf_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const infinity
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @inf_f32() {
   ret float 0x7FF0000000000000
 }
 
 ; CHECK-LABEL: neginf_f32:
 ; CHECK-NEXT: .result f32{{$}}
 ; CHECK-NEXT: f32.const -infinity
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define float @neginf_f32() {
   ret float 0xFFF0000000000000
 }
 
 ; CHECK-LABEL: negzero_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const -0x0p0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @negzero_f64() {
   ret double -0.0
 }
 
 ; CHECK-LABEL: zero_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const 0x0p0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @zero_f64() {
   ret double 0.0
 }
 
 ; CHECK-LABEL: one_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const 0x1p0{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @one_f64() {
   ret double 1.0
 }
 
 ; CHECK-LABEL: two_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const 0x1p1{{$}}
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @two_f64() {
   ret double 2.0
 }
 
 ; CHECK-LABEL: nan_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const nan
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @nan_f64() {
   ret double 0x7FF8000000000000
 }
 
 ; CHECK-LABEL: negnan_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const -nan
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @negnan_f64() {
   ret double 0xFFF8000000000000
 }
 
 ; CHECK-LABEL: inf_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const infinity
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @inf_f64() {
   ret double 0x7FF0000000000000
 }
 
 ; CHECK-LABEL: neginf_f64:
 ; CHECK-NEXT: .result f64{{$}}
 ; CHECK-NEXT: f64.const -infinity
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define double @neginf_f64() {
   ret double 0xFFF0000000000000
 }

test/CodeGen/WebAssembly/load-ext.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that extending loads are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sext_i8_i32:
-; CHECK: load_s_i8_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_s_i8_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @sext_i8_i32(i8 *%p) {
   %v = load i8, i8* %p
   %e = sext i8 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: zext_i8_i32:
-; CHECK: load_u_i8_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_u_i8_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @zext_i8_i32(i8 *%p) {
   %v = load i8, i8* %p
   %e = zext i8 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sext_i16_i32:
-; CHECK: load_s_i16_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_s_i16_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @sext_i16_i32(i16 *%p) {
   %v = load i16, i16* %p
   %e = sext i16 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: zext_i16_i32:
-; CHECK: load_u_i16_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_u_i16_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i32 @zext_i16_i32(i16 *%p) {
   %v = load i16, i16* %p
   %e = zext i16 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sext_i8_i64:
-; CHECK: load_s_i8_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_s_i8_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @sext_i8_i64(i8 *%p) {
   %v = load i8, i8* %p
   %e = sext i8 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i8_i64:
-; CHECK: load_u_i8_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_u_i8_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @zext_i8_i64(i8 *%p) {
   %v = load i8, i8* %p
   %e = zext i8 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sext_i16_i64:
-; CHECK: load_s_i16_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_s_i16_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @sext_i16_i64(i16 *%p) {
   %v = load i16, i16* %p
   %e = sext i16 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i16_i64:
-; CHECK: load_u_i16_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_u_i16_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @zext_i16_i64(i16 *%p) {
   %v = load i16, i16* %p
   %e = zext i16 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sext_i32_i64:
-; CHECK: load_s_i32_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK: load_s_i32_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 define i64 @sext_i32_i64(i32 *%p) {
   %v = load i32, i32* %p
   %e = sext i32 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i32_i64:
-; CHECK: load_u_i32_i64 @1{{$}}
-; CHECK: set_local @2, pop{{$}}
+; CHECK: load_u_i32_i64 1{{$}}
+; CHECK: set_local 2, pop{{$}}
 define i64 @zext_i32_i64(i32 *%p) {
   %v = load i32, i32* %p
   %e = zext i32 %v to i64
   ret i64 %e
 }

test/CodeGen/WebAssembly/load-store-i1.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that i1 extending loads and truncating stores are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: load_u_i1_i32:
-; CHECK:      load_u_i8_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK:      load_u_i8_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @load_u_i1_i32(i1* %p) {
   %v = load i1, i1* %p
   %e = zext i1 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: load_s_i1_i32:
-; CHECK:      load_u_i8_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK:      load_u_i8_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: i32.const 31{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shl @2, @3{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: shr_s @4, @3{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: return @5{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shl 2, 3{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: shr_s 4, 3{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: return 5{{$}}
 define i32 @load_s_i1_i32(i1* %p) {
   %v = load i1, i1* %p
   %e = sext i1 %v to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: load_u_i1_i64:
-; CHECK:      load_u_i8_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK:      load_u_i8_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @load_u_i1_i64(i1* %p) {
   %v = load i1, i1* %p
   %e = zext i1 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: load_s_i1_i64:
-; CHECK:      load_u_i8_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
+; CHECK:      load_u_i8_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
 ; CHECK-NEXT: i64.const 63{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: shl @2, @3{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: shr_s @4, @3{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: return @5{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: shl 2, 3{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: shr_s 4, 3{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: return 5{{$}}
 define i64 @load_s_i1_i64(i1* %p) {
   %v = load i1, i1* %p
   %e = sext i1 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: store_i32_i1:
 ; CHECK:      i32.const 1{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: and @3, @4{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: store_i8 @2, @5{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: and 3, 4{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: store_i8 2, 5{{$}}
 define void @store_i32_i1(i1* %p, i32 %v) {
   %t = trunc i32 %v to i1
   store i1 %t, i1* %p
   ret void
 }
 
 ; CHECK-LABEL: store_i64_i1:
 ; CHECK:      i64.const 1{{$}}
-; CHECK-NEXT: set_local @4, pop{{$}}
-; CHECK-NEXT: and @3, @4{{$}}
-; CHECK-NEXT: set_local @5, pop{{$}}
-; CHECK-NEXT: store_i8 @2, @5{{$}}
+; CHECK-NEXT: set_local 4, pop{{$}}
+; CHECK-NEXT: and 3, 4{{$}}
+; CHECK-NEXT: set_local 5, pop{{$}}
+; CHECK-NEXT: store_i8 2, 5{{$}}
 define void @store_i64_i1(i1* %p, i64 %v) {
   %t = trunc i64 %v to i1
   store i1 %t, i1* %p
   ret void
 }

test/CodeGen/WebAssembly/load.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic loads are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ldi32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: load_i32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: load_i32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @ldi32(i32 *%p) {
   %v = load i32, i32* %p
   ret i32 %v
 }
 
 ; CHECK-LABEL: ldi64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: load_i64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: load_i64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i64 @ldi64(i64 *%p) {
   %v = load i64, i64* %p
   ret i64 %v
 }
 
 ; CHECK-LABEL: ldf32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result f32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: load_f32 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: load_f32 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define float @ldf32(float *%p) {
   %v = load float, float* %p
   ret float %v
 }
 
 ; CHECK-LABEL: ldf64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result f64{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @1, pop{{$}}
-; CHECK-NEXT: load_f64 @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 1, pop{{$}}
+; CHECK-NEXT: load_f64 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define double @ldf64(double *%p) {
   %v = load double, double* %p
   ret double %v
 }

test/CodeGen/WebAssembly/memory-addr32.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic memory operations assemble as expected with 32-bit addresses.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @llvm.wasm.page.size.i32() nounwind readnone
 declare i32 @llvm.wasm.memory.size.i32() nounwind readnone
 declare void @llvm.wasm.resize.memory.i32(i32) nounwind
 
 ; CHECK-LABEL: page_size:
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: page_size
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i32 @page_size() {
   %a = call i32 @llvm.wasm.page.size.i32()
   ret i32 %a
 }
 
 ; CHECK-LABEL: memory_size:
 ; CHECK-NEXT: .result i32{{$}}
 ; CHECK-NEXT: memory_size
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i32 @memory_size() {
   %a = call i32 @llvm.wasm.memory.size.i32()
   ret i32 %a
 }
 
 ; CHECK-LABEL: resize_memory:
 ; CHECK-NEXT: .param i32
-; CHECK: resize_memory @1
+; CHECK: resize_memory 1
 ; CHECK-NEXT: return
 define void @resize_memory(i32 %n) {
   call void @llvm.wasm.resize.memory.i32(i32 %n)
   ret void
 }

test/CodeGen/WebAssembly/memory-addr64.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic memory operations assemble as expected with 64-bit addresses.
 
 target datalayout = "e-p:64:64-i64:64-n32:64-S128"
 target triple = "wasm64-unknown-unknown"
 
 declare i64 @llvm.wasm.page.size.i64() nounwind readnone
 declare i64 @llvm.wasm.memory.size.i64() nounwind readnone
 declare void @llvm.wasm.resize.memory.i64(i64) nounwind
 
 ; CHECK-LABEL: page_size:
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: page_size
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i64 @page_size() {
   %a = call i64 @llvm.wasm.page.size.i64()
   ret i64 %a
 }
 
 ; CHECK-LABEL: memory_size:
 ; CHECK-NEXT: .result i64{{$}}
 ; CHECK-NEXT: memory_size
-; CHECK-NEXT: set_local @0, pop{{$}}
-; CHECK-NEXT: return @0{{$}}
+; CHECK-NEXT: set_local 0, pop{{$}}
+; CHECK-NEXT: return 0{{$}}
 define i64 @memory_size() {
   %a = call i64 @llvm.wasm.memory.size.i64()
   ret i64 %a
 }
 
 ; CHECK-LABEL: resize_memory:
 ; CHECK-NEXT: .param i64
-; CHECK: resize_memory @1
+; CHECK: resize_memory 1
 ; CHECK-NEXT: return
 define void @resize_memory(i64 %n) {
   call void @llvm.wasm.resize.memory.i64(i64 %n)
   ret void
 }

test/CodeGen/WebAssembly/phi.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that phis are lowered.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Basic phi triangle.
 
 ; CHECK-LABEL: test0:
-; CHECK: @0{{$}}
+; CHECK: 0{{$}}
 ; CHECK: set_local [[REG:@.*]], pop
 ; CHECK: sdiv [[REG]], {{.*}}
 ; CHECK: set_local [[REG]], pop
 ; CHECK: return [[REG]]
 define i32 @test0(i32 %p) {
 entry:
   %t = icmp slt i32 %p, 0
   br i1 %t, label %true, label %done

test/CodeGen/WebAssembly/store-trunc.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that truncating stores are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: trunc_i8_i32:
-; CHECK: store_i8 @3, @2{{$}}
+; CHECK: store_i8 3, 2{{$}}
 define void @trunc_i8_i32(i8 *%p, i32 %v) {
   %t = trunc i32 %v to i8
   store i8 %t, i8* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i16_i32:
-; CHECK: store_i16 @3, @2{{$}}
+; CHECK: store_i16 3, 2{{$}}
 define void @trunc_i16_i32(i16 *%p, i32 %v) {
   %t = trunc i32 %v to i16
   store i16 %t, i16* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i8_i64:
-; CHECK: store_i8 @3, @2{{$}}
+; CHECK: store_i8 3, 2{{$}}
 define void @trunc_i8_i64(i8 *%p, i64 %v) {
   %t = trunc i64 %v to i8
   store i8 %t, i8* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i16_i64:
-; CHECK: store_i16 @3, @2{{$}}
+; CHECK: store_i16 3, 2{{$}}
 define void @trunc_i16_i64(i16 *%p, i64 %v) {
   %t = trunc i64 %v to i16
   store i16 %t, i16* %p
   ret void
 }
 
 ; CHECK-LABEL: trunc_i32_i64:
-; CHECK: store_i32 @3, @2{{$}}
+; CHECK: store_i32 3, 2{{$}}
 define void @trunc_i32_i64(i32 *%p, i64 %v) {
   %t = trunc i64 %v to i32
   store i32 %t, i32* %p
   ret void
 }

test/CodeGen/WebAssembly/store.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic stores are assembled properly.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sti32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: store_i32 @3, @2{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: store_i32 3, 2{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti32(i32 *%p, i32 %v) {
   store i32 %v, i32* %p
   ret void
 }
 
 ; CHECK-LABEL: sti64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: store_i64 @3, @2{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: store_i64 3, 2{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti64(i64 *%p, i64 %v) {
   store i64 %v, i64* %p
   ret void
 }
 
 ; CHECK-LABEL: stf32:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param f32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: store_f32 @3, @2{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: store_f32 3, 2{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf32(float *%p, float %v) {
   store float %v, float* %p
   ret void
 }
 
 ; CHECK-LABEL: stf64:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param f64{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @3, pop{{$}}
-; CHECK-NEXT: store_f64 @3, @2{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 3, pop{{$}}
+; CHECK-NEXT: store_f64 3, 2{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf64(double *%p, double %v) {
   store double %v, double* %p
   ret void
 }

test/CodeGen/WebAssembly/unused-argument.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Make sure that argument offsets are correct even if some arguments are unused.
 
 target datalayout = "e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: unused_first:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @1{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 1{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @unused_first(i32 %x, i32 %y) {
   ret i32 %y
 }
 
 ; CHECK-LABEL: unused_second:
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .param i32{{$}}
 ; CHECK-NEXT: .result i32{{$}}
-; CHECK-NEXT: @0{{$}}
-; CHECK-NEXT: set_local @2, pop{{$}}
-; CHECK-NEXT: return @2{{$}}
+; CHECK-NEXT: 0{{$}}
+; CHECK-NEXT: set_local 2, pop{{$}}
+; CHECK-NEXT: return 2{{$}}
 define i32 @unused_second(i32 %x, i32 %y) {
   ret i32 %x
 }