This is an archive of the discontinued LLVM Phabricator instance.

[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.
ClosedPublic

Authored by dsanders on Oct 12 2015, 8:27 AM.

Details

Summary

The -mcpu=mips16 option caused the Integrated Assembler to crash because
it couldn't figure out the architecture revision number to write to the
.MIPS.abiflags section. This CPU definition has been removed because, like
microMIPS, MIPS16 is an ASE to a base architecture.

Diff Detail

Event Timeline

dsanders updated this revision to Diff 37118.Oct 12 2015, 8:27 AM
dsanders retitled this revision from to [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE..
dsanders updated this object.
dsanders added a reviewer: vkalintiris.
dsanders added subscribers: llvm-commits, rkotler.
vkalintiris accepted this revision.Oct 14 2015, 3:35 AM
vkalintiris edited edge metadata.

LGTM. Could you update MipsABIInfo::computeTargetABI() too?

This revision is now accepted and ready to land.Oct 14 2015, 3:35 AM

Could you update MipsABIInfo::computeTargetABI() too?

I hadn't noticed that one. I'll fix that in the commit

This revision was automatically updated to reflect the committed changes.

I haven't changed anything on that side of things, clang was already using it as an ASE. The
-mips16/-mno-mips16 options are still using -target-feature to pass the mips16 feature bit
to the backend and the mixed mode support is still being done via function attributes. I
also checked our internal buildbot was using -mips16 rather than -mcpu=mips16 before
committing.