[Polly] Merge IRAccess into MemoryAccess

[Meinersbur]

Summary

All MemoryAccess objects will be owned by ScopInfo::AccFuncMap which previously stored the IRAccess objects. Instead of creating new MemoryAccess objects, the already created ones are reused, but their order might be different now. Some fields of IRAccess and MemoryAccess had the same meaning and are merged.

This is the last step of fusioning TempScopInfo.{h|cpp} and ScopInfo.{h.cpp}. Some refactoring might still make sense.

[llvm-commits]

but their order might be different now.

I always believed the order of (non-scalar) memory accesses in the SCoP
statement corresponded to the order of memory instructions in the basic
block. Was this true would not be anymore? If so I would like to keep the
old order if possible. If it wasn't true before, this comment is void.

• msg-2753-16.dat219 BDownload
• msg-2753-17.txt162 BDownload

[Meinersbur]

rebase to r247572

[Meinersbur]

In D12843#245239, @llvm-commits wrote:

but their order might be different now.

I always believed the order of (non-scalar) memory accesses in the SCoP
statement corresponded to the order of memory instructions in the basic
block. Was this true would not be anymore? If so I would like to keep the
old order if possible. If it wasn't true before, this comment is void.

I think the order is undefined. Former TempScopInfo added IRAccesses to AccFuncMap (apart from the Functions set in buildAccessFunctions) depending on the order of iteration through the BBs, which is I think also undefined (but deterministic). Also its name is AccFuncSetType, indicating that it was never intended to make order matter. If this is wring, it should be documented.

include/polly/ScopInfo.h

1479

I was wondering why this is not always the case. Would save one parameter.

[llvm-commits]

Meinersbur added a comment.

In http://reviews.llvm.org/D12843#245239, @llvm-commits wrote:

but their order might be different now.

I always believed the order of (non-scalar) memory accesses in the SCoP
statement corresponded to the order of memory instructions in the basic
block. Was this true would not be anymore? If so I would like to keep the
old order if possible. If it wasn't true before, this comment is void.

I think the order is undefined. Former TempScopInfo added IRAccesses to AccFuncMap (apart from the Functions set in buildAccessFunctions) depending on the order of iteration through the BBs, which is I think also undefined (but deterministic). Also its name is AccFuncSetType, indicating that it was never intended to make order matter. If this is wring, it should be documented.

Iterating over a BB has a defined order! I think we should not abandon
this for no good reason. At the latest the invariant hoisting patch will
make use of this (important for multiple ptr indirections).

• msg-10220-415.dat219 BDownload
• msg-10220-416.txt162 BDownload

[Meinersbur]

In D12843#245324, @llvm-commits wrote:

Iterating over a BB has a defined order!

The iteration order of instructions in BB for sure matters, but I was talking about the order of BBs in a functions, which shouldn't influence the correctness of generated code (except the first BB which is defined as the entry; correct me if I am wrong).

I think we should not abandon
this for no good reason. At the latest the invariant hoisting patch will
make use of this (important for multiple ptr indirections).

To abandon something it must have been defined in the first place. From the code I do not see any pattern the code is trying to preserve except:

1. Loads, stores, PHI reads and some scalar writes are consecutive
2. Loads, stores, PHI reads and some scalar writes are in order as they appear in the BB.

Everything else depends on the order of BBs in a function.

Btw, the second property is preserved with this patch.

If you give me a definition of what the order is supposed to be, I can try to preserve it.

[llvm-commits]

Meinersbur added a comment.
If you give me a definition of what the order is supposed to be, I can try to preserve it.

The order of non-scalar memory accesses in a statement should be the same as
the order of the corresponding memory access instructions in the BB. If
I understand you correctly that will not change, thus I'm good.

• msg-32017-427.dat219 BDownload
• msg-32017-428.txt162 BDownload

[Meinersbur]

Same background on why the order change might be useful:

buildAccessFunctions() collected the IRAccess of those accesses (Loads, stores, PHI reads and some scalar writes) in a Functions list and appended it to the main list afterwards. Other accesses might have already been added to the main list from processing other BBs and the current BB. IRAccess was a copyable class, but after MemoryAccess has been merged in, it is not any more (because of the reference-counted ISL members), so it cannot be temporarily added to another list.

Hence, I removed the temporary list and add MemoryAccess objects directly to the main list. The order in which they are added to the main list remains the same, but other accessed might be added in between while iterating over the the same BB. This happened in the changed test case loop_carry.ll with the PHI %k.05 which has an incoming edge from the same BB "bb"for which the write is added.

include/polly/ScopInfo.h

96

Maybe use a std::forward_list instead?

[Meinersbur]

Rebase to r247970

include/polly/ScopInfo.h

 struct isl_ast_build;
 struct isl_constraint;
 struct isl_pw_aff;
 struct isl_pw_multi_aff;
 struct isl_schedule;
 
 namespace polly {
 
-class IRAccess;
+class MemoryAccess;
 class Scop;
 class ScopStmt;
 class ScopInfo;
 class Comparison;
 class SCEVAffFunc;
 
 class Comparison {
   const SCEV *LHS;

 /// Maps from a loop to the affine function expressing its backedge taken count.
 /// The backedge taken count already enough to express iteration domain as we
 /// only allow loops with canonical induction variable.
 /// A canonical induction variable is:
 /// an integer recurrence that starts at 0 and increments by one each time
 /// through the loop.
 typedef std::map<const Loop *, const SCEV *> LoopBoundMapType;
 
-typedef std::vector<std::pair<IRAccess, Instruction *>> AccFuncSetType;
+typedef std::deque<MemoryAccess> AccFuncSetType;
 typedef std::map<const BasicBlock *, AccFuncSetType> AccFuncMapType;
 
 /// @brief A class to store information about arrays in the SCoP.
 ///
 /// Objects are accessible via the ScoP, MemoryAccess or the id associated with
 /// the MemoryAccess access function.
 ///
 class ScopArrayInfo {
private:
 
   /// @brief The sizes of each dimension as isl_pw_aff.
   SmallVector<isl_pw_aff *, 4> DimensionSizesPw;
 
   /// @brief Is this PHI node specific storage?
   bool IsPHI;
 };
 
-//===---------------------------------------------------------------------===//
-/// @brief A memory access described by a SCEV expression and the access type.
-class IRAccess {
-public:
-  Value *BaseAddress;
-  Value *AccessValue;
-
-  const SCEV *Offset;
-
-  // The type of the scev affine function
-  enum TypeKind {
-    READ = 0x1,
-    MUST_WRITE = 0x2,
-    MAY_WRITE = 0x3,
-  };
-
-private:
-  unsigned ElemBytes;
-  TypeKind Type;
-  bool IsAffine;
-
-  /// @brief Is this IRAccess modeling special PHI node accesses?
-  bool IsPHI;
-
-public:
-  SmallVector<const SCEV *, 4> Subscripts, Sizes;
-
-  /// @brief Create a new IRAccess
-  ///
-  /// @param IsPHI Are we modeling special PHI node accesses?
-  explicit IRAccess(TypeKind Type, Value *BaseAddress, const SCEV *Offset,
-                    unsigned elemBytes, bool Affine, Value *AccessValue,
-                    bool IsPHI = false)
-      : BaseAddress(BaseAddress), AccessValue(AccessValue), Offset(Offset),
-        ElemBytes(elemBytes), Type(Type), IsAffine(Affine), IsPHI(IsPHI) {}
-
-  explicit IRAccess(TypeKind Type, Value *BaseAddress, const SCEV *Offset,
-                    unsigned elemBytes, bool Affine,
-                    ArrayRef<const SCEV *> Subscripts,
-                    ArrayRef<const SCEV *> Sizes, Value *AccessValue)
-      : BaseAddress(BaseAddress), AccessValue(AccessValue), Offset(Offset),
-        ElemBytes(elemBytes), Type(Type), IsAffine(Affine), IsPHI(false),
-        Subscripts(Subscripts.begin(), Subscripts.end()),
-        Sizes(Sizes.begin(), Sizes.end()) {}
-
-  enum TypeKind getType() const { return Type; }
-
-  Value *getBase() const { return BaseAddress; }
-
-  Value *getAccessValue() const { return AccessValue; }
-
-  const SCEV *getOffset() const { return Offset; }
-
-  unsigned getElemSizeInBytes() const { return ElemBytes; }
-
-  bool isAffine() const { return IsAffine; }
-
-  bool isRead() const { return Type == READ; }
-
-  bool isWrite() const { return Type == MUST_WRITE; }
-
-  void setMayWrite() { Type = MAY_WRITE; }
-
-  bool isMayWrite() const { return Type == MAY_WRITE; }
-
-  bool isScalar() const { return Subscripts.size() == 0; }
-
-  // @brief Is this IRAccess modeling special PHI node accesses?
-  bool isPHI() const { return IsPHI; }
-
-  void print(raw_ostream &OS) const;
-};
-
 /// @brief Represent memory accesses in statements.
 class MemoryAccess {
+  friend class Scop;
+  friend class ScopStmt;
+
 public:
   /// @brief The access type of a memory access
   ///
   /// There are three kind of access types:
   ///
   /// * A read access
   ///
   /// A certain set of memory locations are read and may be used for internal
   /// calculations.
   ///
   /// * A must-write access
   ///
   /// A certain set of memory locations is definitely written. The old value is
   /// replaced by a newly calculated value. The old value is not read or used at
   /// all.
   ///
   /// * A may-write access
   ///
   /// A certain set of memory locations may be written. The memory location may
   /// contain a new value if there is actually a write or the old value may
   /// remain, if no write happens.
-  enum AccessType { READ, MUST_WRITE, MAY_WRITE };
+  enum AccessType {
+    READ = 0x1,
+    MUST_WRITE = 0x2,
+    MAY_WRITE = 0x3,
+  };
 
   /// @brief Reduction access type
   ///
   /// Commutative and associative binary operations suitable for reductions
   enum ReductionType {
     RT_NONE, ///< Indicate no reduction at all
     RT_ADD,  ///< Addition
     RT_MUL,  ///< Multiplication
     RT_BOR,  ///< Bitwise Or
     RT_BXOR, ///< Bitwise XOr
     RT_BAND, ///< Bitwise And
   };
 
 private:
   MemoryAccess(const MemoryAccess &) = delete;
   const MemoryAccess &operator=(const MemoryAccess &) = delete;
 
-  isl_map *AccessRelation;
-  enum AccessType AccType;
-
-  /// @brief The base address (e.g., A for A[i+j]).
-  Value *BaseAddr;
+  /// @brief A unique identifier for this memory access.
+  ///
+  /// The identifier is unique between all memory accesses belonging to the same
+  /// scop statement.
+  isl_id *Id;
 
-  std::string BaseName;
-  __isl_give isl_basic_map *createBasicAccessMap(ScopStmt *Statement);
-  ScopStmt *Statement;
+  /// @brief Whether it a reading or writing access, and if writing, whether it
+  /// is conditional (MAY_WRITE).
+  enum AccessType AccType;
 
   /// @brief Reduction type for reduction like accesses, RT_NONE otherwise
   ///
   /// An access is reduction like if it is part of a load-store chain in which
   /// both access the same memory location (use the same LLVM-IR value
   /// as pointer reference). Furthermore, between the load and the store there
   /// is exactly one binary operator which is known to be associative and
   /// commutative.
private:
   /// for which j = 0 holds do. After lifting the equality check in ScopInfo,
   /// subsequent transformations do not only need check if a statement is
   /// reduction like, but they also need to verify that that the reduction
   /// property is only exploited for statement instances that load from and
   /// store to the same data location. Doing so at dependence analysis time
   /// could allow us to handle the above example.
   ReductionType RedType = RT_NONE;
 
+  /// @brief Is this MemoryAccess modeling special PHI node accesses?
+  bool IsPHI;
+
+  /// @brief Parent ScopStmt of this access.
+  ScopStmt *Statement;
+
+  // Properties describing the accessed array.
+  // TODO: It might be possible to move them to ScopArrayInfo.
+  // @{
+
+  /// @brief The base address (e.g., A for A[i+j]).
+  Value *BaseAddr;
+
+  /// @brief An unique name of the accessed array.
+  std::string BaseName;
+
+  /// @brief Size in bytes of a single array element.
+  unsigned ElemBytes;
+
+  /// @brief Size of each dimension of the accessed array.
+  SmallVector<const SCEV *, 4> Sizes;
+  // @}
+
+  // Properties describing the accessed element.
+  // @{
+
   /// @brief The access instruction of this memory access.
   Instruction *AccessInstruction;
 
   /// @brief The value associated with this memory access.
   ///
   ///  - For real memory accesses it is the loaded result or the stored value.
   ///  - For straight line scalar accesses it is the access instruction itself.
   ///  - For PHI operand accesses it is the operand value.
   ///
   Value *AccessValue;
 
-  /// Updated access relation read from JSCOP file.
+  /// @brief Accessed element relative to the base pointer (in bytes).
+  ///
+  /// Currently only used by printIR.
+  const SCEV *Offset;
+
+  /// @brief Are all the subscripts affine expression?
+  bool IsAffine;
+
+  /// @brief Subscript expression for each dimension.
+  SmallVector<const SCEV *, 4> Subscripts;
+
+  /// @brief Relation from statment instances to the accessed array elements.
+  isl_map *AccessRelation;
+
+  /// @brief Updated access relation read from JSCOP file.
   isl_map *NewAccessRelation;
+  // @}
 
-  /// @brief A unique identifier for this memory access.
-  ///
-  /// The identifier is unique between all memory accesses belonging to the same
-  /// scop statement.
-  isl_id *Id;
+  unsigned getElemSizeInBytes() const { return ElemBytes; }
+
+  bool isAffine() const { return IsAffine; }
+
+  /// @brief Is this MemoryAccess modeling special PHI node accesses?
+  bool isPHI() const { return IsPHI; }
+
+  void printIR(raw_ostream &OS) const;
+
+  void setStatement(ScopStmt *Stmt) { this->Statement = Stmt; }
+
+  __isl_give isl_basic_map *createBasicAccessMap(ScopStmt *Statement);
 
-  void assumeNoOutOfBound(const IRAccess &Access);
+  void assumeNoOutOfBound();
 
   /// @brief Compute bounds on an over approximated  access relation.
   ///
   /// @param ElementSize The size of one element accessed.
   void computeBoundsOnAccessRelation(unsigned ElementSize);
 
   /// @brief Get the original access function as read from IR.
   __isl_give isl_map *getOriginalAccessRelation() const;
private:
   /// We can generalize this mapping to arbitrary dimensions by applying this
   /// piecewise mapping pairwise from the rightmost to the leftmost access
   /// dimension. It would also be possible to cover a wider range by introducing
   /// more cases and adding multiple of Ns to these cases. However, this has
   /// not yet been necessary.
   /// The introduction of different cases necessarily complicates the memory
   /// access function, but cases that can be statically proven to not happen
   /// will be eliminated later on.
-  __isl_give isl_map *foldAccess(const IRAccess &Access,
-                                 __isl_take isl_map *AccessRelation,
+  __isl_give isl_map *foldAccess(__isl_take isl_map *AccessRelation,
                                  ScopStmt *Statement);
 
-public:
-  /// @brief Create a memory access from an access in LLVM-IR.
+  /// @brief Assemble the access relation from all availbale information.
+  ///
+  /// In particular, used the information passes in the constructor and the
+  /// parent ScopStmt set by setStatment().
   ///
-  /// @param Access     The memory access.
-  /// @param AccInst    The access instruction.
-  /// @param Statement  The statement that contains the access.
-  /// @param SAI        The ScopArrayInfo object for this base pointer.
-  /// @param Identifier An identifier that is unique for all memory accesses
-  ///                   belonging to the same scop statement.
-  MemoryAccess(const IRAccess &Access, Instruction *AccInst,
-               ScopStmt *Statement, const ScopArrayInfo *SAI, int Identifier);
+  /// @param SAI Info object for the accessed array.
+  void buildAccessRelation(const ScopArrayInfo *SAI);
 
+public:
+  /// @brief Create a new MemoryAccess.
+  ///
+  /// @param AccessInst The instruction doing the access.
+  /// @param Id         Identifier that is guranteed to be unique within the
+  ///                   same ScopStmt.
+  /// @param BaseAddr   The accessed array's address.
+  /// @param Offset     Accessed memoray location relative to @p BaseAddr.
+  /// @param ElemBytes  Number of accessed bytes.
+  /// @param AccType    Whether read or write access.
+  /// @param IsAffine   Whether the subscripts are affine expressions.
+  /// @param IsPHI      Are we modeling special PHI node accesses?
+  /// @param Subscripts Subscipt expressions
+  /// @param Sizes      Dimension lengths of the accessed array.
+  /// @param BaseName   Name of the acessed array.
+  MemoryAccess(Instruction *AccessInst, __isl_take isl_id *Id, AccessType Type,
+               Value *BaseAddress, const SCEV *Offset, unsigned ElemBytes,
+               bool Affine, ArrayRef<const SCEV *> Subscripts,
+               ArrayRef<const SCEV *> Sizes, Value *AccessValue, bool IsPHI,
+               StringRef BaseName);
   ~MemoryAccess();
 
   /// @brief Get the type of a memory access.
   enum AccessType getType() { return AccType; }
 
   /// @brief Is this a reduction like access?
   bool isReductionLike() const { return RedType != RT_NONE; }
 

 /// A Scop statement represents an instruction in the Scop.
 ///
 /// It is further described by its iteration domain, its schedule and its data
 /// accesses.
 /// At the moment every statement represents a single basic block of LLVM-IR.
 class ScopStmt {
 public:
   /// @brief List to hold all (scalar) memory accesses mapped to an instruction.
-  using MemoryAccessList = std::forward_list<MemoryAccess>;
+  using MemoryAccessList = std::forward_list<MemoryAccess *>;
 
   ScopStmt(const ScopStmt &) = delete;
   const ScopStmt &operator=(const ScopStmt &) = delete;
 
   /// Create the ScopStmt from a BasicBlock.
   ScopStmt(Scop &parent, BasicBlock &bb);
 
   /// Create an overapproximating ScopStmt for the region @p R.
const MemoryAccess &getAccessFor(const Instruction *Inst) const {
     MemoryAccess *MA = lookupAccessFor(Inst);
     assert(MA && "Cannot get memory access because it does not exist!");
     return *MA;
   }
 
   /// @brief Return the __first__ (scalar) memory access for @p Inst if any.
   MemoryAccess *lookupAccessFor(const Instruction *Inst) const {
     auto It = InstructionToAccess.find(Inst);
-    return It == InstructionToAccess.end() ? nullptr
-                                           : &It->getSecond()->front();
+    return It == InstructionToAccess.end() ? nullptr : It->getSecond()->front();
   }
 
   void setBasicBlock(BasicBlock *Block) {
     // TODO: Handle the case where the statement is a region statement, thus
     //       the entry block was split and needs to be changed in the region R.
     assert(BB && "Cannot set a block for a region statement");
     BB = Block;
   }
class ScopInfo : public RegionPass {
 
   // Valid Regions for Scop
   ScopDetection *SD;
 
   // Target data for element size computing.
   const DataLayout *TD;
 
   // Access function of statements (currently BasicBlocks) .
+  //
+  // This owns all the MemoryAccess objects of the Scop created in this pass. It
+  // must live until #scop is deleted.
   AccFuncMapType AccFuncMap;
 
   // Pre-created zero for the scalar accesses, with it we do not need create a
   // zero scev every time when we need it.
   const SCEV *ZeroOffset;
 
   // The Scop
   Scop *scop;
   isl_ctx *ctx;
 
   // Clear the context.
   void clear();
 
   // Build the SCoP for Region @p R.
   Scop *buildScop(Region &R, DominatorTree &DT);
 
-  /// @brief Build an instance of IRAccess from the Load/Store instruction.
+  /// @brief Build an instance of MemoryAccess from the Load/Store instruction.
   ///
   /// @param Inst       The Load/Store instruction that access the memory
   /// @param L          The parent loop of the instruction
   /// @param R          The region on which to build the data access dictionary.
   /// @param BoxedLoops The set of loops that are overapproximated in @p R.
-  ///
-  /// @return     The IRAccess to describe the access function of the
-  ///             instruction.
-  IRAccess buildIRAccess(Instruction *Inst, Loop *L, Region *R,
+  void buildMemoryAccess(Instruction *Inst, Loop *L, Region *R,
                          const ScopDetection::BoxedLoopsSetTy *BoxedLoops);
 
   /// @brief Analyze and extract the cross-BB scalar dependences (or,
   ///        dataflow dependencies) of an instruction.
   ///
   /// @param Inst               The instruction to be analyzed
   /// @param R                  The SCoP region
   /// @param NonAffineSubRegion The non affine sub-region @p Inst is in.
   ///
   /// @return     True if the Instruction is used in other BB and a scalar write
   ///             Access is required.
   bool buildScalarDependences(Instruction *Inst, Region *R,
                               Region *NonAffineSubRegio);
 
-  /// @brief Create IRAccesses for the given PHI node in the given region.
+  /// @brief Create MemoryAccesses for the given PHI node in the given region.
   ///
   /// @param PHI                The PHI node to be handled
   /// @param R                  The SCoP region
-  /// @param Functions          The access functions of the current BB
   /// @param NonAffineSubRegion The non affine sub-region @p PHI is in.
   /// @param IsExitBlock        Flag to indicate that @p PHI is in the exit BB.
-  void buildPHIAccesses(PHINode *PHI, Region &R, AccFuncSetType &Functions,
-                        Region *NonAffineSubRegion, bool IsExitBlock = false);
+  void buildPHIAccesses(PHINode *PHI, Region &R, Region *NonAffineSubRegion,
+                        bool IsExitBlock = false);
 
   /// @brief Build the access functions for the subregion @p SR.
   ///
   /// @param R  The SCoP region.
   /// @param SR A subregion of @p R.
   void buildAccessFunctions(Region &R, Region &SR);
 
   /// @brief Build the access functions for the basic block @p BB
   ///
   /// @param R                  The SCoP region.
   /// @param BB                 A basic block in @p R.
   /// @param NonAffineSubRegion The non affine sub-region @p BB is in.
   /// @param IsExitBlock        Flag to indicate that @p BB is in the exit BB.
   void buildAccessFunctions(Region &R, BasicBlock &BB,
                             Region *NonAffineSubRegion = nullptr,
                             bool IsExitBlock = false);
 
+  /// @brief Create a new MemoryAccess object and add it to #AccFuncMap.
+  ///
+  /// @param BB          The block where the access takes place.
+  /// @param Inst        The instruction doing the access. It is not necessarily
+  ///                    inside @p BB.
+  /// @param Type        The kind of access.
+  /// @param BaseAddress The accessed array's base address.
+  /// @param Offset      Accessed location relative to @p BaseAddress.
+  /// @param ElemBytes   Size of accessed array element.
+  /// @param Affine      Whether all subscripts are affine expressions.
+  /// @param AccessValue Value read or written.
+  /// @param Subscripts  Access subscripts per dimension.
+  /// @param Sizes       The array diminsion's sizes.
+  /// @param IsPHI       Whether this is an emulated PHI node.
+  void addMemoryAccess(BasicBlock *BB, Instruction *Inst,
+                       MemoryAccess::AccessType Type, Value *BaseAddress,
+                       const SCEV *Offset, unsigned ElemBytes, bool Affine,
+                       Value *AccessValue, ArrayRef<const SCEV *> Subscripts,
+                       ArrayRef<const SCEV *> Sizes, bool IsPHI);
+
+  void addMemoryAccess(BasicBlock *BB, Instruction *Inst,
+                       MemoryAccess::AccessType Type, Value *BaseAddress,
+                       const SCEV *Offset, unsigned ElemBytes, bool Affine,
+                       Value *AccessValue, bool IsPHI = false) {
+    addMemoryAccess(BB, Inst, Type, BaseAddress, Offset, ElemBytes, Affine,
+                    AccessValue, ArrayRef<const SCEV *>(),
+                    ArrayRef<const SCEV *>(), IsPHI);
+  }
+
+  void addMemoryAccess(BasicBlock *BB, Instruction *Inst,
+                       MemoryAccess::AccessType Type, Value *BaseAddress,
+                       const SCEV *Offset, unsigned ElemBytes, bool Affine,
+                       ArrayRef<const SCEV *> Subscripts,
+                       ArrayRef<const SCEV *> Sizes, Value *AccessValue) {
+    addMemoryAccess(BB, Inst, Type, BaseAddress, Offset, ElemBytes, Affine,
+                    AccessValue, Subscripts, Sizes, false);
+  }
+
 public:
   static char ID;
   explicit ScopInfo();
   ~ScopInfo();
 
   /// @brief Try to build the Polly IR of static control part on the current
   ///        SESE-Region.
   ///

lib/Analysis/ScopInfo.cpp

 
 const ScopArrayInfo *ScopArrayInfo::getFromId(isl_id *Id) {
   void *User = isl_id_get_user(Id);
   const ScopArrayInfo *SAI = static_cast<ScopArrayInfo *>(User);
   isl_id_free(Id);
   return SAI;
 }
 
-void IRAccess::print(raw_ostream &OS) const {
+void MemoryAccess::printIR(raw_ostream &OS) const {
   if (isRead())
     OS << "Read ";
   else {
     if (isMayWrite())
       OS << "May";
     OS << "Write ";
   }
-  OS << BaseAddress->getName() << '[' << *Offset << "]\n";
+  OS << BaseAddr->getName() << '[' << *Offset << "]\n";
 }
 
 const std::string
 MemoryAccess::getReductionOperatorStr(MemoryAccess::ReductionType RT) {
   switch (RT) {
   case MemoryAccess::RT_NONE:
     llvm_unreachable("Requested a reduction operator string for a memory "
                      "access which isn't a reduction");
static MemoryAccess::ReductionType getReductionType(const BinaryOperator *BinOp,
   case Instruction::Mul:
     if (DisableMultiplicativeReductions)
       return MemoryAccess::RT_NONE;
     return MemoryAccess::RT_MUL;
   default:
     return MemoryAccess::RT_NONE;
   }
 }
-//===----------------------------------------------------------------------===//
 
 MemoryAccess::~MemoryAccess() {
   isl_id_free(Id);
   isl_map_free(AccessRelation);
   isl_map_free(NewAccessRelation);
 }
 
-static MemoryAccess::AccessType getMemoryAccessType(const IRAccess &Access) {
-  switch (Access.getType()) {
-  case IRAccess::READ:
-    return MemoryAccess::READ;
-  case IRAccess::MUST_WRITE:
-    return MemoryAccess::MUST_WRITE;
-  case IRAccess::MAY_WRITE:
-    return MemoryAccess::MAY_WRITE;
-  }
-  llvm_unreachable("Unknown IRAccess type!");
-}
-
 const ScopArrayInfo *MemoryAccess::getScopArrayInfo() const {
   isl_id *ArrayId = getArrayId();
   void *User = isl_id_get_user(ArrayId);
   const ScopArrayInfo *SAI = static_cast<ScopArrayInfo *>(User);
   isl_id_free(ArrayId);
   return SAI;
 }
 

 // then apply the reverse access relation to obtain the set of iterations that
 // may contain invalid accesses and reduce this set of iterations to the ones
 // that are actually executed by intersecting them with the domain of the
 // statement. If we now project out all loop dimensions, we obtain a set of
 // parameters that may cause statement instances to be executed that may
 // possibly yield out of bound memory accesses. The complement of these
 // constraints is the set of constraints that needs to be assumed to ensure such
 // statement instances are never executed.
-void MemoryAccess::assumeNoOutOfBound(const IRAccess &Access) {
+void MemoryAccess::assumeNoOutOfBound() {
   isl_space *Space = isl_space_range(getOriginalAccessRelationSpace());
   isl_set *Outside = isl_set_empty(isl_space_copy(Space));
-  for (int i = 1, Size = Access.Subscripts.size(); i < Size; ++i) {
+  for (int i = 1, Size = Subscripts.size(); i < Size; ++i) {
     isl_local_space *LS = isl_local_space_from_space(isl_space_copy(Space));
     isl_pw_aff *Var =
         isl_pw_aff_var_on_domain(isl_local_space_copy(LS), isl_dim_set, i);
     isl_pw_aff *Zero = isl_pw_aff_zero_on_domain(LS);
 
     isl_set *DimOutside;
 
     DimOutside = isl_pw_aff_lt_set(isl_pw_aff_copy(Var), Zero);
-    isl_pw_aff *SizeE = Statement->getPwAff(Access.Sizes[i - 1]);
+    isl_pw_aff *SizeE = Statement->getPwAff(Sizes[i - 1]);
 
     SizeE = isl_pw_aff_drop_dims(SizeE, isl_dim_in, 0,
                                  Statement->getNumIterators());
     SizeE = isl_pw_aff_add_dims(SizeE, isl_dim_in,
                                 isl_space_dim(Space, isl_dim_set));
     SizeE = isl_pw_aff_set_tuple_id(SizeE, isl_dim_in,
                                     isl_space_get_tuple_id(Space, isl_dim_set));
 
void MemoryAccess::computeBoundsOnAccessRelation(unsigned ElementSize) {
   auto Max = (UB - APInt(BW, 1)).sdiv(APInt(BW, ElementSize));
 
   isl_set *AccessRange = isl_map_range(isl_map_copy(AccessRelation));
   AccessRange =
       addRangeBoundsToSet(AccessRange, ConstantRange(Min, Max), 0, isl_dim_set);
   AccessRelation = isl_map_intersect_range(AccessRelation, AccessRange);
 }
 
-__isl_give isl_map *MemoryAccess::foldAccess(const IRAccess &Access,
-                                             __isl_take isl_map *AccessRelation,
+__isl_give isl_map *MemoryAccess::foldAccess(__isl_take isl_map *AccessRelation,
                                              ScopStmt *Statement) {
-  int Size = Access.Subscripts.size();
+  int Size = Subscripts.size();
 
   for (int i = Size - 2; i >= 0; --i) {
     isl_space *Space;
     isl_map *MapOne, *MapTwo;
-    isl_pw_aff *DimSize = Statement->getPwAff(Access.Sizes[i]);
+    isl_pw_aff *DimSize = Statement->getPwAff(Sizes[i]);
 
     isl_space *SpaceSize = isl_pw_aff_get_space(DimSize);
     isl_pw_aff_free(DimSize);
     isl_id *ParamId = isl_space_get_dim_id(SpaceSize, isl_dim_param, 0);
 
     Space = isl_map_get_space(AccessRelation);
     Space = isl_space_map_from_set(isl_space_range(Space));
     Space = isl_space_align_params(Space, SpaceSize);
for (int i = Size - 2; i >= 0; --i) {
     MapTwo = isl_map_upper_bound_si(MapTwo, isl_dim_in, i + 1, -1);
 
     MapOne = isl_map_union(MapOne, MapTwo);
     AccessRelation = isl_map_apply_range(AccessRelation, MapOne);
   }
   return AccessRelation;
 }
 
-MemoryAccess::MemoryAccess(const IRAccess &Access, Instruction *AccInst,
-                           ScopStmt *Statement, const ScopArrayInfo *SAI,
-                           int Identifier)
-    : AccType(getMemoryAccessType(Access)), Statement(Statement),
-      AccessInstruction(AccInst), AccessValue(Access.getAccessValue()),
-      NewAccessRelation(nullptr) {
-
-  isl_ctx *Ctx = Statement->getIslCtx();
-  BaseAddr = Access.getBase();
-  BaseName = getIslCompatibleName("MemRef_", getBaseAddr(), "");
+void MemoryAccess::buildAccessRelation(const ScopArrayInfo *SAI) {
+  assert(!AccessRelation && "AccessReltation already built");
 
+  isl_ctx *Ctx = isl_id_get_ctx(Id);
   isl_id *BaseAddrId = SAI->getBasePtrId();
 
-  auto IdName = "__polly_array_ref_" + std::to_string(Identifier);
-  Id = isl_id_alloc(Ctx, IdName.c_str(), nullptr);
-
-  if (!Access.isAffine()) {
+  if (!isAffine()) {
     // We overapproximate non-affine accesses with a possible access to the
     // whole array. For read accesses it does not make a difference, if an
     // access must or may happen. However, for write accesses it is important to
     // differentiate between writes that must happen and writes that may happen.
     AccessRelation = isl_map_from_basic_map(createBasicAccessMap(Statement));
     AccessRelation =
         isl_map_set_tuple_id(AccessRelation, isl_dim_out, BaseAddrId);
 
-    computeBoundsOnAccessRelation(Access.getElemSizeInBytes());
+    computeBoundsOnAccessRelation(getElemSizeInBytes());
     return;
   }
 
   isl_space *Space = isl_space_alloc(Ctx, 0, Statement->getNumIterators(), 0);
   AccessRelation = isl_map_universe(Space);
 
-  for (int i = 0, Size = Access.Subscripts.size(); i < Size; ++i) {
-    isl_pw_aff *Affine = Statement->getPwAff(Access.Subscripts[i]);
+  for (int i = 0, Size = Subscripts.size(); i < Size; ++i) {
+    isl_pw_aff *Affine = Statement->getPwAff(Subscripts[i]);
 
     if (Size == 1) {
       // For the non delinearized arrays, divide the access function of the last
       // subscript by the size of the elements in the array.
       //
       // A stride one array access in C expressed as A[i] is expressed in
       // LLVM-IR as something like A[i * elementsize]. This hides the fact that
       // two subsequent values of 'i' index two values that are stored next to
       // each other in memory. By this division we make this characteristic
       // obvious again.
-      isl_val *v = isl_val_int_from_si(Ctx, Access.getElemSizeInBytes());
+      isl_val *v = isl_val_int_from_si(Ctx, getElemSizeInBytes());
       Affine = isl_pw_aff_scale_down_val(Affine, v);
     }
 
     isl_map *SubscriptMap = isl_map_from_pw_aff(Affine);
 
     AccessRelation = isl_map_flat_range_product(AccessRelation, SubscriptMap);
   }
 
-  AccessRelation = foldAccess(Access, AccessRelation, Statement);
+  AccessRelation = foldAccess(AccessRelation, Statement);
 
   Space = Statement->getDomainSpace();
   AccessRelation = isl_map_set_tuple_id(
       AccessRelation, isl_dim_in, isl_space_get_tuple_id(Space, isl_dim_set));
   AccessRelation =
       isl_map_set_tuple_id(AccessRelation, isl_dim_out, BaseAddrId);
 
-  assumeNoOutOfBound(Access);
+  assumeNoOutOfBound();
   AccessRelation = isl_map_gist_domain(AccessRelation, Statement->getDomain());
   isl_space_free(Space);
 }
 
+MemoryAccess::MemoryAccess(Instruction *AccessInst, __isl_take isl_id *Id,
+                           AccessType Type, Value *BaseAddress,
+                           const SCEV *Offset, unsigned ElemBytes, bool Affine,
+                           ArrayRef<const SCEV *> Subscripts,
+                           ArrayRef<const SCEV *> Sizes, Value *AccessValue,
+                           bool IsPHI, StringRef BaseName)
+    : Id(Id), IsPHI(IsPHI), AccType(Type), RedType(RT_NONE), Statement(nullptr),
+      BaseAddr(BaseAddress), BaseName(BaseName), ElemBytes(ElemBytes),
+      Sizes(Sizes.begin(), Sizes.end()), AccessInstruction(AccessInst),
+      AccessValue(AccessValue), Offset(Offset), IsAffine(Affine),
+      Subscripts(Subscripts.begin(), Subscripts.end()), AccessRelation(nullptr),
+      NewAccessRelation(nullptr) {}
+
 void MemoryAccess::realignParams() {
   isl_space *ParamSpace = Statement->getParent()->getParamSpace();
   AccessRelation = isl_map_align_params(AccessRelation, ParamSpace);
 }
 
 const std::string MemoryAccess::getReductionOperatorStr() const {
   return MemoryAccess::getReductionOperatorStr(getReductionType());
 }

 }
 
 void ScopStmt::buildAccesses(BasicBlock *Block, bool isApproximated) {
   AccFuncSetType *AFS = Parent.getAccessFunctions(Block);
   if (!AFS)
     return;
 
   for (auto &AccessPair : *AFS) {
-    IRAccess &Access = AccessPair.first;
-    Instruction *AccessInst = AccessPair.second;
+    MemoryAccess &Access = AccessPair;
+    Instruction *AccessInst = AccessPair.getAccessInstruction();
     Type *ElementType = Access.getAccessValue()->getType();
 
     const ScopArrayInfo *SAI = getParent()->getOrCreateScopArrayInfo(
-        Access.getBase(), ElementType, Access.Sizes, Access.isPHI());
+        Access.getBaseAddr(), ElementType, Access.Sizes, Access.isPHI());
 
-    if (isApproximated && Access.isWrite())
-      Access.setMayWrite();
+    if (isApproximated && Access.isMustWrite())
+      Access.AccType = MemoryAccess::MAY_WRITE;
 
     MemoryAccessList *&MAL = InstructionToAccess[AccessInst];
     if (!MAL)
       MAL = new MemoryAccessList();
-    MAL->emplace_front(Access, AccessInst, this, SAI, MemAccs.size());
-    MemAccs.push_back(&MAL->front());
+    Access.setStatement(this);
+    Access.buildAccessRelation(SAI);
+    MAL->emplace_front(&Access);
+    MemAccs.push_back(MAL->front());
   }
 }
 
 void ScopStmt::realignParams() {
   for (MemoryAccess *MA : *this)
     MA->realignParams();
 
   Domain = isl_set_align_params(Domain, Parent.getParamSpace());
if (AccSetIt == AccFuncMap.end())
       continue;
 
     OS.indent(ind) << "BB: " << CurBlock->getName() << '\n';
     typedef AccFuncSetType::const_iterator access_iterator;
     const AccFuncSetType &AccFuncs = AccSetIt->second;
 
     for (access_iterator AI = AccFuncs.begin(), AE = AccFuncs.end(); AI != AE;
          ++AI)
-      AI->first.print(OS.indent(ind + 2));
+      AI->printIR(OS.indent(ind + 2));
   }
 }
 
 int Scop::getRelativeLoopDepth(const Loop *L) const {
   Loop *OuterLoop =
       L ? R.outermostLoopInRegion(const_cast<Loop *>(L)) : nullptr;
   if (!OuterLoop)
     return -1;
   return L->getLoopDepth() - OuterLoop->getLoopDepth();
 }
 
 void ScopInfo::buildPHIAccesses(PHINode *PHI, Region &R,
-                                AccFuncSetType &Functions,
                                 Region *NonAffineSubRegion, bool IsExitBlock) {
 
   // PHI nodes that are in the exit block of the region, hence if IsExitBlock is
   // true, are not modeled as ordinary PHI nodes as they are not part of the
   // region. However, we model the operands in the predecessor blocks that are
   // part of the region as regular scalar accesses.
 
   // If we can synthesize a PHI we can skip it, however only if it is in
for (unsigned u = 0; u < PHI->getNumIncomingValues(); u++) {
 
     Instruction *OpI = dyn_cast<Instruction>(Op);
     if (OpI) {
       BasicBlock *OpIBB = OpI->getParent();
       // As we pretend there is a use (or more precise a write) of OpI in OpBB
       // we have to insert a scalar dependence from the definition of OpI to
       // OpBB if the definition is not in OpBB.
       if (OpIBB != OpBB) {
-        IRAccess ScalarRead(IRAccess::READ, OpI, ZeroOffset, 1, true, OpI);
-        AccFuncMap[OpBB].push_back(std::make_pair(ScalarRead, PHI));
-        IRAccess ScalarWrite(IRAccess::MUST_WRITE, OpI, ZeroOffset, 1, true,
-                             OpI);
-        AccFuncMap[OpIBB].push_back(std::make_pair(ScalarWrite, OpI));
+        addMemoryAccess(OpBB, PHI, MemoryAccess::READ, OpI, ZeroOffset, 1, true,
+        addMemoryAccess(OpIBB, OpI, MemoryAccess::MUST_WRITE, OpI, ZeroOffset,
+                        1, true, OpI);
       }
     }
 
     // Always use the terminator of the incoming basic block as the access
     // instruction.
     OpI = OpBB->getTerminator();
 
-    IRAccess ScalarAccess(IRAccess::MUST_WRITE, PHI, ZeroOffset, 1, true, Op,
-                          /* IsPHI */ !IsExitBlock);
-    AccFuncMap[OpBB].push_back(std::make_pair(ScalarAccess, OpI));
+    addMemoryAccess(OpBB, OpI, MemoryAccess::MUST_WRITE, PHI, ZeroOffset, 1,
+                    true, Op, /* IsPHI */ !IsExitBlock);
   }
 
   if (!OnlyNonAffineSubRegionOperands) {
-    IRAccess ScalarAccess(IRAccess::READ, PHI, ZeroOffset, 1, true, PHI,
-                          /* IsPHI */ !IsExitBlock);
-    Functions.push_back(std::make_pair(ScalarAccess, PHI));
+    addMemoryAccess(PHI->getParent(), PHI, MemoryAccess::READ, PHI, ZeroOffset,
+                    1, true, PHI,
   }
 }
 
 bool ScopInfo::buildScalarDependences(Instruction *Inst, Region *R,
                                       Region *NonAffineSubRegion) {
   bool canSynthesizeInst = canSynthesize(Inst, LI, SE, R);
   if (isIgnoredIntrinsic(Inst))
     return false;
for (User *U : Inst->users()) {
     // Skip PHI nodes in the region as they handle their operands on their own.
     if (isa<PHINode>(UI))
       continue;
 
     // Now U is used in another statement.
     AnyCrossStmtUse = true;
 
     // Do not build a read access that is not in the current SCoP
-    // Use the def instruction as base address of the IRAccess, so that it will
-    // become the name of the scalar access in the polyhedral form.
-    IRAccess ScalarAccess(IRAccess::READ, Inst, ZeroOffset, 1, true, Inst);
-    AccFuncMap[UseParent].push_back(std::make_pair(ScalarAccess, UI));
+    // Use the def instruction as base address of the MemoryAccess, so that it
+    // will become the name of the scalar access in the polyhedral form.
+    addMemoryAccess(UseParent, UI, MemoryAccess::READ, Inst, ZeroOffset, 1,
+                    true, Inst);
   }
 
   if (ModelReadOnlyScalars) {
     for (Value *Op : Inst->operands()) {
       if (canSynthesize(Op, LI, SE, R))
         continue;
 
       if (Instruction *OpInst = dyn_cast<Instruction>(Op))
         if (R->contains(OpInst))
           continue;
 
       if (isa<Constant>(Op))
         continue;
 
-      IRAccess ScalarAccess(IRAccess::READ, Op, ZeroOffset, 1, true, Op);
-      AccFuncMap[Inst->getParent()].push_back(
-          std::make_pair(ScalarAccess, Inst));
+      addMemoryAccess(Inst->getParent(), Inst, MemoryAccess::READ, Op,
+                      ZeroOffset, 1, true, Op);
     }
   }
 
   return AnyCrossStmtUse;
 }
 
 extern MapInsnToMemAcc InsnToMemAcc;
 
-IRAccess
-ScopInfo::buildIRAccess(Instruction *Inst, Loop *L, Region *R,
-                        const ScopDetection::BoxedLoopsSetTy *BoxedLoops) {
+void ScopInfo::buildMemoryAccess(
+    Instruction *Inst, Loop *L, Region *R,
   unsigned Size;
   Type *SizeType;
   Value *Val;
-  enum IRAccess::TypeKind Type;
+  enum MemoryAccess::AccessType Type;
 
   if (LoadInst *Load = dyn_cast<LoadInst>(Inst)) {
     SizeType = Load->getType();
     Size = TD->getTypeStoreSize(SizeType);
-    Type = IRAccess::READ;
+    Type = MemoryAccess::READ;
     Val = Load;
   } else {
     StoreInst *Store = cast<StoreInst>(Inst);
     SizeType = Store->getValueOperand()->getType();
     Size = TD->getTypeStoreSize(SizeType);
-    Type = IRAccess::MUST_WRITE;
+    Type = MemoryAccess::MUST_WRITE;
     Val = Store->getValueOperand();
   }
 
   const SCEV *AccessFunction = SE->getSCEVAtScope(getPointerOperand(*Inst), L);
   const SCEVUnknown *BasePointer =
       dyn_cast<SCEVUnknown>(SE->getPointerBase(AccessFunction));
 
   assert(BasePointer && "Could not find base pointer");
   AccessFunction = SE->getMinusSCEV(AccessFunction, BasePointer);
 
   auto AccItr = InsnToMemAcc.find(Inst);
-  if (PollyDelinearize && AccItr != InsnToMemAcc.end())
-    return IRAccess(Type, BasePointer->getValue(), AccessFunction, Size, true,
+  if (PollyDelinearize && AccItr != InsnToMemAcc.end()) {
+    addMemoryAccess(Inst->getParent(), Inst, Type, BasePointer->getValue(),
+                    AccessFunction, Size, true,
                     AccItr->second.DelinearizedSubscripts,
                     AccItr->second.Shape->DelinearizedSizes, Val);
+    return;
+  }
 
   // Check if the access depends on a loop contained in a non-affine subregion.
   bool isVariantInNonAffineLoop = false;
   if (BoxedLoops) {
     SetVector<const Loop *> Loops;
     findLoops(AccessFunction, Loops);
     for (const Loop *L : Loops)
       if (BoxedLoops->count(L))
         isVariantInNonAffineLoop = true;
   }
 
   bool IsAffine = !isVariantInNonAffineLoop &&
                   isAffineExpr(R, AccessFunction, *SE, BasePointer->getValue());
 
   SmallVector<const SCEV *, 4> Subscripts, Sizes;
   Subscripts.push_back(AccessFunction);
   Sizes.push_back(SE->getConstant(ZeroOffset->getType(), Size));
 
-  if (!IsAffine && Type == IRAccess::MUST_WRITE)
-    Type = IRAccess::MAY_WRITE;
+  if (!IsAffine && Type == MemoryAccess::MUST_WRITE)
+    Type = MemoryAccess::MAY_WRITE;
 
-  return IRAccess(Type, BasePointer->getValue(), AccessFunction, Size, IsAffine,
-                  Subscripts, Sizes, Val);
+  addMemoryAccess(Inst->getParent(), Inst, Type, BasePointer->getValue(),
+                  AccessFunction, Size, IsAffine, Subscripts, Sizes, Val);
 }
 
 void ScopInfo::buildAccessFunctions(Region &R, Region &SR) {
 
   if (SD->isNonAffineSubRegion(&SR, &R)) {
     for (BasicBlock *BB : SR.blocks())
       buildAccessFunctions(R, *BB, &SR);
     return;
   }
 
   for (auto I = SR.element_begin(), E = SR.element_end(); I != E; ++I)
     if (I->isSubRegion())
       buildAccessFunctions(R, *I->getNodeAs<Region>());
     else
       buildAccessFunctions(R, *I->getNodeAs<BasicBlock>());
 }
 
 void ScopInfo::buildAccessFunctions(Region &R, BasicBlock &BB,
                                     Region *NonAffineSubRegion,
                                     bool IsExitBlock) {
-  AccFuncSetType Functions;
   Loop *L = LI->getLoopFor(&BB);
 
   // The set of loops contained in non-affine subregions that are part of R.
   const ScopDetection::BoxedLoopsSetTy *BoxedLoops = SD->getBoxedLoops(&R);
 
   for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I) {
     Instruction *Inst = I;
 
     PHINode *PHI = dyn_cast<PHINode>(Inst);
     if (PHI)
-      buildPHIAccesses(PHI, R, Functions, NonAffineSubRegion, IsExitBlock);
+      buildPHIAccesses(PHI, R, NonAffineSubRegion, IsExitBlock);
 
     // For the exit block we stop modeling after the last PHI node.
     if (!PHI && IsExitBlock)
       break;
 
     if (isa<LoadInst>(Inst) || isa<StoreInst>(Inst))
-      Functions.push_back(
-          std::make_pair(buildIRAccess(Inst, L, &R, BoxedLoops), Inst));
+      buildMemoryAccess(Inst, L, &R, BoxedLoops);
 
     if (isIgnoredIntrinsic(Inst))
       continue;
 
     if (buildScalarDependences(Inst, &R, NonAffineSubRegion)) {
-      // If the Instruction is used outside the statement, we need to build the
-      // write access.
-      if (!isa<StoreInst>(Inst)) {
-        IRAccess ScalarAccess(IRAccess::MUST_WRITE, Inst, ZeroOffset, 1, true,
-                              Inst);
-        Functions.push_back(std::make_pair(ScalarAccess, Inst));
-      }
-    }
-  }
+      if (!isa<StoreInst>(Inst))
+        addMemoryAccess(&BB, Inst, MemoryAccess::MUST_WRITE, Inst, ZeroOffset,
+                        1, true, Inst);
 
-  if (Functions.empty())
-    return;
+void ScopInfo::addMemoryAccess(
+    BasicBlock *BB, Instruction *Inst, MemoryAccess::AccessType Type,
+    Value *BaseAddress, const SCEV *Offset, unsigned ElemBytes, bool Affine,
+    Value *AccessValue, ArrayRef<const SCEV *> Subscripts,
+    ArrayRef<const SCEV *> Sizes, bool IsPHI = false) {
+  AccFuncSetType &AccList = AccFuncMap[BB];
+  size_t Identifier = AccList.size();
+
+  Value *BaseAddr = BaseAddress;
+  std::string BaseName = getIslCompatibleName("MemRef_", BaseAddr, "");
+
+  std::string IdName = "__polly_array_ref_" + std::to_string(Identifier);
+  isl_id *Id = isl_id_alloc(ctx, IdName.c_str(), nullptr);
 
-  AccFuncSetType &Accs = AccFuncMap[&BB];
-  Accs.insert(Accs.end(), Functions.begin(), Functions.end());
+  AccList.emplace_back(Inst, Id, Type, BaseAddress, Offset, ElemBytes, Affine,
+                       Subscripts, Sizes, AccessValue, IsPHI, BaseName);
 }
 
 Scop *ScopInfo::buildScop(Region &R, DominatorTree &DT) {
   unsigned MaxLoopDepth = getMaxLoopDepthInRegion(R, *LI, *SD);
   Scop *S = new Scop(R, AccFuncMap, *SE, DT, ctx, MaxLoopDepth);
 
   buildAccessFunctions(R, R);
 

lib/CodeGen/BlockGenerators.cpp

 void BlockGenerator::generateScalarLoads(ScopStmt &Stmt,
                                          const Instruction *Inst,
                                          ValueMapT &BBMap) {
   auto *MAL = Stmt.lookupAccessesFor(Inst);
 
   if (!MAL)
     return;
 
-  for (MemoryAccess &MA : *MAL) {
-    if (!MA.isScalar() || !MA.isRead())
+  for (MemoryAccess *MA : *MAL) {
+    if (!MA->isScalar() || !MA->isRead())
       continue;
 
-    auto *Address = getOrCreateAlloca(MA);
-    BBMap[MA.getBaseAddr()] =
+    auto *Address = getOrCreateAlloca(*MA);
+    BBMap[MA->getBaseAddr()] =
         Builder.CreateLoad(Address, Address->getName() + ".reload");
   }
 }
 
 Value *BlockGenerator::getNewScalarValue(Value *ScalarValue, const Region &R,
                                          ValueMapT &BBMap) {
   // If the value we want to store is an instruction we might have demoted it
   // in order to make it accessible here. In such a case a reload is

test/ScopInfo/loop_carry.ll

 ; CHECK:     Statements {
 ; CHECK:      Stmt_bb
 ; CHECK:             Domain :=
 ; CHECK:                 [n] -> { Stmt_bb[i0] : i0 >= 0 and i0 <= -2 + n };
 ; CHECK:             Schedule :=
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> [i0] };
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
-; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
-; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_1__phi[] };
+; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
+; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_k_05__phi[] };
 ; CHECK:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_a[1 + i0] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_a[2 + 2i0] };
 ; CHECK:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
 ; CHECK:                 [n] -> { Stmt_bb[i0] -> MemRef_a[4 + i0] };