[mlir][nvgpu] fix MSVC warning regarding left shift

[NathanielMcVicar]

mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp

67

I believe 1LL is preferred. For example https://github.com/llvm/llvm-project/blob/086a9c106274b597ba501f47281f78b392d86afe/clang/lib/Frontend/ASTUnit.cpp#L303

[christopherbate]

Address comments.

[NathanielMcVicar]

LGTM

mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp

static Value permuteVectorOffset(OpBuilder &b, Location loc,
   // bits[0:N] = sub-vector element offset
   // bits[N:M] = vector index
   // clang-format on
   int64_t N =
       llvm::Log2_64(kDefaultVectorSizeBits / memrefTy.getElementTypeBitWidth());
   int64_t M = llvm::Log2_64(memrefTy.getDimSize(tgtDim));
 
   // Capture bits[0:(M-N)] of src by first creating a (M-N) mask.
-  int64_t mask = (1 << (M - N)) - 1;
+  int64_t mask = (1LL << (M - N)) - 1;
   if (permuteEveryN > 1)
     mask = mask << llvm::Log2_64(permuteEveryN);
   Value srcBits = b.create<arith::ConstantIndexOp>(loc, mask);
   srcBits = b.create<arith::AndIOp>(loc, src, srcBits);
 
   // Use the src bits to permute the target bits b[N:M] containing the
   // vector offset.
   if (permuteEveryN > 1) {
mlir::nvgpu::optimizeSharedMemoryReadsAndWrites(Operation *parentOp,
 
   // Check if this is necessary given the assumption of 128b accesses:
   // If dim[rank-1] is small enough to fit 8 rows in a 128B line.
   const int64_t rowSize = memRefType.getDimSize(memRefType.getRank() - 1);
   const int64_t rowsPerLine =
       (8 * kSharedMemoryLineSizeBytes / memRefType.getElementTypeBitWidth()) /
       rowSize;
   const int64_t threadGroupSize =
-      1 << (7 - llvm::Log2_64(kDefaultVectorSizeBits / 8));
+      1LL << (7 - llvm::Log2_64(kDefaultVectorSizeBits / 8));
   if (rowsPerLine >= threadGroupSize)
     return failure();
 
   // Get sets of operations within the function that read/write to shared
   // memory.
   SmallVector<Operation *, 16> shmReadOps;
   SmallVector<Operation *, 16> shmWriteOps;
   if (failed(getShmReadAndWriteOps(parentOp, memrefValue, shmReadOps,