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[LV] Relax Small Size Reduction Type Requirement
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Authored by mssimpso on Sep 10 2015, 12:08 PM.

Details

Summary

This patch enables small size reductions in which the source types are smaller
than the reduction type (e.g., computing an i16 sum from the values in an i8
array). The previous behavior was to only allow small size reductions if the
source types and reduction type were the same. The change accounts for the fact
that the existing sign- and zero-extend instructions in these cases, should
still be included in the cost model.

Diff Detail

Event Timeline

mssimpso updated this revision to Diff 34473.Sep 10 2015, 12:08 PM
mssimpso retitled this revision from to [LV] Relax Small Size Reduction Type Requirement.
mssimpso updated this object.
mssimpso added reviewers: jmolloy, hfinkel.
mssimpso added subscribers: llvm-commits, mcrosier.

@jmolloy: This change catches a loop in 256.bzip2 when vectorization is forced that the previous revision (D12202) missed.

jmolloy accepted this revision.Sep 10 2015, 12:55 PM
jmolloy edited edge metadata.

Hi Matt,

This looks fine to me.

Cheers,

James

This revision is now accepted and ready to land.Sep 10 2015, 12:55 PM

Thanks very much, James, for the quick review!

This revision was automatically updated to reflect the committed changes.

What kind of correctness/performance testing has been conducted?

test/Transforms/LoopVectorize/AArch64/reduction-small-size.ll
69

Instead of the _2 suffix, how about _short_short?

95

_short_short

130

_2 -> _short_char

Correctness validations were run on the nightly test suite, spec2000, and spec2006. The change does not affect the performance of these programs. The 256.bzip2 loop I mentioned to @jmolloy is affected only by disabling the cost model. I had disabled the cost model in order to discover current limitations.