This is an archive of the discontinued LLVM Phabricator instance.

Differential D126872

[ARM] Fix restoring stack for varargs with SEH split frame pointer push
ClosedPublic

Authored by mstorsjo on Jun 2 2022, 3:20 AM.

Details

Reviewers
efriedma
zzheng
Commits
rG40c937cba239: [ARM] Fix restoring stack for varargs with SEH split frame pointer push
Summary

Previously, the "add sp, #12" ended up inserted after "bx lr".

Diff Detail

Event Timeline

mstorsjo created this revision.Jun 2 2022, 3:20 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 2 2022, 3:20 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald Transcript
mstorsjo requested review of this revision.Jun 2 2022, 3:20 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 2 2022, 3:20 AM
Harbormaster completed remote builds in B167485: Diff 433708.Jun 2 2022, 3:56 AM
mstorsjo updated this revision to Diff 433711.Jun 2 2022, 3:57 AM

Updated to fix cases without vector registers too.

Harbormaster completed remote builds in B167487: Diff 433711.Jun 2 2022, 4:33 AM
efriedma accepted this revision.Jun 2 2022, 1:24 PM

LGTM

This revision is now accepted and ready to land.Jun 2 2022, 1:24 PM
This revision was landed with ongoing or failed builds.Jun 2 2022, 11:45 PM
Closed by commit rG40c937cba239: [ARM] Fix restoring stack for varargs with SEH split frame pointer push (authored by mstorsjo). · Explain Why
This revision was automatically updated to reflect the committed changes.
mstorsjo added a commit: rG40c937cba239: [ARM] Fix restoring stack for varargs with SEH split frame pointer push.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
6 lines
test/
CodeGen/
ARM/
Windows/
114 lines

Diff 433967

llvm/lib/Target/ARM/ARMFrameLowering.cpp

Show First 20 Lines • Show All 1,296 Lines • ▼ Show 20 Lines if (AFI->shouldRestoreSPFromFP()) {
.setMIFlag(MachineInstr::FrameDestroy); .setMIFlag(MachineInstr::FrameDestroy);
} }
} else if (NumBytes && } else if (NumBytes &&
!tryFoldSPUpdateIntoPushPop(STI, MF, &*MBBI, NumBytes)) !tryFoldSPUpdateIntoPushPop(STI, MF, &*MBBI, NumBytes))
emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes, emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes,
MachineInstr::FrameDestroy); MachineInstr::FrameDestroy);
// Increment past our save areas. // Increment past our save areas.
if (AFI->getGPRCalleeSavedArea2Size() && STI.splitFramePointerPush(MF))
MBBI++;
if (MBBI != MBB.end() && AFI->getDPRCalleeSavedAreaSize()) { if (MBBI != MBB.end() && AFI->getDPRCalleeSavedAreaSize()) {
MBBI++; MBBI++;
// Since vpop register list cannot have gaps, there may be multiple vpop // Since vpop register list cannot have gaps, there may be multiple vpop
// instructions in the epilogue. // instructions in the epilogue.
while (MBBI != MBB.end() && MBBI->getOpcode() == ARM::VLDMDIA_UPD) while (MBBI != MBB.end() && MBBI->getOpcode() == ARM::VLDMDIA_UPD)
MBBI++; MBBI++;
} }
if (AFI->getDPRCalleeSavedGapSize()) { if (AFI->getDPRCalleeSavedGapSize()) {
assert(AFI->getDPRCalleeSavedGapSize() == 4 && assert(AFI->getDPRCalleeSavedGapSize() == 4 &&
"unexpected DPR alignment gap"); "unexpected DPR alignment gap");
emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getDPRCalleeSavedGapSize(), emitSPUpdate(isARM, MBB, MBBI, dl, TII, AFI->getDPRCalleeSavedGapSize(),
MachineInstr::FrameDestroy); MachineInstr::FrameDestroy);
} }
if (AFI->getGPRCalleeSavedArea2Size()) MBBI++; if (AFI->getGPRCalleeSavedArea2Size() && !STI.splitFramePointerPush(MF))
MBBI++;
if (AFI->getGPRCalleeSavedArea1Size()) MBBI++; if (AFI->getGPRCalleeSavedArea1Size()) MBBI++;
if (ReservedArgStack || IncomingArgStackToRestore) { if (ReservedArgStack || IncomingArgStackToRestore) {
assert((int)ReservedArgStack + IncomingArgStackToRestore >= 0 && assert((int)ReservedArgStack + IncomingArgStackToRestore >= 0 &&
"attempting to restore negative stack amount"); "attempting to restore negative stack amount");
emitSPUpdate(isARM, MBB, MBBI, dl, TII, emitSPUpdate(isARM, MBB, MBBI, dl, TII,
ReservedArgStack + IncomingArgStackToRestore, ReservedArgStack + IncomingArgStackToRestore,
MachineInstr::FrameDestroy); MachineInstr::FrameDestroy);
▲ Show 20 Lines • Show All 1,939 Lines • Show Last 20 Lines

llvm/test/CodeGen/ARM/Windows/wineh-framepointer.ll

Show First 20 Lines • Show All 54 Lines • ▼ Show 20 Linesentry:
call void @llvm.lifetime.end.p0(i64 5000, ptr nonnull %buf2) #3 call void @llvm.lifetime.end.p0(i64 5000, ptr nonnull %buf2) #3
ret void ret void
} }
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
declare arm_aapcs_vfpcc void @other(i32 noundef, ptr noundef, ptr noundef) declare arm_aapcs_vfpcc void @other(i32 noundef, ptr noundef, ptr noundef)
; CHECK-LABEL: everything_varargs:
; CHECK-NEXT: .seh_proc everything_varargs
; CHECK-NEXT: @ %bb.0: @ %entry
; CHECK-NEXT: sub sp, #12
; CHECK-NEXT: .seh_stackalloc 12
; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9}
; CHECK-NEXT: .seh_save_regs_w {r4-r9}
; CHECK-NEXT: sub sp, #4
; CHECK-NEXT: .seh_stackalloc 4
; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}
; CHECK-NEXT: .seh_save_fregs {d8-d15}
; CHECK-NEXT: push.w {r11, lr}
; CHECK-NEXT: .seh_save_regs_w {r11, lr}
; CHECK-NEXT: mov r11, sp
; CHECK-NEXT: .seh_save_sp r11
; CHECK-NEXT: .seh_endprologue
; CHECK-NEXT: movw r4, #1258
; CHECK-NEXT: bl __chkstk
; CHECK-NEXT: sub.w sp, sp, r4
; CHECK-NEXT: mov r4, sp
; CHECK-NEXT: bfc r4, #0, #4
; CHECK-NEXT: mov sp, r4
; CHECK: .seh_startepilogue
; CHECK-NEXT: mov sp, r11
; CHECK-NEXT: .seh_save_sp r11
; CHECK-NEXT: pop.w {r11, lr}
; CHECK-NEXT: .seh_save_regs_w {r11, lr}
; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}
; CHECK-NEXT: .seh_save_fregs {d8-d15}
; CHECK-NEXT: add sp, #4
; CHECK-NEXT: .seh_stackalloc 4
; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9}
; CHECK-NEXT: .seh_save_regs_w {r4-r9}
; CHECK-NEXT: add sp, #12
; CHECK-NEXT: .seh_stackalloc 12
; CHECK-NEXT: bx lr
; CHECK-NEXT: .seh_nop
; CHECK-NEXT: .seh_endepilogue
; CHECK-NEXT: .seh_endproc
define arm_aapcs_vfpcc void @everything_varargs(i32 noundef %a, ...) {
entry:
%buf2 = alloca [5000 x i8], align 16
%ap = alloca ptr, align 4
%vla = alloca i8, i32 %a, align 1
call void @llvm.lifetime.start.p0(i64 5000, ptr nonnull %buf2)
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %ap)
call void @llvm.va_start(ptr nonnull %ap)
%0 = load ptr, ptr %ap, align 4
call arm_aapcs_vfpcc void @other2(i32 noundef %a, ptr noundef nonnull %vla, ptr noundef nonnull %buf2, ptr noundef %0)
call void @llvm.va_end(ptr nonnull %ap)
call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r11},~{r12}"()
call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"()
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %ap)
call void @llvm.lifetime.end.p0(i64 5000, ptr nonnull %buf2)
ret void
}
; CHECK-LABEL: novector_varargs:
; CHECK-NEXT: .seh_proc novector_varargs
; CHECK-NEXT: @ %bb.0: @ %entry
; CHECK-NEXT: sub sp, #12
; CHECK-NEXT: .seh_stackalloc 12
; CHECK-NEXT: push.w {r4, r5, r6, r7, r8, r9}
; CHECK-NEXT: .seh_save_regs_w {r4-r9}
; CHECK-NEXT: push.w {r11, lr}
; CHECK-NEXT: .seh_save_regs_w {r11, lr}
; CHECK-NEXT: mov r11, sp
; CHECK-NEXT: .seh_save_sp r11
; CHECK-NEXT: .seh_endprologue
; CHECK-NEXT: movw r4, #1259
; CHECK-NEXT: bl __chkstk
; CHECK-NEXT: sub.w sp, sp, r4
; CHECK-NEXT: mov r4, sp
; CHECK-NEXT: bfc r4, #0, #4
; CHECK-NEXT: mov sp, r4
; CHECK: .seh_startepilogue
; CHECK-NEXT: mov sp, r11
; CHECK-NEXT: .seh_save_sp r11
; CHECK-NEXT: pop.w {r11, lr}
; CHECK-NEXT: .seh_save_regs_w {r11, lr}
; CHECK-NEXT: pop.w {r4, r5, r6, r7, r8, r9}
; CHECK-NEXT: .seh_save_regs_w {r4-r9}
; CHECK-NEXT: add sp, #12
; CHECK-NEXT: .seh_stackalloc 12
; CHECK-NEXT: bx lr
; CHECK-NEXT: .seh_nop
; CHECK-NEXT: .seh_endepilogue
; CHECK-NEXT: .seh_endproc
define arm_aapcs_vfpcc void @novector_varargs(i32 noundef %a, ...) {
entry:
%buf2 = alloca [5000 x i8], align 16
%ap = alloca ptr, align 4
%vla = alloca i8, i32 %a, align 1
call void @llvm.lifetime.start.p0(i64 5000, ptr nonnull %buf2)
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %ap)
call void @llvm.va_start(ptr nonnull %ap)
%0 = load ptr, ptr %ap, align 4
call arm_aapcs_vfpcc void @other2(i32 noundef %a, ptr noundef nonnull %vla, ptr noundef nonnull %buf2, ptr noundef %0)
call void @llvm.va_end(ptr nonnull %ap)
call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r11},~{r12}"()
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %ap)
call void @llvm.lifetime.end.p0(i64 5000, ptr nonnull %buf2)
ret void
}
declare void @llvm.va_start(ptr)
declare void @llvm.va_end(ptr)
declare arm_aapcs_vfpcc void @other2(i32 noundef, ptr noundef, ptr noundef, ptr noundef)