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Differential D126797

[AMDGPU] Change GISel error handling for TFE on GFX90A
ClosedPublic

Authored by rampitec on Jun 1 2022, 10:47 AM.

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Reviewers
arsenm
Commits
rGc9e242f6ddab: [AMDGPU] Change GISel error handling for TFE on GFX90A

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Event Timeline

rampitec created this revision.Jun 1 2022, 10:47 AM
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rampitec requested review of this revision.Jun 1 2022, 10:47 AM
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rampitec mentioned this in D126312: [AMDGPU] Fix image opcodes GlobalISel on gfx90a..Jun 1 2022, 10:47 AM
arsenm accepted this revision.Jun 1 2022, 11:03 AM
This revision is now accepted and ready to land.Jun 1 2022, 11:03 AM
This revision was landed with ongoing or failed builds.Jun 1 2022, 11:07 AM
Closed by commit rGc9e242f6ddab: [AMDGPU] Change GISel error handling for TFE on GFX90A (authored by rampitec). · Explain Why
This revision was automatically updated to reflect the committed changes.
rampitec added a commit: rGc9e242f6ddab: [AMDGPU] Change GISel error handling for TFE on GFX90A.
Harbormaster completed remote builds in B167303: Diff 433458.Jun 1 2022, 11:37 AM

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
8 lines

Diff 433463

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Show First 20 Lines • Show All 1,717 Lines • ▼ Show 20 Linesbool AMDGPUInstructionSelector::selectImageIntrinsic(
MIB.addImm(Unorm); MIB.addImm(Unorm);
MIB.addImm(CPol); MIB.addImm(CPol);
MIB.addImm(IsA16 && // a16 or r128 MIB.addImm(IsA16 && // a16 or r128
STI.hasFeature(AMDGPU::FeatureR128A16) ? -1 : 0); STI.hasFeature(AMDGPU::FeatureR128A16) ? -1 : 0);
if (IsGFX10Plus) if (IsGFX10Plus)
MIB.addImm(IsA16 ? -1 : 0); MIB.addImm(IsA16 ? -1 : 0);
if (!Subtarget->hasGFX90AInsts()) if (!Subtarget->hasGFX90AInsts()) {
MIB.addImm(TFE); // tfe MIB.addImm(TFE); // tfe
else if (TFE) } else if (TFE) {
report_fatal_error("TFE is not supported on this GPU"); LLVM_DEBUG(dbgs() << "TFE is not supported on this GPU\n");
return false;
}
MIB.addImm(LWE); // lwe MIB.addImm(LWE); // lwe
if (!IsGFX10Plus) if (!IsGFX10Plus)
MIB.addImm(DimInfo->DA ? -1 : 0); MIB.addImm(DimInfo->DA ? -1 : 0);
if (BaseOpcode->HasD16) if (BaseOpcode->HasD16)
MIB.addImm(IsD16 ? -1 : 0); MIB.addImm(IsD16 ? -1 : 0);
if (IsTexFail) { if (IsTexFail) {
▲ Show 20 Lines • Show All 3,040 Lines • Show Last 20 Lines