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Differential D126356

[tests] precommit tests for D126040
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Authored by Allen on May 25 2022, 12:56 AM.

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spatel
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rG58b76492c1fe: [tests] precommit tests for D126040

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Allen created this revision.May 25 2022, 12:56 AM
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Allen requested review of this revision.May 25 2022, 12:56 AM
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Allen mentioned this in D126040: [InstCombine] Fold a mul with bool value into and.May 25 2022, 1:00 AM
Harbormaster completed remote builds in B166210: Diff 431898.May 25 2022, 2:20 AM
spatel accepted this revision.May 25 2022, 5:00 AM

LGTM

This revision is now accepted and ready to land.May 25 2022, 5:00 AM
Closed by commit rG58b76492c1fe: [tests] precommit tests for D126040 (authored by Allen). · Explain WhyMay 25 2022, 5:41 AM
This revision was automatically updated to reflect the committed changes.
Allen added a commit: rG58b76492c1fe: [tests] precommit tests for D126040.

Revision Contents

PathSize
llvm/
test/
Transforms/
InstCombine/
57 lines

Diff 431953

llvm/test/Transforms/InstCombine/mul-masked-bits.ll

Show First 20 Lines • Show All 157 Lines • ▼ Show 20 Lines
; CHECK-NEXT: [[MUL:%.*]] = mul i33 [[X:%.*]], [[X]] ; CHECK-NEXT: [[MUL:%.*]] = mul i33 [[X:%.*]], [[X]]
; CHECK-NEXT: [[AND:%.*]] = and i33 [[MUL]], 7 ; CHECK-NEXT: [[AND:%.*]] = and i33 [[MUL]], 7
; CHECK-NEXT: ret i33 [[AND]] ; CHECK-NEXT: ret i33 [[AND]]
; ;
%mul = mul i33 %x, %x %mul = mul i33 %x, %x
%and = and i33 %mul, 7 %and = and i33 %mul, 7
ret i33 %and ret i33 %and
} }
; Instcombine should be able to simplify mul operator.
; Scalar tests
define i64 @scalar_mul_bit_x0_y0(i64 %x, i64 %y) {
; CHECK-LABEL: @scalar_mul_bit_x0_y0(
; CHECK-NEXT: [[AND1:%.*]] = and i64 [[X:%.*]], 1
; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], 1
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i64 [[AND1]], [[AND2]]
; CHECK-NEXT: ret i64 [[MUL]]
;
%and1 = and i64 %x, 1
%and2 = and i64 %y, 1
%mul = mul i64 %and1, %and2
ret i64 %mul
}
; Negative test
define i64 @scalar_mul_bit_x0_y1(i64 %x, i64 %y) {
; CHECK-LABEL: @scalar_mul_bit_x0_y1(
; CHECK-NEXT: [[AND1:%.*]] = and i64 [[X:%.*]], 1
; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], 2
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw i64 [[AND1]], [[AND2]]
; CHECK-NEXT: ret i64 [[MUL]]
;
%and1 = and i64 %x, 1
%and2 = and i64 %y, 2
%mul = mul i64 %and1, %and2
ret i64 %mul
}
define i64 @scalar_mul_bit_x0_yC(i64 %x, i64 %y, i64 %c) {
; CHECK-LABEL: @scalar_mul_bit_x0_yC(
; CHECK-NEXT: [[AND1:%.*]] = and i64 [[X:%.*]], 1
; CHECK-NEXT: [[AND2:%.*]] = and i64 [[Y:%.*]], [[C:%.*]]
; CHECK-NEXT: [[MUL:%.*]] = mul nuw i64 [[AND1]], [[AND2]]
; CHECK-NEXT: ret i64 [[MUL]]
;
%and1 = and i64 %x, 1
%and2 = and i64 %y, %c
%mul = mul i64 %and1, %and2
ret i64 %mul
}
; Vector tests
define <2 x i64> @vector_mul_bit_x0_y0(<2 x i64> %x, <2 x i64> %y) {
; CHECK-LABEL: @vector_mul_bit_x0_y0(
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i64> [[X:%.*]], <i64 1, i64 1>
; CHECK-NEXT: [[AND2:%.*]] = and <2 x i64> [[Y:%.*]], <i64 1, i64 1>
; CHECK-NEXT: [[MUL:%.*]] = mul nuw nsw <2 x i64> [[AND1]], [[AND2]]
; CHECK-NEXT: ret <2 x i64> [[MUL]]
;
%and1 = and <2 x i64> %x, <i64 1, i64 1>
%and2 = and <2 x i64> %y, <i64 1, i64 1>
%mul = mul <2 x i64> %and1, %and2
ret <2 x i64> %mul
}