[TypePromotion] Promote undef by converting to 0.

[craig.topper]

Summary

If we're promoting an undef I think that means that we expect the
upper bits are zero. undef doesn't guarantee that.

This patch replaces undef with 0 to ensure this. This matches how
a zext or sext of undef would be folded by InstCombine/InstSimplify.

I haven't found a failure from this was just thinking through the code.

[craig.topper]

Maybe if this usually phis. It isn't a problem?

[samparker]

Hi @craig.topper, so this is interesting because the AArch64 trunc-zext-chain.ll test file is a reproducer for a bug that I couldn't solve. The test function has two versions, because I couldn't figure out if having an undef was the underlying issue. I think it was causing some trouble with GetDemandedBits, but I was unable to figure it out with some very dense logic in the AArch64 backend. So I'm certainly happy to entertain this idea and matching the behaviour of InstCombine/InstSimplify sounds good to me.

[samparker]

@craig.topper ping, I'd like to get this committed. So would you be happy to continue or for me to commandeer this? Although I would just ask you for the review :)

[samparker]

Thanks!

llvm/lib/CodeGen/TypePromotion.cpp

for (unsigned i = 0, e = I->getNumOperands(); i < e; ++i) {
         continue;
 
       if (auto *Const = dyn_cast<ConstantInt>(Op)) {
         Constant *NewConst = (SafeWrap.contains(I) && i == 1)
                                  ? ConstantExpr::getSExt(Const, ExtTy)
                                  : ConstantExpr::getZExt(Const, ExtTy);
         I->setOperand(i, NewConst);
       } else if (isa<UndefValue>(Op))
-        I->setOperand(i, UndefValue::get(ExtTy));
+        I->setOperand(i, ConstantInt::get(ExtTy, 0));
     }
 
     // Mutate the result type, unless this is an icmp or switch.
     if (!isa<ICmpInst>(I) && !isa<SwitchInst>(I)) {
       I->mutateType(ExtTy);
       Promoted.insert(I);
     }
   }

llvm/test/CodeGen/AArch64/typepromotion-phisret.ll

 
 exit:                                             ; preds = %if.end
   ret i8 %inc2
 }
 
 define i16 @phi_multiple_undefs(i16 zeroext %arg) {
 ; CHECK-LABEL: phi_multiple_undefs:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    mov w8, #1
-; CHECK-NEXT:    // implicit-def: $w9
+; CHECK-NEXT:    mov w8, wzr
+; CHECK-NEXT:    mov w9, #1
 ; CHECK-NEXT:  .LBB4_1: // %loop
 ; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1
-; CHECK-NEXT:    cmp w9, #128
-; CHECK-NEXT:    cinc w10, w8, lo
-; CHECK-NEXT:    add w9, w9, w10
-; CHECK-NEXT:    cmp w9, #253
+; CHECK-NEXT:    cmp w8, #128
+; CHECK-NEXT:    cinc w10, w9, lo
+; CHECK-NEXT:    add w8, w8, w10
+; CHECK-NEXT:    cmp w8, #253
 ; CHECK-NEXT:    b.lo .LBB4_1
 ; CHECK-NEXT:  // %bb.2: // %exit
 ; CHECK-NEXT:    ret
 entry:
   br label %loop
 
 loop:                                             ; preds = %if.end, %entry
   %val = phi i16 [ undef, %entry ], [ %inc2, %if.end ]

llvm/test/Transforms/TypePromotion/AArch64/trunc-zext-chain.ll

 ; CHECK-NEXT:    [[VAR:%.*]] = load %struct.wobble*, %struct.wobble** getelementptr inbounds ([[STRUCT_BAR:%.*]], %struct.bar* @global, i64 0, i32 0, i32 0), align 8
 ; CHECK-NEXT:    [[VAR1:%.*]] = icmp eq %struct.wobble* [[VAR]], getelementptr inbounds ([[STRUCT_BAR]], %struct.bar* @global, i64 0, i32 0, i32 1, i32 0, i32 0)
 ; CHECK-NEXT:    br i1 [[VAR1]], label [[BB2:%.*]], label [[BB3:%.*]]
 ; CHECK:       bb2:
 ; CHECK-NEXT:    ret i32 0
 ; CHECK:       bb3:
 ; CHECK-NEXT:    [[VAR4:%.*]] = phi i64 [ [[VAR33:%.*]], [[BB31:%.*]] ], [ undef, [[BB:%.*]] ]
 ; CHECK-NEXT:    [[VAR5:%.*]] = phi %struct.wobble* [ [[VAR38:%.*]], [[BB31]] ], [ [[VAR]], [[BB]] ]
-; CHECK-NEXT:    [[VAR6:%.*]] = phi i32 [ [[VAR32:%.*]], [[BB31]] ], [ undef, [[BB]] ]
+; CHECK-NEXT:    [[VAR6:%.*]] = phi i32 [ [[VAR32:%.*]], [[BB31]] ], [ 0, [[BB]] ]
 ; CHECK-NEXT:    [[VAR7:%.*]] = icmp eq %struct.wobble* [[VAR5]], null
 ; CHECK-NEXT:    br i1 [[VAR7]], label [[BB8:%.*]], label [[BB9:%.*]]
 ; CHECK:       bb8:
 ; CHECK-NEXT:    ret i32 0
 ; CHECK:       bb9:
 ; CHECK-NEXT:    [[VAR10:%.*]] = getelementptr inbounds [[STRUCT_WOBBLE:%.*]], %struct.wobble* [[VAR5]], i64 8
 ; CHECK-NEXT:    [[VAR11:%.*]] = bitcast %struct.wobble* [[VAR10]] to i8*
 ; CHECK-NEXT:    [[VAR12:%.*]] = load i8, i8* [[VAR11]], align 8

llvm/test/Transforms/TypePromotion/ARM/phis-ret.ll

exit:
   ret i8 %inc2
 }
 
 define i16 @phi_multiple_undefs(i16 zeroext %arg) {
 ; CHECK-LABEL: @phi_multiple_undefs(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
-; CHECK-NEXT:    [[VAL:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[INC2:%.*]], [[IF_END:%.*]] ]
+; CHECK-NEXT:    [[VAL:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC2:%.*]], [[IF_END:%.*]] ]
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[VAL]], 128
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
 ; CHECK:       if.then:
 ; CHECK-NEXT:    [[INC:%.*]] = add nuw i32 [[VAL]], 2
 ; CHECK-NEXT:    br label [[IF_END]]
 ; CHECK:       if.else:
 ; CHECK-NEXT:    [[INC1:%.*]] = add nuw i32 [[VAL]], 1
 ; CHECK-NEXT:    br label [[IF_END]]