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Differential D118705

[AArch64] FeaturePerfMon Added to CPUs
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Authored by mubashar_ on Feb 1 2022, 8:19 AM.

Details

Reviewers
lenary
Commits
rG95b8a3e52050: [AArch64] FeaturePerfMon Added to CPUs
Summary

FeaturePerfMon has been enabled for CPUs in AArch64.

Diff Detail

Event Timeline

mubashar_ created this revision.Feb 1 2022, 8:19 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald TranscriptFeb 1 2022, 8:19 AM
mubashar_ requested review of this revision.Feb 1 2022, 8:19 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 1 2022, 8:19 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B146912: Diff 404942.Feb 1 2022, 8:20 AM
lenary accepted this revision.Feb 8 2022, 2:59 AM
This revision is now accepted and ready to land.Feb 8 2022, 2:59 AM
This revision was landed with ongoing or failed builds.Feb 8 2022, 3:19 AM
Closed by commit rG95b8a3e52050: [AArch64] FeaturePerfMon Added to CPUs (authored by mubashar_). · Explain Why
This revision was automatically updated to reflect the committed changes.
mubashar_ added a commit: rG95b8a3e52050: [AArch64] FeaturePerfMon Added to CPUs.

Revision Contents

PathSize
llvm/
lib/
Target/
AArch64/
17 lines
test/
CodeGen/
AArch64/
34 lines

Diff 406755

llvm/lib/Target/AArch64/AArch64.td

Show First 20 Lines • Show All 941 Lines • ▼ Show 20 Lines list<SubtargetFeature> A55 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeaturePerfMon]; FeatureRCPC, FeaturePerfMon];
list<SubtargetFeature> A510 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, list<SubtargetFeature> A510 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
FeatureMatMulInt8, FeatureBF16, FeatureAM, FeatureMatMulInt8, FeatureBF16, FeatureAM,
FeatureMTE, FeatureETE, FeatureSVE2BitPerm, FeatureMTE, FeatureETE, FeatureSVE2BitPerm,
FeatureFP16FML]; FeatureFP16FML];
list<SubtargetFeature> A65 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, list<SubtargetFeature> A65 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeatureSSBS, FeatureRAS]; FeatureRCPC, FeatureSSBS, FeatureRAS,
FeaturePerfMon];
list<SubtargetFeature> A76 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, list<SubtargetFeature> A76 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeatureSSBS]; FeatureRCPC, FeatureSSBS, FeaturePerfMon];
list<SubtargetFeature> A77 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, list<SubtargetFeature> A77 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC]; FeatureRCPC, FeaturePerfMon];
list<SubtargetFeature> A78 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, list<SubtargetFeature> A78 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeaturePerfMon, FeatureSPE, FeatureRCPC, FeaturePerfMon, FeatureSPE,
FeatureSSBS]; FeatureSSBS];
list<SubtargetFeature> A78C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, list<SubtargetFeature> A78C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureFlagM, FeatureFP16FML, FeaturePAuth, FeatureFlagM, FeatureFP16FML, FeaturePAuth,
FeaturePerfMon, FeatureRCPC, FeatureSPE, FeaturePerfMon, FeatureRCPC, FeatureSPE,
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines list<SubtargetFeature> ExynosM3 = [HasV8_0aOps, FeatureCRC, FeatureCrypto,
FeaturePerfMon]; FeaturePerfMon];
list<SubtargetFeature> ExynosM4 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, list<SubtargetFeature> ExynosM4 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd,
FeatureFullFP16, FeaturePerfMon]; FeatureFullFP16, FeaturePerfMon];
list<SubtargetFeature> Falkor = [HasV8_0aOps, FeatureCRC, FeatureCrypto, list<SubtargetFeature> Falkor = [HasV8_0aOps, FeatureCRC, FeatureCrypto,
FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureFPARMv8, FeatureNEON, FeaturePerfMon,
FeatureRDM]; FeatureRDM];
list<SubtargetFeature> NeoverseE1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, list<SubtargetFeature> NeoverseE1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd,
FeatureFPARMv8, FeatureFullFP16, FeatureNEON, FeatureFPARMv8, FeatureFullFP16, FeatureNEON,
FeatureRCPC, FeatureSSBS]; FeatureRCPC, FeatureSSBS, FeaturePerfMon];
list<SubtargetFeature> NeoverseN1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, list<SubtargetFeature> NeoverseN1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd,
FeatureFPARMv8, FeatureFullFP16, FeatureNEON, FeatureFPARMv8, FeatureFullFP16, FeatureNEON,
FeatureRCPC, FeatureSPE, FeatureSSBS]; FeatureRCPC, FeatureSPE, FeatureSSBS,
FeaturePerfMon];
list<SubtargetFeature> NeoverseN2 = [HasV8_5aOps, FeatureBF16, FeatureETE, list<SubtargetFeature> NeoverseN2 = [HasV8_5aOps, FeatureBF16, FeatureETE,
FeatureMatMulInt8, FeatureMTE, FeatureSVE2, FeatureMatMulInt8, FeatureMTE, FeatureSVE2,
FeatureSVE2BitPerm, FeatureTRBE, FeatureCrypto]; FeatureSVE2BitPerm, FeatureTRBE, FeatureCrypto,
FeaturePerfMon];
list<SubtargetFeature> Neoverse512TVB = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, list<SubtargetFeature> Neoverse512TVB = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist,
FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML,
FeatureFullFP16, FeatureMatMulInt8, FeatureNEON, FeatureFullFP16, FeatureMatMulInt8, FeatureNEON,
FeaturePerfMon, FeatureRandGen, FeatureSPE, FeaturePerfMon, FeatureRandGen, FeatureSPE,
FeatureSSBS, FeatureSVE]; FeatureSSBS, FeatureSVE];
list<SubtargetFeature> NeoverseV1 = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, list<SubtargetFeature> NeoverseV1 = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist,
FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML,
FeatureFullFP16, FeatureMatMulInt8, FeatureNEON, FeatureFullFP16, FeatureMatMulInt8, FeatureNEON,
Show All 11 Linesdef ProcessorFeatures {
list<SubtargetFeature> TSV110 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, list<SubtargetFeature> TSV110 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
FeatureNEON, FeaturePerfMon, FeatureSPE, FeatureNEON, FeaturePerfMon, FeatureSPE,
FeatureFullFP16, FeatureFP16FML, FeatureDotProd]; FeatureFullFP16, FeatureFP16FML, FeatureDotProd];
// ETE and TRBE are future architecture extensions. We temporarily enable them // ETE and TRBE are future architecture extensions. We temporarily enable them
// by default for users targeting generic AArch64. The extensions do not // by default for users targeting generic AArch64. The extensions do not
// affect code generated by the compiler and can be used only by explicitly // affect code generated by the compiler and can be used only by explicitly
// mentioning the new system register names in assembly. // mentioning the new system register names in assembly.
list<SubtargetFeature> Generic = [FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureETE]; list<SubtargetFeature> Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
} }
def : ProcessorModel<"generic", CortexA55Model, ProcessorFeatures.Generic, def : ProcessorModel<"generic", CortexA55Model, ProcessorFeatures.Generic,
[FeatureFuseAES, FeaturePostRAScheduler]>; [FeatureFuseAES, FeaturePostRAScheduler]>;
def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53, def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53,
[TuneA35]>; [TuneA35]>;
def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53, def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53,
▲ Show 20 Lines • Show All 176 Lines • Show Last 20 Lines

llvm/test/CodeGen/AArch64/readcyclecounter.ll

; RUN: llc -mtriple=aarch64-unknown-unknown -asm-verbose=false < %s |\ ; RUN: llc -mtriple=aarch64-unknown-unknown -mattr=+perfmon -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON ; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mattr=-perfmon -asm-verbose=false < %s |\ ; RUN: llc -mtriple=aarch64-unknown-unknown -mattr=-perfmon -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=NOPERFMON ; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=NOPERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a53 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a55 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a510 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a65 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a76 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a77 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a78 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a78c -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-a710 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-r82 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-x1 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=cortex-x2 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=neoverse-e1 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=neoverse-n1 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=neoverse-n2 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
; RUN: llc -mtriple=aarch64-unknown-unknown -mcpu=neoverse-v1 -asm-verbose=false < %s |\
; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=PERFMON
define i64 @test_readcyclecounter() nounwind { define i64 @test_readcyclecounter() nounwind {
; CHECK-LABEL: test_readcyclecounter: ; CHECK-LABEL: test_readcyclecounter:
; PERFMON-NEXT: mrs x0, PMCCNTR_EL0 ; PERFMON-NEXT: mrs x0, PMCCNTR_EL0
; NOPERFMON-NEXT: mov x0, xzr ; NOPERFMON-NEXT: mov x0, xzr
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%tmp0 = call i64 @llvm.readcyclecounter() %tmp0 = call i64 @llvm.readcyclecounter()
ret i64 %tmp0 ret i64 %tmp0
} }
declare i64 @llvm.readcyclecounter() declare i64 @llvm.readcyclecounter()