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[AVR] Optimize int16 shift operation for shift amount greater than 8
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Authored by benshi001 on Dec 11 2021, 11:59 PM.

Details

Summary

Skip operation on the lower byte in int16 logical left shift when
shift amount is greater than 8.

Skip operation on the higher byte in int16 logical & arithmetic
right shift when shift amount is greater than 8.

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Event Timeline

benshi001 created this revision.Dec 11 2021, 11:59 PM
benshi001 requested review of this revision.Dec 11 2021, 11:59 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 11 2021, 11:59 PM
benshi001 updated this revision to Diff 393825.Dec 13 2021, 3:05 AM
aykevl added a comment.Jan 3 2022, 1:14 PM

Is there a reason why you introduced 3 new pseudo instructions? It seems to me that the existing 16-bit shift instructions (LSLWN, LSRWN, ASRWN) should already be able to support this.

aykevl accepted this revision.Jan 3 2022, 7:41 PM

Ok, I think I see why you did it the way you did. Which makes sense given the current architecture.

I suspect shift lowering might be simpler when it is all done in the "expand pseudo instructions" pass instead of splitting it early in ISelLowering. But most of the logic is already in ISelLowering so it makes sense to keep it there, at least for now.

This revision is now accepted and ready to land.Jan 3 2022, 7:41 PM
This revision was landed with ongoing or failed builds.Jan 4 2022, 3:49 AM
This revision was automatically updated to reflect the committed changes.